NUP4105MUTAG [ONSEMI]
Low Capacitance ESD Protection Array for High Speed Data Lines Protection; 低电容ESD保护阵列的高速数据线路保护![NUP4105MUTAG](http://pdffile.icpdf.com/pdf1/p00146/img/icpdf/NUP41_809418_icpdf.jpg)
型号: | NUP4105MUTAG |
厂家: | ![]() |
描述: | Low Capacitance ESD Protection Array for High Speed Data Lines Protection |
文件: | 总3页 (文件大小:116K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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NUP4105MU
Low Capacitance ESD
Protection Array for High
Speed Data Lines
Protection
http://onsemi.com
The NUP4105MU transient voltage suppressor is designed to
protect high speed data lines from ESD, EFT, and lighting.
LOW CAPACITANCE
DIODE TVS ARRAY
Features
• Low Capacitance (5 pF Maximum Between I/O Lines and GND)
• ESD Rating of Class 3B (Exceeding 8 kV) per Human Body model
and Class C (Exceeding 400 V) per Machine Model
• Protection for the Following IEC Standards:
IEC 61000−4−2 (ESD) Level 4 − 18 kV (Contact)
• This is a Pb−Free Device
PIN CONFIGURATION
AND SCHEMATIC
Typical Applications
1
2
3
4
5
10
9
• High Speed Communication Line Protection
• USB 1.1 and 2.0 Power and Data Line Protection
• Digital Video Interface (DVI)
• Monitors and Flat Panel Displays
• T1/E1 and T3/E3
8
7
6
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
MARKING
DIAGRAM
Rating
Peak Power Dissipation
Maximum Peak Pulse Current
Symbol
Value
450
26
Unit
W
P
pk
4105
AAYW
G
UDFN10
CASE 517AN
I
PP
A
8 x 20 mS @ T = 25°C (Note 1)
A
4105
AA
Y
W
G
= Specific Device Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
Operating Junction Temperature Range
Storage Temperature Range
T
−40 to +125
−55 to +150
260
°C
°C
°C
J
T
stg
Lead Solder Temperature −
Maximum (10 Seconds)
T
L
Human Body Model (HBM)
Machine Model (MM)
IEC 61000−4−2 Contact (ESD)
ESD
16000
400
18000
V
ORDERING INFORMATION
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
†
Device
NUP4105MUTAG
Package
Shipping
UDFN10 3000/Tape & Reel
(Pb−Free)
1. Non−repetitive current pulse per Figure 1 (Pin 5 to GND Pad)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2009
1
Publication Order Number:
April, 2009 − Rev. 1
NUP4105MU/D
NUP4105MU
ELECTRICAL CHARACTERISTICS (T =25°C unless otherwise specified)
J
Parameter
Reverse Working Voltage
Breakdown Voltage
Symbol
Conditions
Min
Typ
Max
Unit
V
V
RWM
(Note 2)
I =1 mA, (Note 3)
3.3
V
BR
5.0
5.3
V
T
Reverse Leakage Current
Clamping Voltage
I
V
= 3.3 V
5.0
6.2
10
mA
V
R
RWM
V
I
PP
I
PP
I
PP
= 1 A (Note 4)
C
C
Clamping Voltage
V
V
= 10 A (Note 4)
= 25 A (Note 4)
V
Clamping Voltage
14
V
C
Maximum Peak Pulse Current
Junction Capacitance
Junction Capacitance
I
8x20 ms Waveform
26
A
PP
C
C
V
R
V
R
= 0 V, f=1 MHz between I/O Pins and GND
= 0 V, f=1 MHz between I/O Pins
3.0
1.5
5.0
3.0
pF
pF
J
J
2. TVS devices are normally selected according to the working peak reverse voltage (V
or continuous peak operating voltage level.
), which should be equal or greater than the DC
RWM
3. V is measured at pulse test current I .
BR
T
4. Non−repetitive current pulse per Figure 1 (Pin 5 to GND Pad)
TYPICAL PERFORMANCE CURVES
(T = 25°C unless otherwise noted)
J
100
90
80
70
60
50
40
30
20
10
0
100
t
r
PEAK VALUE I
@ 8 ms
RSM
90
80
70
60
50
40
30
PULSE WIDTH (t ) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
P
HALF VALUE I
/2 @ 20 ms
RSM
t
P
20
10
0
0
25
50
75
100
125
150
175
200
0
20
40
t, TIME (ms)
60
80
T , AMBIENT TEMPERATURE (°C)
A
Figure 1. Pulse Derating Curve
Figure 2. 8 × 20 ms Pulse Waveform
http://onsemi.com
2
NUP4105MU
PACKAGE DIMENSIONS
UDFN10 2.6x2.6, 0.5P
CASE 517AN−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
D
A
B
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
E
PIN ONE
REFERENCE
MILLIMETERS
DIM
A
MIN
0.45
0.00
MAX
0.55
0.05
A1
A3
b
2X
0.10
C
0.127 REF
0.20
2.00
0.30
2X
0.10
C
D
2.60 BSC
TOP VIEW
D2
E
2.25
2.60 BSC
A3
E2
e
1.11
1.36
0.10
C
C
0.50 BSC
K
0.20
0.30
---
0.40
A
L
10X
0.08
A1
NOTE 4
SIDE VIEW
D2
SEATING
PLANE
C
SOLDERING FOOTPRINT*
2.25
10X
L
1
5
10X
E2
0.58
1.42 2.90
10
6
10X
K
10X b
e
0.10
C
A
B
NOTE 3
0.05
C
10X
BOTTOM VIEW
0.50
PITCH
0.30
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
NUP4105MU/D
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