NTDS015N15MC [ONSEMI]

N-Channel Shielded Gate PowerTrench® MOSFET 150 V, 50 A, 15 mΩ;
NTDS015N15MC
型号: NTDS015N15MC
厂家: ONSEMI    ONSEMI
描述:

N-Channel Shielded Gate PowerTrench® MOSFET 150 V, 50 A, 15 mΩ

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MOSFET - N-Channel  
Shielded Gate PowerTrench[  
150 V, 15 mW, 50 A  
NTDS015N15MC  
Features  
Shielded Gate MOSFET Technology  
www.onsemi.com  
Max R  
Low R  
= 15 mW at V = 10 V, I = 29 A  
GS D  
DS(on)  
to Minimize Conduction Losses  
DS(on)  
Low Capacitance to Minimize Driver Losses  
Optimized Gate Charge to Minimize Switching Losses  
These Devices are PbFree, Halogen Free/BFR Free and are RoHS  
Compliant  
V
R
MAX  
I MAX  
D
(BR)DSS  
DS(ON)  
150 V  
15 mW @ 10 V  
50 A  
D
Typical Applications  
Primary Side for 48 V Isolated Bus  
SR for MV Secondary Applications  
G
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Parameter  
DraintoSource Voltage  
Symbol  
Value  
150  
20  
Unit  
V
S
V
DSS  
NCHANNEL MOSFET  
GatetoSource Voltage  
V
GS  
V
Continuous Drain  
Current R  
I
50  
A
D
MARKING  
DIAGRAM  
q
JC  
Steady  
State  
(Note 2)  
T
= 25°C  
C
Power Dissipation  
P
83  
11  
W
A
D
4
R
(Note 2)  
q
JC  
Drain  
4
Continuous Drain  
Current R  
I
D
q
JA  
AYWW  
015  
N15MCG  
2
1
Steady  
State  
(Notes 1, 2)  
T = 25°C  
A
3
Power Dissipation  
P
3.8  
W
D
DPAK  
CASE 369C  
R
(Notes 1, 2)  
q
JA  
1
3
Gate  
Source  
Pulsed Drain Current  
T
C
= 25°C, t = 100 ms  
I
DM  
246  
A
2
p
Drain  
Operating Junction and Storage Temperature  
Range  
T , T  
55 to  
+175  
°C  
J
stg  
015N15MCG = Specific Device Code  
A
Y
WW  
= Assembly Location  
= Year  
= Work Week  
Single Pulse DraintoSource Avalanche  
E
AS  
150  
mJ  
Energy (I = 10 A , L = 3 mH)  
L
pk  
Lead Temperature for Soldering Purposes  
(1/8from case for 10 s)  
T
L
260  
°C  
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
ORDERING INFORMATION  
Device  
NTDS015N15MCT4G  
Package  
Shipping  
2
1. Surfacemounted on FR4 board using a 1 in , 2 oz. Cu pad.  
DPAK  
2500 / Tube  
2. The entire application environment impacts the thermal resistance values shown,  
they are not constants and are only valid for the particular conditions noted.  
(PbFree)  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
© Semiconductor Components Industries, LLC, 2018  
1
Publication Order Number:  
May, 2020 Rev. 2  
NTDS015N15MC/D  
 
NTDS015N15MC  
THERMAL RESISTANCE MAXIMUM RATINGS  
Parameter  
Symbol  
Value  
1.8  
Unit  
JunctiontoCase Steady State (Note 2)  
JunctiontoAmbient Steady State (Notes 1, 2)  
R
°C/W  
q
JC  
R
40  
q
JA  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)  
J
Parameter  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
DraintoSource Breakdown Voltage  
V
V
GS  
= 0 V, I = 250 mA  
150  
V
(BR)DSS  
D
DraintoSource Breakdown Voltage  
Temperature Coefficient  
V
/
I
D
= 250 mA, ref to 25°C  
83  
(BR)DSS  
mV/°C  
T
J
Zero Gate Voltage Drain Current  
I
V
DS  
= 0 V,  
T = 25°C  
1.0  
DSS  
GSS  
GS  
J
mA  
V
= 120 V  
GatetoSource Leakage Current  
ON CHARACTERISTICS  
I
V
= 0 V, V  
=
20 V  
100  
nA  
DS  
GS  
Gate Threshold Voltage  
V
V
= V , I = 162 mA  
2.5  
4.5  
V
mV/°C  
mW  
mW  
S
GS(TH)  
GS  
DS  
D
Negative Threshold Temperature Coefficient  
DraintoSource On Resistance  
DraintoSource On Resistance  
Forward Transconductance  
V
/T  
I = 162 mA, ref to 25°C  
D
8.2  
11.8  
12.6  
58  
GS(TH)  
J
R
R
V
= 10 V, I = 29 A  
15  
DS(on)  
DS(on)  
GS  
D
V
= 8 V, I = 15 A  
16.8  
GS  
D
g
FS  
V
= 10 V, I = 29 A  
D
DS  
CHARGES, CAPACITANCES & GATE RESISTANCE  
Input Capacitance  
C
2120  
595  
10.5  
0.6  
27  
ISS  
Output Capacitance  
C
OSS  
C
RSS  
V
GS  
= 0 V, f = 1 MHz, V = 75 V  
pF  
DS  
Reverse Transfer Capacitance  
GateResistance  
R
1.2  
W
G
Total Gate Charge  
Q
G(TOT)  
Threshold Gate Charge  
GatetoSource Charge  
GatetoDrain Charge  
Plateau Voltage  
Q
7
G(TH)  
nC  
Q
11  
V
GS  
= 10 V, V = 75 V; I = 29 A  
GS  
GD  
GP  
DS  
D
Q
V
4
5.5  
66  
V
Output Charge  
Q
V
DD  
= 75 V, V = 0 V  
nC  
OSS  
GS  
SWITCHING CHARACTERISTICS (Note 3)  
TurnOn Delay Time  
Rise Time  
t
16  
5
d(ON)  
t
r
V
= 10 V, V = 75 V,  
DD  
GS  
D
ns  
I
= 29 A, R = 6 W  
G
TurnOff Delay Time  
Fall Time  
t
21  
4
d(OFF)  
t
f
DRAINSOURCE DIODE CHARACTERISTICS  
Forward Diode Voltage  
V
SD  
V
S
= 0 V,  
T = 25°C  
J
0.89  
1.2  
GS  
V
I
= 29 A  
Reverse Recovery Time  
Reverse Recovery Charge  
Reverse Recovery Time  
Reverse Recovery Charge  
t
49  
197  
34  
ns  
RR  
V
S
= 0 V, V = 75 V  
DD  
GS  
dI /dt = 300 A/ms, I = 29 A  
S
Q
nC  
ns  
RR  
RR  
t
RR  
V
GS  
= 0 V, V = 75 V  
DD  
dI /dt = 1000 A/ms, I = 29 A  
S
S
Q
345  
nC  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
3. Switching characteristics are independent of operating junction temperatures.  
www.onsemi.com  
2
 
NTDS015N15MC  
TYPICAL CHARACTERISTICS  
5
120  
90  
10 V  
V
GS  
= 5.5 V  
7.0 V  
8.0 V  
6 V  
4
3
2
6.0 V  
60  
8 V  
V
GS  
= 5.5 V  
7 V  
30  
0
1
0
10 V  
Pulse Duration = 250 ms  
Duty Cycle = 0.5% Max  
0
1
2
3
4
5
6
7
8
9
10  
0
4
0
30  
60  
90  
120  
V
, DRAINTOSOURCE VOLTAGE (V)  
I , DRAIN CURRENT (A)  
D
DS  
Figure 1. OnRegion Characteristics  
Figure 2. Normalized OnResistance vs. Drain  
Current and Gate Voltage  
60  
45  
30  
2.4  
2.2  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
I
D
= 29 A  
I
= 29 A  
D
V
GS  
= 10 V  
T = 150°C  
J
15  
0
T = 25°C  
J
0.8  
0.6  
75 50 25  
0
25 50 75 100 125 150 175  
5
6
7
8
9
10  
T , JUNCTION TEMPERATURE (°C)  
J
V
GS  
, GATETOSOURCE VOLTAGE (V)  
Figure 3. Normalized OnResistance vs.  
Figure 4. OnResistance vs. GatetoSource  
Junction Temperature  
Voltage  
120  
90  
200  
100  
V
DS  
= 10 V  
V
GS  
= 0 V  
10  
1
60  
T = 25°C  
J
0.1  
30  
0
T = 175°C  
J
0.01  
T = 175°C  
T = 55°C  
J
T = 25°C  
J
T = 55°C  
J
J
0.001  
2
3
4
5
6
7
8
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
V
GS  
, GATETOSOURCE VOLTAGE (V)  
V
SD  
, BODY DIODE FORWARD VOLTAGE (V)  
Figure 5. Transfer Characteristics  
Figure 6. SourcetoDrain Diode Forward  
Voltage vs. Source Current  
www.onsemi.com  
3
NTDS015N15MC  
TYPICAL CHARACTERISTICS  
10  
8
10K  
V
DD  
= 25 V  
I
D
= 29 A  
C
ISS  
V
DD  
= 75 V  
V
DD  
= 50 V  
1K  
C
OSS  
6
100  
4
C
RSS  
10  
1
2
0
f = 1 MHz  
= 0 V  
V
GS  
0
6
12  
18  
24  
30  
0.1  
1
10  
100 150  
Q , GATE CHARGE (nC)  
g
V
DS  
, DRAINTOSOURCE VOLTAGE (V)  
Figure 7. Gate Charge Characteristics  
Figure 8. Capacitance vs. DraintoSource  
Voltage  
60  
45  
30  
100K  
10K  
1K  
V
= 10 V  
GS  
V
= 8 V  
GS  
100  
10  
15  
0
R
= 1.8°C/W  
q
JC  
25  
50  
75  
100  
125  
150  
175  
0.00001 0.0001  
0.001  
0.01  
0.1  
1
T , CASE TEMPERATURE (°C)  
C
t, PULSE WIDTH (s)  
Figure 9. Drain Current vs. Case Temperature  
Figure 10. Peak Power  
100  
1000  
100  
10  
10 ms  
100 ms  
T
= 25°C  
J(initial)  
10  
1 ms  
10 ms  
T
= 150°C  
T
= 25°C  
T
= 100°C  
J(initial)  
C
J(initial)  
1
0.1  
Single Pulse  
R
= 1.8°C/W  
q
JC  
R
Limit  
DS(on)  
Thermal Limit  
Package Limit  
100 ms/DC  
100 200  
1
0.01  
0.001  
0.01  
0.1  
1
10  
100  
0.1  
1
10  
t , TIME IN AVALANCHE (mS)  
AV  
V
DS  
, DRAINTOSOURCE VOLTAGE (V)  
Figure 11. Unclamped Inductive Switching  
Capability  
Figure 12. Forward Bias Safe Operating Area  
www.onsemi.com  
4
NTDS015N15MC  
TYPICAL CHARACTERISTICS  
10  
1
Duty Cycle = 0.5  
0.2  
0.1  
0.05  
0.02  
0.1  
P
DM  
0.01  
Notes:  
= 1.8°C/W  
0.01  
R
q
JC  
Single Pulse  
t
Peak T = P  
x Z  
(t) + T  
JC C  
1
q
J
DM  
Duty Cycle, D = t /t  
t
1
2
2
0.001  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
t, RECTANGULAR PULSE DURATION (sec)  
Figure 13. Transient Thermal Impedance  
www.onsemi.com  
5
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
4
DPAK (SINGLE GAUGE)  
CASE 369C  
ISSUE G  
2
1
DATE 31 MAY 2023  
3
SCALE 1:1  
GENERIC  
MARKING DIAGRAM*  
XXXXXXG  
ALYWW  
AYWW  
XXX  
XXXXXG  
IC  
Discrete  
XXXXXX = Device Code  
A
= Assembly Location  
L
= Wafer Lot  
STYLE 1:  
STYLE 2:  
PIN 1. GATE  
2. DRAIN  
STYLE 3:  
STYLE 4:  
STYLE 5:  
Y
WW  
G
= Year  
= Work Week  
= PbFree Package  
PIN 1. BASE  
PIN 1. ANODE  
2. CATHODE  
3. ANODE  
PIN 1. CATHODE  
2. ANODE  
3. GATE  
PIN 1. GATE  
2. ANODE  
3. CATHODE  
4. ANODE  
2. COLLECTOR  
3. EMITTER  
3. SOURCE  
4. DRAIN  
4. COLLECTOR  
4. CATHODE  
4. ANODE  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
PbFree indicator, “G” or microdot “G”, may  
or may not be present. Some products may  
not follow the Generic Marking.  
STYLE 6:  
PIN 1. MT1  
2. MT2  
STYLE 7:  
PIN 1. GATE  
STYLE 8:  
PIN 1. N/C  
STYLE 9:  
PIN 1. ANODE  
2. CATHODE  
STYLE 10:  
PIN 1. CATHODE  
2. ANODE  
2. COLLECTOR  
2. CATHODE  
3. GATE  
4. MT2  
3. EMITTER  
4. COLLECTOR  
3. ANODE  
4. CATHODE  
3. RESISTOR ADJUST  
4. CATHODE  
3. CATHODE  
4. ANODE  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON10527D  
DPAK (SINGLE GAUGE)  
PAGE 1 OF 1  
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