NTB12N50T4 [ONSEMI]
12A, 500V, 0.5ohm, N-CHANNEL, Si, POWER, MOSFET, D2PAK-3;型号: | NTB12N50T4 |
厂家: | ONSEMI |
描述: | 12A, 500V, 0.5ohm, N-CHANNEL, Si, POWER, MOSFET, D2PAK-3 开关 脉冲 晶体管 |
文件: | 总4页 (文件大小:44K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NTP12N50, NTB12N50
Preferred Device
Advance Information
Power MOSFET
12 Amps, 500 Volts
2
N–Channel TO–220 and D PAK
http://onsemi.com
Designed for high voltage, high speed switching applications in
power supplies, converters, power motor controls and bridge circuits.
12 AMPERES
500 VOLTS
Features
• Higher Current Rating
• Lower R
• Lower Capacitances
DS(on)
R
= 500 mΩ
DS(on)
• Lower Total Gate Charge
N–Channel
D
• Tighter V Specifications
SD
• Avalanche Energy Specified
Typical Applications
• Switch Mode Power Supplies
• PWM Motor Controls
• Converters
G
4
S
• Bridge Circuits
4
1
2
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
C
3
Rating
Symbol
Value
500
Unit
Vdc
Vdc
Vdc
2
D PAK
CASE 418B
STYLE 2
TO–220AB
CASE 221A
STYLE 5
Drain–Source Voltage
V
DSS
Drain–Gate Voltage (R
= 1.0 MΩ)
V
DGR
500
GS
1
2
Gate–Source Voltage
– Continuous
3
MARKING DIAGRAMS
AND PIN ASSIGNMENTS
V
GS
"20
"40
– Non–Repetitive (t v10 ms)
V
GSM
p
Drain
Drain
Drain
Adc
– Continuous
– Continuous @ 100°C
– Single Pulse (t v10 µs)
I
I
12
10
42
D
D
I
p
DM
NTB12N50
LLYWW
Total Power Dissipation
Derate above 25°C
P
202
1.61
Watts
W/°C
D
NTP12N50
LLYWW
Operating and Storage Temperature
Range
T , T
J stg
–55 to 150
°C
Drain
Gate
Source
Gate
Source
Single Drain–to–Source Avalanche
E
AS
720
mJ
NTx12N50 = Device Code
Energy – Starting T = 25°C
J
GS
Drain
LL
Y
= Location Code
= Year
(V
= 100 V, V
= 10 Vdc,
= 12 A, L = 10 mH, R = 25 Ω)
DD
I
L
G
WW
= Work Week
Thermal Resistance
– Junction–to–Case
°C/W
°C
R
R
R
0.62
62.5
50
θJC
θJA
θJA
ORDERING INFORMATION
– Junction–to–Ambient
– Junction–to–Ambient (Note 1.)
Device
Package
Shipping
Maximum Lead Temperature for
Soldering Purposes, 1/8″ from case
for 10 seconds
T
260
L
NTP12N50
NTB12N50
NTB12N50T4
TO–220AB
50 Units/Rail
50 Units/Rail
2
D PAK
1. When surface mounted to an FR4 board using the minimum recommended
pad size.
2
D PAK
800/Tape & Reel
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
Preferred devices are recommended choices for future use
and best overall value.
Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
November, 2000 – Rev. 1
NTP12N50/D
NTP12N50, NTB12N50
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
C
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
(V = 0 Vdc, I = 0.25 mAdc)
V
Vdc
(BR)DSS
500
–
–
583
–
–
GS
D
Temperature Coefficient (Positive)
mV/°C
µAdc
Zero Gate Voltage Collector Current
I
DSS
(V
DS
(V
DS
= 500 Vdc, V
= 500 Vdc, V
= 0 Vdc)
= 0 Vdc, T =125°C)
–
–
–
–
10
100
GS
GS
J
Gate–Body Leakage Current (V
= ±20 Vdc, V
DS
= 0)
I
I
–
–
–
–
100
100
nAdc
GS
GSS(f)
GSS(r)
ON CHARACTERISTICS (Note 2.)
Gate Threshold Voltage
V
GS(th)
Vdc
I
D
= 0.25 mA, V
= V
2.0
–
2.5
6.7
4.0
–
DS
GS
Temperature Coefficient (Negative)
Static Drain–to–Source On–Resistance (V
Drain–to–Source On–Voltage
mV/°C
mOhm
Vdc
= 10 Vdc, I = 6 Adc)
R
V
–
380
500
GS
D
DS(on)
DS(on)
(V
GS
(V
GS
= 10 Vdc, I = 12 Adc)
–
–
–
–
7.2
6.5
D
= 10 Vdc, I = 6 Adc, T = 125°C)
D
J
Forward Transconductance (V
= 15 Vdc, I = 6 Adc)
g
FS
8.0
11
–
mhos
pF
DS
D
DYNAMIC CHARACTERISTICS
Input Capacitance
C
–
–
–
1800
620
40
2520
870
80
iss
(V
DS
= 25 Vdc, V
f = 1.0 MHz)
= 0 Vdc,
GS
Output Capacitance
C
oss
Transfer Capacitance
C
rss
SWITCHING CHARACTERISTICS (Note 3.)
Turn–On Delay Time
t
–
–
–
–
–
–
–
–
12
27
52
35
37
8.0
12
20
20
50
100
70
50
–
ns
d(on)
(V
= 250 Vdc, I = 12 Adc,
D
Rise Time
DD
DS
t
r
V
= 10 Vdc,
GS
G
Turn–Off Delay Time
Fall Time
t
d(off)
R
= 9.1 Ω)
t
f
Gate Charge
Q
T
Q
1
Q
2
Q
3
nC
(V
= 400 Vdc, I = 12 Adc,
D
V
GS
= 10 Vdc)
–
–
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage (Note 2.)
V
Vdc
ns
SD
(I = 12 Adc, V
= 0 Vdc)
–
–
0.90
0.80
1.0
–
S
GS
= 0 Vdc, T = 125°C)
(I = 12 Adc, V
S
GS
J
Reverse Recovery Time
t
–
–
–
–
380
165
215
3.9
–
–
–
–
rr
t
a
(I = 12 Adc, V
= 0 Vdc,
S
GS
di /dt = 100 A/µs)
t
b
S
Reverse Recovery Stored
Charge
Q
µC
RR
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from contact screw on tab to center of die)
(Measured from the drain lead 0.25″ from package to center of die)
L
D
nH
–
–
3.5
4.5
–
–
Internal Source Inductance
(Measured from the source lead 0.25″ from package to source bond pad)
L
S
–
7.5
–
2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
3. Switching characteristics are independent of operating junction temperature.
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2
NTP12N50, NTB12N50
PACKAGE DIMENSIONS
TO–220 THREE–LEAD
TO–220AB
CASE 221A–09
ISSUE AA
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
SEATING
PLANE
–T–
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
C
S
B
F
T
4
1
INCHES
DIM MIN MAX
MILLIMETERS
MIN
14.48
9.66
4.07
0.64
3.61
2.42
2.80
0.46
12.70
1.15
4.83
2.54
2.04
1.15
5.97
0.00
1.15
---
MAX
15.75
10.28
4.82
0.88
3.73
2.66
3.93
0.64
14.27
1.52
5.33
3.04
2.79
1.39
6.47
1.27
---
A
K
Q
Z
A
B
C
D
F
0.570
0.380
0.160
0.025
0.142
0.095
0.110
0.018
0.500
0.045
0.190
0.100
0.080
0.045
0.235
0.000
0.045
---
0.620
0.405
0.190
0.035
0.147
0.105
0.155
0.025
0.562
0.060
0.210
0.120
0.110
0.055
0.255
0.050
---
2
3
U
H
G
H
J
K
L
L
R
J
N
Q
R
S
T
V
G
D
U
V
Z
N
0.080
2.04
STYLE 5:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
2
D PAK
CASE 418B–03
ISSUE D
C
E
V
–B–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
4
INCHES
DIM MIN MAX
MILLIMETERS
A
MIN
8.64
9.65
4.06
0.51
1.14
MAX
9.65
10.29
4.83
0.89
1.40
A
B
C
D
E
G
H
J
0.340
0.380
0.160
0.020
0.045
0.380
0.405
0.190
0.035
0.055
S
1
2
3
–T–
SEATING
PLANE
K
0.100 BSC
2.54 BSC
0.080
0.018
0.090
0.575
0.045
0.110
0.025
0.110
0.625
0.055
2.03
0.46
2.79
0.64
J
G
K
S
V
2.29
14.60
1.14
2.79
15.88
1.40
H
D 3 PL
M
M
0.13 (0.005)
T B
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
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3
NTP12N50, NTB12N50
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
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including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
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alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
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NTP12N50/D
相关型号:
NTB13N10G
13A, 100V, 0.165ohm, N-CHANNEL, Si, POWER, MOSFET, LEAD FREE, CASE 418B-04, D2PAK-3
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