NSVIMD10AMT1G [ONSEMI]
由 100mA NBRT 和 500mA PBRT 组成的双裸片零件;型号: | NSVIMD10AMT1G |
厂家: | ONSEMI |
描述: | 由 100mA NBRT 和 500mA PBRT 组成的双裸片零件 小信号双极晶体管 |
文件: | 总5页 (文件大小:97K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
IMD10AMT1G
Dual Bias Resistor
Transistor
NPN and PNP Silicon Surface Mount
Transistors with Monolithic Bias Resistor
Network
http://onsemi.com
• High Current: I = 500 mA max
C
• This is a Pb−Free Device
(3)
(2)
(1)
MAXIMUM RATINGS (T = 25°C)
A
R1
R1
Rating
Symbol
Value
50
Unit
Vdc
Q
1
Q2
Collector−Base Voltage
Collector−Emitter Voltage
Emitter−Base Voltage
V
(BR)CBO
(BR)CEO
(BR)EBO
V
V
50
Vdc
R2
5.0
Vdc
Collector Current − Continuous
I
C
500
mAdc
(4)
(5)
SC−74
(6)
THERMAL CHARACTERISTICS
Characteristic
Power Dissipation*
Symbol
Max
285
Unit
mW
°C
P
D
Junction Temperature
Storage Temperature
T
J
150
MARKING
DIAGRAM
T
stg
−55 to +150
°C
6
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
*Total for both Transistors.
1
D10
M
SC−74R
318AA
Style 21
D10 = Specific Device Code
= Date Code
M
ORDERING INFORMATION
†
Device
IMD10AMT1G
Package
Shipping
SC−74R
3000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2012
Publication Order Number:
April, 2012 − Rev. 0
IMD10AMT1G/D
IMD10AMT1G
ELECTRICAL CHARACTERISTICS
(T = 25°C unless otherwise noted, common for Q and Q , − minus sign for Q (PNP) omitted)
A
1
2
1
Characteristic
Symbol
Min
Max
Unit
OFF CHARACTERISTICS
Collector−Base Breakdown Voltage
(I = 50 mAdc, I = 0 A)
V
50
50
5.0
−
−
−
Vdc
Vdc
Vdc
nA
(BR)CBO
(BR)CEO
(BR)EBO
C
E
Collector−Emitter Breakdown Voltage
(I = 1.0 mAdc, I = 0 A)
V
V
C
B
Emitter−Base Breakdown Voltage
(I = 50 mAdc, I = 0 A)
−
E
C
Collector−Base Cutoff Current
(V = 50 Vdc, I = 0 A)
I
100
0.5
500
100
CBO
CB
E
Emitter−Base Cutoff Current
(V = 6.0 Vdc, I = 0 A)
I
−
mA
nA
EBO
EB
C
Collector−Emitter Cutoff Current
(V = 15 Vdc, I = 0 A)
I
−
CEO
CE
B
Collector−Emitter Cutoff Current
(V = 25 Vdc, I = 0 A)
I
−
nA
CES
CE
B
ON CHARACTERISTICS (Note 1)
DC Current Gain
h
FE
(V = 5.0 V, I = 100 mA) Q1(PNP)
68
100
−
600
CE
C
(V = 5.0 V, I = 1.0 mA) Q2(NPN)
CE
C
Collector−Emitter Saturation Voltage
(I = 10 mA, I = 1.0 mA)
V
−
−
0.3
0.2
−
Vdc
Vdc
Vdc
CE(sat)
C
B
Output Voltage (on)
V
V
OL
OL
(V = 5.0 V, V = 2.5 V, R = 1.0 kW)
CC
B
L
Output Voltage (off)
4.9
(V = 5.0 V, V = 0.25 V, R = 1.0 kW)
CC
B
L
Input Resistor
Q1(PNP)
R1
70
7.0
130
13
W
kW
Q2(NPN)
Resistor Ratio
Q1(PNP)
R1/R2
0.008
−
0.012
−
Q2(NPN)
1. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle < 2.0%.
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2
IMD10AMT1G
TYPICAL CHARACTERISTICS (NPN)
1000
10
V
= 5 V
CE
I /I = 10
C
B
25°C
75°C
1
−25°C
100
10
25°C
0.1
75°C
−25°C
0.01
1
10
100
1
10
I , COLLECTOR CURRENT (mA)
100
I , COLLECTOR CURRENT (mA)
C
C
Figure 1. DC Current Gain
Figure 2. Collector−Emitter Saturation Voltage
1000
100
10
100
10
V
= 0.2 V
O
V
= 5 V
O
75°C
25°C
1
25°C
−25°C
−25°C
75°C
0.1
1
0.01
0.001
0.1
0
1
2
3
4
1
10
I , COLLECTOR CURRENT (mA)
100
V , INPUT VOLTAGE (V)
in
C
Figure 3. Output Current vs. Input Voltage
Figure 4. Input Voltage vs. Output Current
4
3
2
1
0
0
10
20
30
40
50
V , REVERSE BIAS VOLTAGE (V)
R
Figure 5. Output Capacitance
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3
IMD10AMT1G
TYPICAL CHARACTERISTICS (PNP)
1
1000
V
= 5 V
I /I = 10
CE
C
B
0.1
0.01
10
100
10
75°C
25°C
25°C
−25°C
75°C
−25°C
1
10
100
1000
1
10
100
1000
I , COLLECTOR CURRENT (mA)
I , COLLECTOR CURRENT (mA)
C
C
Figure 7. Collector−Emitter Saturation Voltage
Figure 6. DC Current Gain
1000
100
10
V
= 0.2 V
O
75°C
V
= 5 V
O
25°C
−25°C
25°C
1
1
−25°C
75°C
0.1
0.01
0.001
0.1
0
1
2
3
4
1
10
100
1000
V , INPUT VOLTAGE (V)
in
I , COLLECTOR CURRENT (mA)
C
Figure 8. Output Current vs. Input Voltage
Figure 9. Input Voltage vs. Output Current
25
20
15
10
5
0
0
10
20
30
40
50
V , REVERSE BIAS VOLTAGE (V)
R
Figure 10. Output Capacitance
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4
IMD10AMT1G
PACKAGE DIMENSIONS
SC−74R
CASE 318AA−01
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
D
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
4
5
2
6
E
H
E
1
3
MILLIMETERS
INCHES
DIM
A
A1
b
c
D
E
e
L
MIN
0.90
0.01
0.25
0.10
2.90
1.30
0.85
0.20
2.50
0°
NOM
1.00
0.06
0.37
0.18
3.00
1.50
0.95
0.40
2.75
−
MAX
MIN
0.035
0.001
0.010
0.004
0.114
0.051
0.034
0.008
0.099
0°
NOM
0.039
0.002
0.015
0.007
0.118
0.059
0.037
0.016
0.108
−
MAX
0.043
0.004
0.020
0.010
0.122
0.067
0.041
0.024
0.118
10°
1.10
0.10
0.50
0.26
3.10
1.70
1.05
0.60
3.00
10°
b
e
q
c
A
H
E
q
0.05 (0.002)
L
STYLE 21:
A1
PIN 1. COLLECTOR 1
2. EMITTER 2
3. BASE 2
4. COLLECTOR 2
5. EMITTER 1
6. BASE 1
SOLDERING FOOTPRINT*
2.4
0.094
0.95
0.037
1.9
0.074
0.95
0.037
0.7
0.028
1.0
0.039
mm
inches
ǒ
Ǔ
SCALE 10:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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IMD10AMT1G/D
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