NLV74HC245ADTR2G

更新时间:2024-09-18 22:06:11
品牌:ONSEMI
描述:Octal 3-State Noninverting Bus Transceiver

NLV74HC245ADTR2G 概述

Octal 3-State Noninverting Bus Transceiver

NLV74HC245ADTR2G 数据手册

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MC74HC245A  
Octal 3-State Noninverting  
Bus Transceiver  
High−Performance Silicon−Gate CMOS  
The MC74HC245A is identical in pinout to the LS245. The device  
inputs are compatible with standard CMOS outputs; with pull−up  
resistors, they are compatible with LSTTL outputs.  
http://onsemi.com  
The HC245A is a 3−state noninverting transceiver that is used for  
2−way asynchronous communication between data buses. The device  
has an active−low Output Enable pin, which is used to place the I/O  
ports into high−impedance states. The Direction control determines  
whether data flows from A to B or from B to A.  
SOIC−20  
DW SUFFIX  
CASE 751D  
TSSOP−20  
DT SUFFIX  
CASE 948E  
Features  
PIN ASSIGNMENT  
Output Drive Capability: 15 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2.0 to 6.0 V  
Low Input Current: 1 mA  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7 A  
Chip Complexity: 308 FETs or 77 Equivalent Gates  
NLV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AEC−Q100  
Qualified and PPAP Capable  
DIRECTION  
20  
V
CC  
1
2
3
4
5
6
7
8
9
OUTPUT  
ENABLE  
A1  
A2  
A3  
19  
18  
17  
B1  
B2  
A4  
A5  
16  
15  
14  
13  
12  
11  
B3  
B4  
B5  
B6  
B7  
B8  
A6  
A7  
These Devices are Pb−Free, Halogen Free and are RoHS Compliant  
A8  
LOGIC DIAGRAM  
GND  
10  
2
18  
17  
16  
15  
14  
13  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
B1  
B2  
3
4
5
6
7
MARKING DIAGRAMS  
B3  
B4  
20  
20  
A
DATA  
PORT  
B
DATA  
PORT  
HC  
B5  
B6  
B7  
B8  
HC245A  
AWLYYWWG  
245A  
ALYWG  
G
8
9
12  
11  
1
1
SOIC−20  
TSSOP−20  
1
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
= Year  
DIRECTION  
19  
OUTPUT  
ENABLE  
PIN 10 = GND  
PIN 20 = V  
WW, W = Work Week  
CC  
G or G  
= Pb−Free Package  
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
© Semiconductor Components Industries, LLC, 2014  
1
Publication Order Number:  
November, 2014 − Rev. 16  
MC74HC245A/D  
MC74HC245A  
FUNCTION TABLE  
Control Inputs  
Output  
Enable  
Direction  
Operation  
L
L
H
X
Data Transmitted from Bus B to Bus A  
Data Transmitted from Bus A to Bus B  
Buses Isolated (High−Impedance State)  
L
H
X = don’t care  
MAXIMUM RATINGS (Note 1)  
Symbol  
Parameter  
Value  
Unit  
V
V
CC  
DC Supply Voltage  
−0.5 to +7.0  
V
IN  
DC Input Voltage  
−0.5 to V + 0.5  
V
CC  
V
OUT  
DC Output Voltage  
(Note 2)  
−0.5 to V + 0.5  
V
CC  
I
DC Input Diode Current  
DC Output Diode Current  
DC Output Sink Current  
DC Supply Current per Supply Pin  
DC Ground Current per Ground Pin  
Storage Temperature Range  
20  
mA  
mA  
mA  
mA  
mA  
_C  
IK  
I
35  
35  
OK  
I
OUT  
I
75  
CC  
I
75  
GND  
T
−65 to +150  
260  
STG  
T
Lead Temperature, 1 mm from Case for 10 Seconds  
Junction Temperature Under Bias  
Thermal Resistance  
_C  
L
T
+150  
_C  
_C/W  
J
q
SOIC  
TSSOP  
96  
128  
JA  
P
D
Power Dissipation in Still Air at 85_C  
SOIC  
TSSOP  
500  
450  
mW  
MSL  
Moisture Sensitivity  
Flammability Rating  
ESD Withstand Voltage  
Level 1  
F
R
Oxygen Index: 30% to 35%  
UL 94 V−0 @ 0.125 in  
V
ESD  
Human Body Model (Note 3)  
Machine Model (Note 4)  
Charged Device Model (Note 5)  
u2000  
u200  
V
u1000  
I
Latchup Performance  
Above V and Below GND at 85_C (Note 6)  
300  
mA  
LATCHUP  
CC  
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality  
should not be assumed, damage may occur and reliability may be affected.  
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 20 ounce copper trace with no air flow.  
2. I absolute maximum rating must observed.  
O
3. Tested to EIA/JESD22−A114−A.  
4. Tested to EIA/JESD22−A115−A.  
5. Tested to JESD22−C101−A.  
6. Tested to EIA/JESD78.  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
2.0  
0
Max  
Unit  
V
V
CC  
DC Supply Voltage (Referenced to GND)  
6.0  
V , V  
in out  
DC Input Voltage, Output Voltage (Referenced to GND)  
Operating Temperature, All Package Types  
V
CC  
V
T
A
–55  
+125  
_C  
ns  
t , t  
Input Rise and Fall Time  
(Figure 1)  
V
CC  
V
CC  
V
CC  
= 2.0 V  
= 4.5 V  
= 6.0 V  
0
0
0
1000  
500  
400  
r
f
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond  
the Recommended Operating Ranges limits may affect device reliability.  
http://onsemi.com  
2
 
MC74HC245A  
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)  
Guaranteed Limit  
V
CC  
–55 to  
V
25_C  
Symbol  
Parameter  
Test Conditions  
= V – 0.1 V  
|I | v 20 mA  
v 85_C v 125_C  
Unit  
V
IH  
Minimum High−Level Input Voltage  
V
out  
2.0  
3.0  
4.5  
6.0  
1.5  
2.1  
1.5  
2.1  
1.5  
2.1  
V
out  
CC  
3.15  
4.2  
3.15  
4.2  
3.15  
4.2  
V
Maximum Low−Level Input Voltage  
V
= 0.1 V  
2.0  
3.0  
4.5  
6.0  
0.5  
0.9  
1.35  
1.8  
0.5  
0.9  
1.35  
1.8  
0.5  
0.9  
1.35  
1.8  
V
V
IL  
out  
|I | v 20 mA  
out  
V
OH  
Minimum High−Level Output  
Voltage  
V
in  
= V  
IH  
2.0  
4.5  
6.0  
1.9  
4.4  
5.9  
1.9  
4.4  
5.9  
1.9  
4.4  
5.9  
|I | v 20 mA  
out  
V
= V |I | v 2.4 mA  
3.0  
4.5  
6.0  
2.48  
3.98  
5.48  
2.34  
3.84  
5.34  
2.2  
3.7  
5.2  
in  
IH out  
|I | v 6.0 mA  
out  
|I | v 7.8 mA  
out  
V
OL  
Maximum Low−Level Output  
Voltage  
V
in  
= V  
2.0  
4.5  
6.0  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
V
IL  
|I | v 20 mA  
out  
V
= V |I | v 2.4 mA  
3.0  
4.5  
6.0  
0.26  
0.26  
0.26  
0.33  
0.33  
0.33  
0.4  
0.4  
0.4  
in  
IL  
out  
|I | v 6.0 mA  
out  
|I | v 7.8 mA  
out  
I
Maximum Input Leakage Current  
V
in  
= V or GND  
6.0  
6.0  
0.1  
0.5  
1.0  
5.0  
1.0  
10  
mA  
mA  
in  
CC  
I
Maximum Three−State Leakage  
Current  
Output in High−Impedance State  
= V or V  
OZ  
V
in  
IL  
IH  
V
out  
= V or GND  
CC  
I
Maximum Quiescent Supply Cur-  
rent (per Package)  
V
= V or GND  
= 0 mA  
6.0  
4.0  
40  
160  
mA  
CC  
in  
CC  
I
out  
AC ELECTRICAL CHARACTERISTICS (C = 50 pF, Input t = t = 6 ns)  
L
r
f
Guaranteed Limit  
–55 to  
V
CC  
25_C  
V
v 85_C v 125_C  
Symbol  
Parameter  
Unit  
t
t
t
,
Maximum Propagation Delay,  
A to B, B to A  
(Figures 1 and 3)  
2.0  
3.0  
4.5  
6.0  
75  
55  
15  
13  
95  
70  
19  
16  
110  
80  
ns  
PLH  
t
PHL  
22  
19  
,
Maximum Propagation Delay,  
2.0  
3.0  
4.5  
6.0  
110  
90  
22  
140  
110  
28  
165  
130  
33  
ns  
ns  
ns  
PLZ  
Direction or Output Enable to A or B  
(Figures 2 and 4)  
t
PHZ  
19  
24  
28  
,
Maximum Propagation Delay,  
Output Enable to A or B  
(Figures 2 and 4)  
2.0  
3.0  
4.5  
6.0  
110  
90  
22  
140  
110  
28  
165  
130  
33  
PZL  
t
PZH  
19  
24  
28  
t
,
Maximum Output Transition Time,  
Any Output  
2.0  
3.0  
4.5  
6.0  
60  
23  
12  
10  
75  
27  
15  
13  
90  
32  
18  
15  
TLH  
t
THL  
(Figures 1 and 3)  
C
Maximum Input Capacitance (Pin 1 or Pin 19)  
10  
15  
10  
15  
10  
15  
pF  
pF  
in  
C
Maximum Three−State I/O Capacitance  
(I/O in High−Impedance State)  
out  
Typical @ 25°C, V = 5.0 V  
CC  
40  
C
Power Dissipation Capacitance (Per Transceiver Channel) (Note 7)  
pF  
PD  
2
7. Used to determine the no−load dynamic power consumption: P = C  
V
f + I  
V
.
D
PD CC  
CC CC  
http://onsemi.com  
3
 
MC74HC245A  
ORDERING INFORMATION  
Device  
Package  
Shipping  
MC74HC245ADWG  
SOIC−20 WIDE  
(Pb−Free)  
38 Units / Rail  
38 Units / Rail  
NLV74HC245ADWG*  
MC74HC245ADWR2G  
NLV74HC245ADWR2G*  
MC74HC245ADTG  
SOIC−20 WIDE  
(Pb−Free)  
SOIC−20 WIDE  
(Pb−Free)  
1000 Tape & Reel  
1000 Tape & Reel  
75 Units / Rail  
SOIC−20 WIDE  
(Pb−Free)  
TSSOP−20  
(Pb−Free)  
NLV74HC245ADTG*  
MC74HC245ADTR2G  
NLV74HC245ADTR2G*  
TSSOP−20  
(Pb−Free)  
75 Units / Rail  
TSSOP−20  
(Pb−Free)  
2500 Tape & Reel  
2500 Tape & Reel  
TSSOP−20  
(Pb−Free)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP  
Capable.  
V
CC  
DIRECTION  
50%  
GND  
V
CC  
OUTPUT  
ENABLE  
50%  
t
t
f
r
GND  
V
CC  
INPUT  
A OR B  
90%  
50%  
t
t
PLZ  
PZL  
HIGH  
IMPEDANCE  
10%  
GND  
50%  
t
t
PHL  
PLH  
A OR B  
A OR B  
10%  
90%  
V
V
OL  
90%  
50%  
10%  
OUTPUT  
B OR A  
t
t
PHZ  
PZH  
OH  
50%  
HIGH  
IMPEDANCE  
t
t
THL  
TLH  
Figure 1. Switching Waveform  
Figure 2. Switching Waveform  
TEST POINT  
OUTPUT  
TEST POINT  
CONNECT TO V WHEN  
CC  
1 kW  
OUTPUT  
TESTING t  
AND t  
.
PLZ  
PZL  
DEVICE  
UNDER  
TEST  
DEVICE  
UNDER  
TEST  
CONNECT TO GND WHEN  
TESTING t AND t  
.
PZH  
PHZ  
C *  
L
C *  
L
*Includes all probe and jig capacitance  
*Includes all probe and jig capacitance  
Figure 3. Test Circuit  
Figure 4. Test Circuit  
http://onsemi.com  
4
MC74HC245A  
2
3
4
5
6
7
8
9
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
18  
17  
16  
15  
B1  
B2  
B3  
B4  
A
B
DATA  
PORT  
DATA  
PORT  
14  
13  
12  
11  
B5  
B6  
B7  
B8  
1
DIRECTION  
19  
OUTPUT ENABLE  
Figure 5. Expanded Logic Diagram  
http://onsemi.com  
5
MC74HC245A  
PACKAGE DIMENSIONS  
TSSOP−20  
DT SUFFIX  
CASE 948E−02  
ISSUE C  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
2. CONTROLLING DIMENSION:  
MILLIMETER.  
20X K REF  
K
M
S
S
V
0.10 (0.004)  
T U  
S
K1  
0.15 (0.006) T U  
3. DIMENSION A DOES NOT INCLUDE  
MOLD FLASH, PROTRUSIONS OR GATE  
BURRS. MOLD FLASH OR GATE BURRS  
SHALL NOT EXCEED 0.15 (0.006) PER SIDE.  
4. DIMENSION B DOES NOT INCLUDE  
INTERLEAD FLASH OR PROTRUSION.  
INTERLEAD FLASH OR PROTRUSION  
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.  
5. DIMENSION K DOES NOT INCLUDE  
DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.08  
(0.003) TOTAL IN EXCESS OF THE K  
DIMENSION AT MAXIMUM MATERIAL  
CONDITION.  
J J1  
20  
11  
2X L/2  
B
SECTION N−N  
L
−U−  
PIN 1  
IDENT  
0.25 (0.010)  
N
1
10  
M
6. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
7. DIMENSION A AND B ARE TO BE  
S
0.15 (0.006) T U  
DETERMINED AT DATUM PLANE −W−.  
N
A
−V−  
MILLIMETERS  
INCHES  
MIN  
F
DIM MIN  
MAX  
6.60  
4.50  
1.20  
0.15  
0.75  
MAX  
0.260  
0.177  
0.047  
0.006  
0.030  
A
B
6.40  
4.30  
---  
0.252  
0.169  
---  
DETAIL E  
C
D
0.05  
0.50  
0.002  
0.020  
−W−  
C
F
G
H
0.65 BSC  
0.026 BSC  
0.27  
0.09  
0.09  
0.19  
0.19  
0.37  
0.20  
0.16  
0.30  
0.25  
0.011  
0.004  
0.004  
0.007  
0.007  
0.015  
0.008  
0.006  
0.012  
0.010  
G
D
J
H
J1  
K
DETAIL E  
0.100 (0.004)  
−T− SEATING  
K1  
L
6.40 BSC  
0.252 BSC  
0
PLANE  
M
0
8
8
_
_
_
_
SOLDERING FOOTPRINT*  
7.06  
1
0.65  
PITCH  
16X  
0.36  
16X  
1.26  
DIMENSIONS: MILLIMETERS  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
http://onsemi.com  
6
MC74HC245A  
PACKAGE DIMENSIONS  
SOIC−20  
DW SUFFIX  
CASE 751D−05  
ISSUE G  
NOTES:  
D
1. DIMENSIONS ARE IN MILLIMETERS.  
2. INTERPRET DIMENSIONS AND TOLERANCES  
PER ASME Y14.5M, 1994.  
A
q
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD  
PROTRUSION.  
20  
11  
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.  
5. DIMENSION B DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE PROTRUSION  
SHALL BE 0.13 TOTAL IN EXCESS OF B  
DIMENSION AT MAXIMUM MATERIAL  
CONDITION.  
E
B
1
10  
MILLIMETERS  
DIM MIN  
MAX  
2.65  
0.25  
0.49  
0.32  
12.95  
7.60  
A
A1  
B
C
D
E
2.35  
0.10  
0.35  
0.23  
12.65  
7.40  
20X B  
M
S
S
B
T
0.25  
A
e
1.27 BSC  
H
h
10.05  
0.25  
0.50  
0
10.55  
0.75  
0.90  
7
A
L
q
_
_
SEATING  
PLANE  
18X e  
A1  
C
T
ON Semiconductor and the  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.  
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed  
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation  
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and  
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets  
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each  
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,  
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which  
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or  
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and  
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim  
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable  
copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 800−282−9855 Toll Free  
USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
Japan Customer Focus Center  
Phone: 81−3−5817−1050  
ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada  
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
MC74HC245A/D  

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