NL17SZ240MU3TCG [ONSEMI]
Inverting 3-State Buffer;![NL17SZ240MU3TCG](http://pdffile.icpdf.com/pdf2/p00356/img/icpdf/NL17SZ240_2184389_icpdf.jpg)
型号: | NL17SZ240MU3TCG |
厂家: | ![]() |
描述: | Inverting 3-State Buffer |
文件: | 总8页 (文件大小:200K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NL17SZ240
Inverting 3-State Buffer
The NL17SZ240 is a single inverting 3−state buffer in tiny footprint
packages.
Features
• Designed for 1.65 V to 5.5 V V Operation
CC
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• 2.7 ns t at V = 5 V (typ)
PD
CC
• Inputs/Outputs Overvoltage Tolerant up to 5.5 V
MARKING
DIAGRAMS
• I
Supports Partial Power Down Protection
• Source/Sink 24 mA at 3.0 V
OFF
SC−88A (SOT−353)
DF SUFFIX
• Available in SC−88A, SC−74A, TSOP−5, SOT−553, SOT−953 and
UDFN6 Packages
XX MG
G
CASE 419A
• Chip Complexity < 100 FETs
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
SC−74A
DBV SUFFIX
CASE 318BQ
XXX MG
G
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
SOT−553
XV5 SUFFIX
CASE 463B
OE
EN
XX MG
OUT Y
IN A
G
Figure 1. Logic Symbol
SOT−953
P5 SUFFIX
CASE 527AE
X M
1
UDFN6
1.45 x 1.0
CASE 517AQ
XM
1
UDFN6
1.0 x 1.0
CASE 517BX
X M
1
XX
M
G
= Specific Device Code
= Date Code*
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
December, 2018 − Rev. 1
NL17SZ240/D
NL17SZ240
V
V
A
OE
1
CC
CC
OE
A
1
2
3
6
5
V
CC
5
5
1
A
2
GND
2
NC
Y
GND
3
OE
3
Y
Y
4
4
GND
4
SOT−953
(SC−88A/SOT−553/
SC−74A)
UDFN6
Figure 2. Pinout (Top View)
PIN ASSIGNMENT (SOT−953)
PIN ASSIGNMENT
(SC−88A/SOT−553/SC−74A)
PIN ASSIGNMENT (UDFN)
Pin
Function
Pin
Function
Pin
Function
1
OE
1
A
1
OE
2
3
4
5
A
GND
Y
2
3
4
5
GND
OE
Y
2
3
4
5
6
A
GND
Y
V
CC
V
CC
NC
V
CC
FUNCTION TABLE
Input
Output
OE
A
L
Y
H
L
L
L
H
X
H
Z
X = Don’t Care
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2
NL17SZ240
MAXIMUM RATINGS
Symbol
Characteristics
Value
Unit
V
V
CC
DC Supply Voltage
DC Input Voltage
DC Output Voltage
−0.5 to +6.5
−0.5 to +6.5
V
V
IN
Active−Mode (High or Low State)
Tri−State Mode (Note 1)
−0.5 to V + 0.5
V
CC
−0.5 to +6.5
−0.5 to +6.5
Power−Down Mode (V = 0 V)
CC
I
DC Input Diode Current
V
< GND
< GND
−50
−50
mA
mA
mA
mA
°C
IK
IN
I
DC Output Diode Current
V
OUT
OK
I
DC Output Source/Sink Current
DC Supply Current per Supply Pin or Ground Pin
Storage Temperature Range
50
OUT
I
or I
GND
STG
100
CC
T
−65 to +150
260
T
Lead Temperature, 1 mm from Case for 10 secs
Junction Temperature Under Bias
Thermal Resistance (Note 2)
°C
L
T
+150
°C
J
q
SC−88A
SC−74A
SOT−553
SOT−953
UDFN6
659
555
562
560
382
°C/W
JA
P
D
Power Dissipation in Still Air
SC−88A
SC−74A
SOT−553
SOT−953
UDFN6
190
225
222
223
327
mW
MSL
Moisture Sensitivity
Level 1
−
−
V
F
R
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
V
ESD
ESD Withstand Voltage (Note 3)
Human Body Model
Charged Device Model
2000
1000
I
Latchup Performance (Note 4)
$100
mA
Latchup
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Applicable to devices with outputs that may be tri−stated.
2. Measured with minimum pad spacing on an FR4 board, using 10mm−by−1inch, 2 ounce copper trace no air flow.
3. HBM tested to ANSI/ESDA/JEDEC JS−001−2017. CDM tested to EIA/JESD22−C101−F. JEDEC recommends that ESD qualification to
EIA/JESD22−A115−A (Machine Model) be discontinued per JEDEC/JEP172A.
4. Tested to EIA/JESD78 Class II.
RECOMMENDED OPERATING CONDITIONS
Symbol
Characteristics
Min
1.65
0
Max
5.5
Unit
V
V
CC
Positive DC Supply Voltage
DC Input Voltage
V
IN
5.5
V
V
OUT
DC Output Voltage
Active−Mode (High or Low State)
Tri−State Mode (Note 1)
0
0
0
V
CC
5.5
5.5
Power−Down Mode (V = 0 V)
CC
Operating Temperature Range
Input Rise and Fall Time
−55
+125
T
A
°C
V
= 1.65 V to 1.95 V
0
0
0
0
20
20
10
5
CC
V
V
V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
= 4.5 V to 5.5 V
CC
CC
CC
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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3
NL17SZ240
DC ELECTRICAL CHARACTERISTICS
T
= 255C
−555C 3 T 3 1255C
A
A
V
(V)
CC
Min
Typ
Max
−
Min
0.65 V
0.70 V
−
Max
Symbol
Parameter
Condition
Units
V
IH
High−Level Input
Voltage
1.65 to 1.95 0.65 V
−
−
V
CC
CC
CC
CC
2.3 to 5.5
1.65 to 1.95
2.3 to 5.5
0.70 V
−
−
−
V
Low−Level Input
−
−
−
0.35 V
0.35 V
V
V
IL
CC
CC
CC
CC
Voltage
−
0.30 V
−
0.30 V
V
OH
High−Level Output
Voltage
V
= V or V
IH IL
IN
I
= −100 mA
= −4 mA
1.65 to 5.5
1.65
2.3
V
CC
− 0.1
V
−
−
−
−
−
−
−
V − 0.1
CC
−
−
−
−
−
−
−
OH
OH
CC
I
1.29
1.4
1.29
I
= −8 mA
1.9
2.2
2.4
2.3
3.8
1.9
2.2
2.4
2.3
3.8
OH
2.1
2.4
2.7
2.5
4.0
I
= −12 mA
= −16 mA
= −24 mA
= −32 mA
2.7
OH
I
3.0
OH
I
3.0
OH
I
4.5
OH
V
OL
Low−Level Output
Voltage
V
= V or V
V
IN
IH
IL
I
= 100 mA
= 4 mA
1.65 to 5.5
1.65
2.3
−
−
−
−
−
−
−
0.1
0.24
0.3
0.4
0.4
0.55
0.55
−
−
−
−
−
−
−
0.1
0.24
0.3
0.4
0.4
0.55
0.55
OL
OL
I
0.08
0.2
0.22
0.28
0.38
0.42
I
OL
= 8 mA
OL
I
= 12 mA
= 16 mA
= 24 mA
= 32 mA
2.7
I
3.0
OL
I
3.0
OL
I
4.5
OL
I
Input Leakage Current
V
= 5.5 V or GND
1.65 to 5.5
1.65 to 5.5
−
−
−
−
0.1
0.5
−
−
1.0
5.0
mA
mA
IN
IN
I
3−State Output
Leakage Current
V
OUT
= 0 V to 5.5 V
OZ
I
Power Off Leakage
Current
V
V
= 5.5 V or
OUT
0
−
−
−
−
1.0
1.0
−
−
10
10
mA
mA
OFF
IN
= 5.5 V
I
Quiescent Supply
Current
V
IN
= V or GND
5.5
CC
CC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
AC ELECTRICAL CHARACTERISTICS (t = t = 3.0 ns)
R
F
T
= 255C
−555C 3 T 3 1255C
A
A
V
(V)
CC
Min Typ Max
Min
Max
10.5
8.0
5.5
6.0
4.8
5.3
10
Symbol
Parameter
Condition
Units
t
Propagation Delay, A to Y
(Figures 3 and 4)
1.65 to 1.95
2.3 to 2.7
3.0 to 3.6
−
−
−
−
−
−
−
−
−
−
−
−
−
−
6.0
6.0
2.5
2.9
2.0
2.3
7.6
3.6
2.8
2.0
5.0
3.3
2.7
2.6
10
7.5
5.2
5.7
4.5
5.0
9.5
8.5
6.2
5.5
10
−
ns
R = 1 MW, C = 15 pF
PLH
L
L
t
PHL
R = 1 MW, C = 15 pF
−
L
L
R = 1 MW, C = 15 pF
−
L
L
R = 500 W, C = 50 pF
−
L
L
4.5 to 5.5
−
R = 1 MW, C = 15 pF
L
L
R = 500 W, C = 50 pF
−
L
L
t
Output Enable Time,
OE to Y
1.65 to 1.95
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
−
ns
ns
PZH
PZL
t
−
9.0
6.5
5.8
10.5
8.5
6.0
5.0
(Figures 3 and 4)
−
−
t
Output Disable Time,
OE to Y
(Figures 3 and 4)
−
PHZ
t
PLZ
8.0
5.7
4.7
−
−
−
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4
NL17SZ240
CAPACITIVE CHARACTERISTICS (t = t = 3.0 ns)
R
F
Symbol
Parameter
Input Capacitance
Output Capacitance
Condition
Typical
2.5
Units
pF
C
V
V
= 5.5 V, V = 0 V or V
IN
IN
CC
CC
CC
C
= 5.5 V, V = 0 V or V
2.5
pF
OUT
CC
IN
C
Power Dissipation Capacitance
(Note 5)
10 MHz, V = 3.3 V, V = 0 V or V
9
11
pF
PD
CC
IN
CC
CC
10 MHz, V = 5.5 V, V = 0 V or V
CC
IN
5. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
PD
Average operating current can be obtained by the equation: I
) = C ꢀ V ꢀ f + I . C is used to determine the no−load dynamic
CC(OPR
PD CC in CC PD
2
power consumption; P = C ꢀ V
ꢀ f + I ꢀ V
.
D
PD
CC
in
CC
CC
OPEN
Test
Switch
C , pF
L
R , W R , W
L 1
2 x V
DUT
GND
Position
CC
t
/ t
Open
See AC Characteristics Table
PLH PHL
R
R
1
L
t
/ t
2 x V
50
50
500
500
500
500
PLZ PZL
CC
t
/ t
GND
OUTPUT
PHZ PZH
X = Don’t Care
R
T
C *
L
C includes probe and jig capacitance
L
R is Z
of pulse generator (typically 50 W)
T
OUT
f = 1 MHz
Figure 3. Test Circuit
V
CC
t = 3 ns
r
t = 3 ns
f
V
CC
90%
90%
INPUT
V
mi
V
mi
V
mi
V
mi
INPUT
GND
~V
10%
10%
GND
t
t
PLZ
PZL
t
t
PLH
PHL
CC
V
OH
V
OUTPUT
OUTPUT
mo
V
V
V
V
OUTPUT
OUTPUT
mo
mo
V
OL
+ V
OL
Y
V
V
V
OL
t
t
PHZ
PZH
t
t
PLH
PHL
V
OH
Y
OH
V
OH
− V
V
mo
mo
mo
V
OL
~0 V
Figure 4. Switching Waveforms
V , V
mo
t
, t
t
, t , t , t
PZL PLZ PZH PHZ
V
CC
, V
V
mi
, V
V , V
Y
PLH PHL
1.65 to 1.95
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
V
CC
V
CC
V
CC
V
CC
/2
/2
/2
/2
(V − V )/2
V
CC
V
CC
V
CC
V
CC
/2
/2
/2
/2
0.15
0.15
0.3
OH
OL
(V − V )/2
OH
OL
(V − V )/2
OH
OL
(V − V )/2
0.3
OH
OL
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5
NL17SZ240
DEVICE ORDERING INFORMATION
Pin 1 Orientation
(See below)
†
Device
Packages
Marking
U7
Shipping
NL17SZ240DFT2G
SC−88A
SC−88A
Q4
Q2
3000 / Tape & Reel
3000 / Tape & Reel
NLV17SZ240DFT1G*
(In Development)
U7
NLV17SZ240DFT2G*
(In Development)
SC−88A
SC−74A
U7
Q4
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
4000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
NL17SZ240DBVT1G
(In Development)
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
NL17SZ240XV5T2G
(In Development)
SOT−553
NL17SZ240P5T5G
(In Development)
SOT−953
NL17SZ240MU1TCG
(In Development)
UDFN6, 1.45 x 1.0 x 0.35P
UDFN6, 1.0 x 1.0 x 0.35P
NL17SZ240MU3TCG
(In Development)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
Pin 1 Orientation in Tape and Reel
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−88A (SC−70−5/SOT−353)
CASE 419A−02
ISSUE L
SCALE 2:1
DATE 17 JAN 2013
A
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
G
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5
4
3
−B−
S
INCHES
DIM MIN MAX
MILLIMETERS
MIN
1.80
1.15
0.80
0.10
MAX
2.20
1.35
1.10
0.30
1
2
A
B
C
D
G
H
J
0.071
0.045
0.031
0.004
0.087
0.053
0.043
0.012
0.026 BSC
0.65 BSC
M
M
B
D 5 PL
0.2 (0.008)
---
0.004
0.004
0.004
0.010
0.012
---
0.10
0.10
0.10
0.25
0.30
N
K
N
S
0.008 REF
0.20 REF
0.079
0.087
2.00
2.20
J
C
GENERIC MARKING
DIAGRAM*
K
H
XXXMG
SOLDER FOOTPRINT
0.50
G
0.0197
XXX = Specific Device Code
M
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
0.65
0.025
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
0.65
0.025
0.40
0.0157
1.9
0.0748
mm
inches
ǒ
Ǔ
SCALE 20:1
STYLE 3:
STYLE 1:
PIN 1. BASE
STYLE 2:
STYLE 4:
STYLE 5:
PIN 1. ANODE
2. EMITTER
3. BASE
PIN 1. ANODE 1
2. N/C
PIN 1. SOURCE 1
2. DRAIN 1/2
3. SOURCE 1
4. GATE 1
PIN 1. CATHODE
2. COMMON ANODE
3. CATHODE 2
2. EMITTER
3. BASE
4. COLLECTOR
5. COLLECTOR
3. ANODE 2
4. CATHODE 2
5. CATHODE 1
4. COLLECTOR
5. CATHODE
4. CATHODE 3
5. CATHODE 4
5. GATE 2
STYLE 9:
STYLE 6:
PIN 1. EMITTER 2
2. BASE 2
STYLE 7:
STYLE 8:
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
PIN 1. ANODE
2. CATHODE
3. ANODE
4. ANODE
5. ANODE
PIN 1. BASE
2. EMITTER
3. BASE
PIN 1. CATHODE
2. COLLECTOR
3. N/C
3. EMITTER 1
4. COLLECTOR
5. COLLECTOR 2/BASE 1
4. COLLECTOR
5. COLLECTOR
4. BASE
5. EMITTER
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42984B
SC−88A (SC−70−5/SOT−353)
PAGE 1 OF 1
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
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