NDS332P [ONSEMI]
P 沟道逻辑电平增强型场效应晶体管,-20V,-1A,0.41Ω;型号: | NDS332P |
厂家: | ONSEMI |
描述: | P 沟道逻辑电平增强型场效应晶体管,-20V,-1A,0.41Ω PC 开关 光电二极管 晶体管 场效应晶体管 |
文件: | 总8页 (文件大小:450K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application
by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized
for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for
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subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
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Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others.
NDS332P
P-Channel Logic Level Enhancement Mode Field Effect Transistor
Features
General Description
-1 A, -20 V, RDS(ON) = 0.41 W @ VGS= -2.7 V
These P-Channel logic level enhancement mode power field
RDS(ON) = 0.3 W @ VGS = -4.5 V.
effect transistors are produced using ON Semiconductor's
proprietary, high cell density, DMOS technology. This very high
density process is especially tailored to minimize on-state
resistance. These devices are particularly suited for low
voltage applications such as notebook computer power
management, portable electronics, and other battery
powered circuits where fast high-side switching, and low
in-line power loss are needed in a very small outline surface
mount package.
Very low level gate drive requirements allowing direct
operation in 3V circuits. VGS(th) < 1.0V.
Proprietary package design using copper lead frame for
superior thermal and electrical capabilities.
High density cell design for extremely low RDS(ON)
.
Exceptional on-resistance and maximum DC current
capability.
Compact industry standard SOT-23 surface Mount
package.
________________________________________________________________________________
D
S
G
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter
NDS332P
-20
Units
VDSS
VGSS
ID
Drain-Source Voltage
V
V
A
Gate-Source Voltage - Continuous
±8
Drain Current - Continuous
- Pulsed
(Note 1a)
(Note 1a)
-1
-10
Maximum Power Dissipation
0.5
W
PD
(Note 1b)
0.46
Operating and Storage Temperature Range
-55 to 150
°C
TJ,TSTG
THERMAL CHARACTERISTICS
RqJA
RqJC
Thermal Resistance, Junction-to-Ambient (Note 1a)
Thermal Resistance, Junction-to-Case
250
75
°C/W
°C/W
(Note 1)
© 1997 Semiconductor Components Industries, LLC.
September-2017, Rev. 5
Publication Order Number:
NDS332P/D
Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BVDSS
IDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = -250 µA
VDS = -16 V, VGS = 0 V
-20
V
Zero Gate Voltage Drain Current
-1
µA
-10
µA
nA
nA
TJ = 55°C
IGSS
IGSS
VGS = 8 V, VDS= 0 V
VGS = -8 V, VDS= 0 V
100
-100
Gate - Body Leakage Current
Gate - Body Leakage Current
ON CHARACTERISTICS (Note 2)
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = -250 µA
VGS = -2.7 V, ID = -1 A
-0.4
-0.3
-0.6
-0.45
0.35
-1
V
-0.8
0.41
TJ =125°C
TJ =125°C
Static Drain-Source On-Resistance
RDS(ON)
W
0.5
0.74
0.3
VGS = -4.5 V, ID = -1.1 A
VGS = -2.7 V, VDS = -5 V
VGS = -4.5 V, VDS = -5 V
VDS = -5 V, ID= -1 A
0.26
ID(ON)
On-State Drain Current
-1.5
-2.5
A
2.2
gF
Forward Transconductance
S
S
DYNAMIC CHARACTERISTICS
Input Capacitance
195
105
40
pF
pF
pF
Ciss
Coss
Crss
VDS = -10 V, VGS = 0 V,
f = 1.0 MHz
Output Capacitance
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 2)
tD(on)
tr
tD(off)
tf
Turn - On Delay Time
Turn - On Rise Time
Turn - Off Delay Time
Turn - Off Fall Time
Total Gate Charge
VDD = -6 V, ID = -1 A,
8
15
45
45
45
5
ns
ns
ns
ns
nC
VGS = -4.5 V, RGEN = 6 W
30
25
27
3.7
Qg
VDS = -5 V, ID = -1 A,
VGS = -4.5 V
Qgs
Qgd
Gate-Source Charge
Gate-Drain Charge
0.5
0.9
nC
nC
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2
Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol Parameter Conditions
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
Min
Typ
Max
Units
IS
Maximum Continuous Source Current
Drain-Source Diode Forward Voltage
-0.42
-1.2
A
V
-0.75
VSD
VGS = 0 V, IS = -0.42 A (Note 2)
Notes:
1. RqJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RqJC is guaranteed by
design while RqCA is determined by the user's board design.
T
R
- T
T
- T
J
J
A
A
( )
PD t =
2 ( )
= ID t ´ RDS(ON)@T
=
J
( )
+
( )
t
t
R
R
qJA
qJC
qCA
Typical RqJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
a. 250oC/W when mounted on a 0.02 in2 pad of 2oz copper.
b. 270oC/W when mounted on a 0.001 in2 pad of 2oz copper.
1a
1b
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
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3
Typical Electrical Characteristics
1.8
1.6
1.4
1.2
1
-2.5
VGS = -4.5V
-2.5
-3.5
-2
-1.5
-1
-3.0
-2.7
-2.0
VGS =-2.0V
-2.5
-2.7
-3.0
-3.5
0.8
0.6
0.4
-1.5
-2.5
-4.5
-0.5
0
0
-0.5
-1
-1.5
-2
-2.5
-3
0
-0.5
-1
-1.5
-2
-3
I
, DRAIN CURRENT (A)
V
, DRAIN-SOURCE VOLTAGE (V)
D
DS
Figure 2. On-Resistance Variation
with Drain Current and Gate Voltage.
Figure 1. On-Region Characteristics.
1.8
1.8
1.6
1.4
1.2
1
ID = -1A
VGS = -2.7 V
T = 125°C
J
1.6
1.4
1.2
1
VGS = -2.7
25°C
0.8
0.6
0.4
0.8
0.6
0.4
-55°C
-50
-25
0
T
25
50
75
100
125
150
0
-0.5
-1
-1.5
-2
-2.5
-3
, JUNCTION TEMPERATURE (°C)
I
, DRAIN CURRENT (A)
D
J
Figure 4. On-Resistance Variation
Figure 3. On-Resistance Variation
with Drain Current and Temperature.
with Temperature.
-1.5
-1.2
-0.9
-0.6
-0.3
0
1.15
1.1
25°C
125°C
VDS = - 3V
VDS
= VGS
T
= -55°C
J
I
= -250µA
D
1.05
1
0.95
0.9
0.85
0.8
-50
-0.5
-0.75
-1
-1.25
-1.5
-1.75
-2
-25
0
T
25
50
75
100
125
150
V
, GATE TO SOURCE VOLTAGE (V)
, JUNCTION TEMPERATURE (°C)
J
GS
Figure 5. Transfer Characteristics.
Figure 6. Gate Threshold Variation
with Temperature.
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4
Typical Electrical Characteristics (continued)
1
1.12
VGS =0V
I
= -250µA
D
1.08
1.04
1
0.1
0.05
T
= 125°C
J
0.01
0.001
25°C
-55°C
0.96
0.92
0.0001
-50
-25
0
25
50
75
100
125
150
0
0.2
-V
0.4
0.6
0.8
1
T
, JUNCTION TEMPERATURE (°C)
J
, BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 8. Body Diode ForwardVoltageVariation with
Figure 7. Breakdown Voltage Variation with
Source Current and Temperature.
Temperature.
500
300
5
VDS = -5V
ID = -1A
-10V
4
-15V
C
200
100
50
iss
3
C
oss
2
1
0
C
rss
f = 1 MHz
VGS = 0V
30
20
0
1
2
3
4
5
0.1
0.2
0.5
1
2
5
10
20
-V , DRAIN TO SOURCE VOLTAGE (V)
Q
, GATE CHARGE (nC)
g
DS
Figure 9. Capacitance Characteristics.
Figure 10. Gate Charge Characteristics.
ton
toff
VDD
td(off)
t d(on)
tr
tf
90%
RL
90%
VIN
D
VOUT
V
OUT
10%
10%
90%
VGS
RGEN
DUT
G
V
50%
50%
IN
S
10%
INVERTED
PULSE WIDTH
Figure 11. Switching Test Circuit.
Figure 12. Switching Waveforms.
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5
Typical Electrical Characteristics (continued)
20
10
5
4
VDS =- 5V
T = -55°C
J
3
2
1
25°C
0.5
125°C
2
1
0
VGS = -2.7V
SINGLE PULSE
0.1
R JA = See Note 1b
q
0.03
0.01
TA = 25°C
0.1
0.2
0.5
1
2
5
10
20
50
0
-0.5
-1
I
-1.5
-2
-2.5
-3
-V , DRAIN-SOURCE VOLTAGE (V)
, DRAIN CURRENT (A)
DS
D
Figure 13. Transconductance Variation with
Figure 14. Maximum Safe Operating Area.
Drain Current and Temperature.
1.4
1.2
1
0.8
0.6
0.4
0.2
0
1a
1
1b
1b
1a
4.5"x5" FR-4 Board
TA = 25 o
Still Air
0.8
0.6
C
4.5"x5" FR-4 Board
TA = 25o
Still Air
C
VGS = -2.7V
0
0.1
0.2
0.3
0.4
0
0.1
0.2
0.3
2
0.4
2
2oz COPPER MOUNTING PAD AREA (in
)
2oz COPPER MOUNTING PAD AREA (in )
Figue 15. SuperSOTTM _ 3 Maximum
Steady-State Power Dissipation versus
Copper Mounting Pad Area.
Figure 16. Maximum Steady-State Drain
Current versus Copper Mounting Pad Area.
1
D = 0.5
0.5
0.2
R
(t) = r(t) * R
JA
q
JA
q
0.2
0.1
R
=
See Note 1b
qJA
0.1
0.05
0.05
P(pk)
0.02
0.01
0.02
0.01
t
1
t
2
Single Pulse
T - T = P * R
(t)
JA
q
J
A
0.005
Duty Cycle, D = t /t
1
2
0.002
0.001
0.0001
0.001
0.01
0.1
t , TIME (sec)
1
10
100
300
1
Figure 17. Transient Thermal Response Curve.
Note : Characterization performed using the conditions described in note 1b. Transient thermal response will
change depending on the circuit board design.
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6
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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