NCV7692D10R2G [ONSEMI]
Current Controller for Automotive LED Lamps;
| 型号： | NCV7692D10R2G |
| 厂家： | 
ONSEMI |
| 描述： | Current Controller for Automotive LED Lamps |
| 文件： | 总18页 (文件大小：233K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCV7692
Current Controller for
Automotive LED Lamps
The NCV7692 is a device which uses an external NPN bipolar
device combined with feedback resistor(s) to regulate a current for use
in driving LEDs. The target application for this device is automotive
rear combination lamps. A single driver gives the user flexibility to
add single channels to multichannel systems. A dedicated dimming
feature is included via the PWM input pin. The individual driver is
turned off when an open load or short circuit is detected.
LED brightness levels are easily programmed using an external
resistor in series with the bipolar transistor. The use of the resistor
gives the user the flexibility to use the device over a wide range of
currents. Multiple strings of LEDs can be operated with a single
NCV7692 device. Set back power limit reduces the drive current
during overvoltage conditions.
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1
SOIC−8
CASE 751AZ
MARKING DIAGRAM
8
The device is available in a SOIC−8 package.
NCV7692
ALYW
Features
G
• Constant Current Output for LED String Drive
1
• External Bipolar Device for Wide Current Range Flexibility
♦ With BCP56 Transistor, Can Drive Multiple Strings Concurrently
(ref. Datasheet Info)
IC (Pb−Free)
NCV7692 = Specific Device Code
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
• External Programming Current Resistor
• Pulse Width Modulation (PWM) Control
• Negative Temperature Coefficient Current Control Option
• Open LED String Diagnostic
• Short−Circuit LED String Diagnostic
• Multiple LED String Control
• Overvoltage Set Back Power Limitation
• SOIC−8 Package
• AEC−Q100 Qualified and PPAP Capable
• These are Pb−Free Devices
PINOUT DIAGRAM
VS
PWM BASE
FLTS FB
NTC GND
SC
Applications
• Rear Combination Lamps (RCL)
• Daytime Running Lights (DRL)
• Fog Lights
• Center High Mounted Stop Lamps (CHMSL) Arrays
• Turn Signal and Other Externally Modulated Applications
• General Automotive Linear Current LED Driver
ORDERING INFORMATION
†
Device
NCV7692D10R2G
Package
Shipping
SOIC−8
3000 /
(Pb−Free)
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
April, 2018 − Rev. 0
NCV7692/D
NCV7692
VS
Short Circuit Sense Interface
Base Drive
SC
BASE
FB
Feedback Circuit
GND
Reference “Short Circuit Detection with 4 or more channels” Figure for circuit details
Figure 1. Application Diagram
VBAT
14 V
C1
0.1 μF
NCV7692
R2
10 kΩ
R3
10 kΩ
VS
PWM BASE
SC
BCP56
PWM
Control
Logic
FLTS
NTC
FB
C2
0.1 μF
R1
1 Ω
GND
Figure 2. Microprocessor Controlled Application Diagram
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NCV7692
Thermal
Short-Circuit Detection
Monitoring
+
-
SC
Supply
Monitoring
2 V
VDD
VS
Ref
VS
VDD
Slew
Rate
BASE
PWM
1k
Control
Current
Limitation
Protection
120k
-
-
FB
+
1.15V
+
-
FLTS
NTC
VREF/2 or
NTC/20
+
TSD
Reference
selection
Open Load
Detection
0.4 V to 2.1 V
152 mV
NTC / 10
GND
Figure 3. Block Diagram
PIN FUNCTION DESCRIPTION
Pin #
Symbol
VS
Description
1
2
3
4
Automotive Battery input voltage
Logic input for output on/off control. Pull high for output on.
PWM
FLTS
NTC
A capacitor to ground sets the time for open circuit, short circuit, and overtemperature detection.
Optional input for Negative Temperature Coefficient performance.
Ground this pin if Negative Temperature Coefficient is not used.
5
6
7
8
GND
FB
Ground
Feedback pin for current regulation
Base Drive for external transistor (16 mA [min])
LED Short Circuit Detection Input. Ground pin if not used.
BASE
SC
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NCV7692
MAXIMUM RATINGS
(Voltages are with respect to GND, unless otherwise specified)
Rating
Symbol
Value
Unit
Supply Voltage (VS)
DC
V
S
V
−0.3 to 50
50
Peak Transient
High Voltage Pins (PWM, SC)
Low Voltage Pins (FB, NTC)
Low Voltage Pin (BASE)
V
−0.3 to (VS + 0.3)
−0.3 to 3.6
V
V
V
HV
V
LV
V
BASE
−0.3 to 3.6 or VS + 0.6,
whichever is lower
Fault Input / Output (FLTS)
V
FLTS
−0.3 to (VS + 0.3)
*Internally limited
charge voltage
V
Junction Temperature, T
T
−40 to +150
260 peak
°C
°C
J
J
Peak Reflow Soldering Temperature: Pb−Free, 60 to 150 seconds at 217°C
(Note 1)
T
P
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. For additional information, please see or download the ON Semiconductor Soldering and Mounting Techniques Reference Manual,
SOLDERRM/D and Application Note AND8003/D.
ATTRIBUTES
Characteristic
Symbol
Value
Value
ESD Capability (Note 2)
Human Body Model
HBM
MM
≥
≥
≥
4.0
150
1.0
kV
V
Machine Model
Charge Device Model
CDM
kV
Moisture Sensitivity
Storage Temperature
MSL
2
−
T
S
−55 to +150
°C
Package Thermal Resistance − SOIC−8 (Note 3)
Junction–to–Board
R
129
179
100
°C/W
°C/W
°C/W
Y
JB
Junction–to–Ambient
R
q
JA
Junction–to–Lead, R
R
JL
Y
JL
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latch up current maximum rating: ≥150 mA per JEDEC starndard: JESD78.
3. Values represent typical still air steady−state thermal performance on 1 oz. copper FR4 PCB with 650 mm copper area.
2
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NCV7692
ELECTRICAL CHARACTERISTICS
(4.5 V < VS < 18 V, C
= 0.1 mF, R1 = 1 W, Transistor NPN = BCP56, −40°C ≤ T ≤ 150°C, unless otherwise specified) (Note 4)
FLTS
J
Characteristic
General Parameters
Conditions
Min
Typ
Max
Unit
Supply Current in normal condition
VS = 14 V, PWM = High, Base Current subtracted
VS = 14 V, PWM = 0
−
−
−
3.0
1.6
1.8
4.0
2.5
2.8
mA
mA
mA
Supply Current in fault condition
VS = 14 V, PWM = High
V
FLTS
≥ FLTS Clamp (5.0 V typ.)
Under Voltage Lockout
Under Voltage Lockout Hysteresis
Thermal Shutdown
VS rising
3.5
−
4.0
200
170
15
4.5
−
V
mV
°C
°C
ms
(Note 5)
(Note 5)
(Note 5)
150
−
190
−
Thermal Hysteresis
Thermal Shutdown Delay
Base Current Drive
10
23
36
Output Source Current
Output Pull−Down Resistance
Unity Gain Bandwidth
Amplifier Trans−conductance
Programming
BASE = 1 V, FB = 0 V
16
0.5
−
25
1
30
2
mA
kW
PWM = 0 V, BASE = 1 V, FB = 0 V
100
30
−
kHz
−
−
mA/mV
FB Regulation Voltage
Under Voltage Lockout < VS < Over Voltage Fold
Back Threshold 1
mV
142
54
152
76
162
100
50
VS > Over Voltage Fold Back Threshold 1
VS > Over Voltage Fold Back Threshold 2
25
38
VS Overvoltage Fold Back Threshold 1 (Note 6)
18.5
−
19.5
700
20.5
−
V
VS Overvoltage Fold Back Threshold 1
Hysteresis
mV
VS Overvoltage Fold Back Threshold 2 (Note 6)
29.8
−
31.4
700
33.0
−
V
VS Overvoltage Fold Back Threshold 2
Hysteresis
mV
Open Load Timing
VS Open Load Disable Threshold
VS rising
VS falling
4.85
4.70
5.10
4.95
5.35
5.20
V
V
FLTS Charge Current
PWM = 5 V, FB = 0 V, VS = 14 V
1
2
3
mA
kW
V
FLTS Pull Down Resistor
400
1.00
600
1.15
800
1.30
FLTS Threshold
(Output Deactivation Threshold)
FLTS Clamp
VS = 18 V, (Note 7) PWM = 5 V, Charge Current
activated (Above this clamp voltage Charge current
rolls off to 0)
4
5
6
V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Designed to meet these characteristics over the stated voltage and temperature recommended operating ranges, though may not be 100%
parametrically tested in production.
5. Guaranteed by design.
6. VS can operate up to 45 V in fold back condition.
7. Device tested at 18 V. Upper limit of 6 V applies across the VS input supply range, but the maximum rating for FLTS (−0.3V to VS to −0.3V)
must be considered for all system designs especially at the minimum extreme of VS = 4.5 V.
8. NTC = 400 mV is > NTC detection level and is a higher impedance than when operating within the detection level.
9. Evaluated at VS = 14V, NTC grounded or 1.6 V, 1 W sense resistor.
10.Evaluated at VS = 14V, 1.0 V ≤ NTC ≤ 2.1 V, 1 W sense resistor
Guaranteed by design at VS = 14V, 0.4 V ≤ NTC ≤ 1.0 V, 1 W sense resistor.
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NCV7692
ELECTRICAL CHARACTERISTICS
(4.5 V < VS < 18 V, C
= 0.1 mF, R1 = 1 W, Transistor NPN = BCP56, −40°C ≤ T ≤ 150°C, unless otherwise specified) (Note 4)
FLTS
J
Characteristic
Short Circuit
Conditions
Min
Typ
Max
Unit
Short Circuit Detection Threshold
Short Circuit Output Current
PWM
VS − 1.7
−
VS − 2
8
VS − 2.3
16
V
Current out of the SC pin
mA
Input High Threshold
Input Low Threshold
−
0.7
−
−
−
2.2
−
V
V
Hysteresis
0.35
120
−
V
Input Pull−down Resistor
Temperature Compensation
NTC Attenuation
50
190
kW
0.4 V < NTC < 2.1 V
−
1/10
−
Regulation Offset (referenced to FB)
NTC = 1.6 mV Typ, 0.4 V < NTC < 2.1 V, VS = 14 V
−2
−7
−
−
+2
+7
%
mV
NTC Input Pull−down Resistor
NTC = 150 mV (low impedance)
NTC = 400 mV (high impedance) (Note 8)
15
22
1
31
kW
MW
NTC Detection Level
AC Characteristics
LED Current rise time
LED Current fall time
Propagation Delay
170
220
300
mV
10% / 90% criterion, PWM rising (Note 9)
90% / 10% criterion, PWM falling (Note 9)
50% criterion (Note 9)
0.25
0.25
−
1.0
1.4
1.0
1.5
2.0
2.2
ms
ms
ms
PWM rising to Iout
B/T
Propagation Delay
50% criterion (Note 9)
−
1.0
1.8
ms
PWM falling to Iout
B/T
PWM Propagation Delay Delta
LED Current rise time
LED Current fall time
Propagation Delay
|(Falling time) − (Rising time)| (Note 9)
10% / 90% criterion, PWM rising (Note 10)
90% / 10% criterion, PWM falling (Note 10)
50% criterion (Note 10)
−
0.3
1.2
2.0
1.5
1.0
1.8
3.2
4.2
ms
ms
ms
ms
0.25
0.25
−
PWM rising to Iout
B/T
Propagation Delay
50% criterion (Note 10)
−
1.0
3.4
ms
PWM falling to Iout
B/T
PWM Propagation Delay Delta
Delay Time VS to BASE
|(Falling time) − (Rising time)| (Note 10)
−
−
1.2
4
3.4
9
ms
ms
VS rising through UVLO to BASE going high
through 0.5 V
C
= 50 pF, R
= 680 W
BASE
BASE
PWM = VS, SC = floating, FB = GND, NTC = GND
Open Load Blanking Delay
Short Circuit Blanking Time
Power−Up Blanking Time
FLTS capacitor charge time not included
25
10
10
42
23
23
70
36
36
ms
ms
ms
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Designed to meet these characteristics over the stated voltage and temperature recommended operating ranges, though may not be 100%
parametrically tested in production.
5. Guaranteed by design.
6. VS can operate up to 45 V in fold back condition.
7. Device tested at 18 V. Upper limit of 6 V applies across the VS input supply range, but the maximum rating for FLTS (−0.3V to VS to −0.3V)
must be considered for all system designs especially at the minimum extreme of VS = 4.5 V.
8. NTC = 400 mV is > NTC detection level and is a higher impedance than when operating within the detection level.
9. Evaluated at VS = 14V, NTC grounded or 1.6 V, 1 W sense resistor.
10.Evaluated at VS = 14V, 1.0 V ≤ NTC ≤ 2.1 V, 1 W sense resistor
Guaranteed by design at VS = 14V, 0.4 V ≤ NTC ≤ 1.0 V, 1 W sense resistor.
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NCV7692
APPLICATIONS INFORMATION
Output Drive
Detailed Operating Description
The NCV7692 device provides low−side current drive via
an external bipolar transistor. The low voltage (152 mV)
current sense threshold allows for maximum dropout
voltage in the system. Dimming is performed using the
dedicated PWM pin on the IC. Average output current is
directly related to the intensity of the LED (or LED string).
Figure 4 shows the typical output drive configuration. A
feedback loop regulates the current through the external
LED. U1 monitors the voltage across the external sense
resistor (R1). When the voltage exceeds the 152 mV
reference, the output of U1 goes from high to low sending
a signal the buffer (U2) decreasing the base drive to the
external transistor (BCP56). For loads above 150 mA, a
PZT651device (replacing the BCP56) is recommended for
stable operation.
VBAT
NCV7692
U2
BASE
BCP56
FB
-
+
R1
1 Ω
U1
152 mV
GND
Figure 4. Output Drive Configuration
FLTS Reporting
FLTS reports three fault conditions (by going high) all of
which force the output off.
Latched off conditions can be reinitiated by a toggle of the
PWM pin or a power down of the supply (VS).
• Open Circuit (latched)
• Thermal Shutdown (thermal hysteresis)
• Short Circuit (latched)
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NCV7692
Open Load Detection
If the open load feature is not used, FLTS should be tied
to GND. Grounding FLTS disables open load detection.
Short circuit detection and thermal shutdown functions
remain active but are not reported externally. The BASE pin
is actively held low in this case.
Faulted output strings due to open load conditions
sometimes require the complete shutdown of illumination
within an automotive rear lighting system. The NCV7692
provides that feature option.
There are two open load detections schemes in the
NCV7692. These are OR’d conditions.
VBAT
1. In normal regulation, the IC monitors the FB
voltage (typ 152 mV). When this voltage falls by
50% (to typ 76 mV), an open circuit is detected
and a current starts to charge FLTS to flag open
load, once FLTS voltage crosses the output
deactivation threshold the driver is switched off
resulting in a latched off−state. When regulating
via the NTC pin, the open load detection threshold
is V(NTC)/20.
2. During open load, the base current increases to try
and satisfy the regulation loop. Internal circuitry
monitors the base current. When the Base Current
Drive reaches the Output Source Current (typ 25
mA) threshold, an open circuit is flagged and the
driver is latched off.
NCV7692
VS Open
VS
Load Disable
VS
Monitoring
Output
Drive
U2
FLTS Clamp
5 V
BASE
FB
Over-
current
detect
BCP56
FLTS
Charge
Current
2mA
Blanking
Timer
(42 μs)
R1
1 Ω
FLTS
U1
-
GND
+
C2
100nF
600 kΩ
Two schemes are used should the rise in base
current create a regulated voltage on the feedback
pin (FB). If this occurs scheme #1 would not
detect the open load.
Output Deactivation
Threshold 1.15 V
Open load can be disabled by connecting FLTS to GND.
When an open load is detected, the output turns off, and
can be turned back on again by a toggle of the PWM pin or
a power down of the supply (VS).
Figure 5. Open Load Detection Circuitry
Table 1. OPEN LOAD DETECTION
Open Load
(VS > Open Load Disable Threshold)
FLTS
BASE
No Open Load
Normal Operation
(with FLTS capacitor)
(held low)
regulation
No Open Load
Grounded
regulation
FB ≤ 1/2 regulation
(with FLTS capacitor)
FLTS starts charging
Held low via internal pull−down
resistor after time−out.
BASE Current > 25 mA [typ]
(with FLTS capacitor)
FLTS starts charging
Held low via internal pull−down
resistor after time−out.
FB ≤ 1/2 regulation
Grounded
Grounded
regulation
regulation
BASE Current > 25 mA [typ]
Multiple String Open Load Consideration
In multi−string applications with high−beta transistors,
the feedback voltage from individual strings is averaged, so
one defective LED string does not always lead to the open
load detection.
One of the ways to improve the open load detection
capability is more precise external BASE current limitation.
An example of the circuit with one extra resistor and PNP
bipolar is shown in Figure 6.
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NCV7692
back to the microprocessor regardless of which channel it
occurs on. Note the NCV7692 device uses a feature which
allows any channel to charge the FLTS capacitor due to its
definition at a charge current value much higher than the
discharge value (2 mA versus 600 kW [typ]). Additional
NCV7692 Single Current Controller devices device may
share the same common FLTS capacitors in systems
requiring multiple ICs.
BCP56
~9.3mA
BCP56
14mV
~0.1mA
45mV
1R5
~10mA
max.
NCV 7692
30mA
1R5
SC
BASE
FB
9.3mA
47R
NCV7692
FLTS Clamp5 V
29.5mV
V(FB) < 76 mV −>
−> FLTS current source active −>
−> LEDs off
to microprocessor
FLTS Charge
Current
2mA
GND
BC856
Figure 6. Improved Open Load Detection
for Multiple Strings
FLTS
GND
U1
System Voltage and Overvoltage Fold−back
-
Low voltage system operation is typically limited by head
room in the LED string. Because of this limitation, detection
of open loads is inactive below VS = typ 5.1 V (Open Load
Disable voltage). There is also an upper limitation. The
current roll off feature of the part resets the loop at a lower
reference voltage and consequential lower current for VS
above the Overvoltage Fold−back threshold on VS, (typ
19.5 V). The open load Detection circuitry is inactive for VS
above this Overvoltage Fold−back threshold voltage.
C2
100nF
+
600 kΩ
Output
Deactivation
Threshold
1.15 V
Figure 7. Open Drain Output Interface to
Microprocessor
FLTS
NCV7692
Open Load Timing
The timing for open load detection is programmed using
the FLTS pin. The NCV7692 device regulates a 152 mV
reference point (Figure 5 on the feedback pin (FB)). When
the voltage decreases (half of the FB Regulation Voltage) or
the base current reaches the internal 25 mA (typ) limit for
42 ms the timer associated with the FLTS pin starts by
charging the capacitor with a 2 mA current source. When the
voltage on FLTS exceeds the output Deactivation Threshold
(1.15 V (typ)), the BASE pin is pulled low and is held low
by an internal pulldown resistor.
GND
NCV7692
FLTS Clamp5 V
to microprocessor
FLTS Charge
Current
2mA
A 42 ms blanking time during power up ensures there is
enough time for power−up to eliminate false open−load
detections. The slow FLTS discharge (600 kW [typ]) load
(and resultant long time to restart LED drive) eliminates
flickering effects.
FLTS
U1
-
C1
100nF
+
600 kΩ
Output
FLTS Interface
Figure 7 shows an open−drain logic level FET serving as
a buffer to the microprocessor.
GND
Deactivation
Threshold
1.15 V
Note – Only one timing
capacitor and interface
Figure 8 shows the proper wired “OR” connection for
applications which require all channels to latch−off with an
open load condition. An open load condition will be reported
transistor are required for
system operation.
Figure 8. FLTS Wired OR to Microprocessor
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NCV7692
Temperature Compensation
a positive temperature coefficient. The regulation loop
voltage on NTC should be sufficiently higher than the
220 mV reference voltage to avoid interactions. A typical
regulation voltage of 1.6 V is suggested.
The overall tolerance specification for the NTC
functionality is broken down into two components.
1. Absolute error. A 2% tolerance is attributed to
the expected value as a result of internal circuitry
(most predominantly the 1/10 resistor divider).
2. Reference error. A 7mV offset mismatch in the
circuitry referenced to FB.
This provides a part capability of (V(NTC)/10) x 0.98
−7mV < V(FB) < (V(NTC)/10) x 1.02 + 7mV.
In addition to the temperature coefficient of the Zener diode
(D1), a PTC resistor (R2) can be used to enhance the effect
of the overall negative temperature coefficient. A positive
temperature coefficient resistor at the top of the resistor
divider creates a negative temperature coefficient at the
resistor divider output. Alternatively, a negative temperature
coefficient resistor for R3 would have the same effect.
The NCV7692 device typically operates with a zero TC
output current source. The NTC (Negative Temperature
Coefficient) pin provides an alternative for an output current
which degrades with temperature as defined by the
designer’s external components.
Zero TC operation is provided when the NTC pin is
connected to GND. When a negative temperature
coefficient output current is desired to compensate for
effects of external LED illumination, the setup shown in
Figure 9 will provide the function. On the NTC pin, a
comparator detects when the voltage is higher than typ
220 mV, and this voltage is used to provide the feedback
reference voltage for the current feedback regulation loop.
The zener provides a reference voltage for the negative
temperature coefficient NTC device through an external
divider. Be careful of your choice of the zener diode as the
temperature coefficients of the devices have a wide variation
with the low voltage zeners having a high negative
temperature coefficient and the high voltage zeners having
VS
VS
R1
BASE
PTC
+t0
R2
-
FB
+
NTC
D1
SZMM3Z4V7T1G
4.7V (typ)
0.4 V to 2.1V
R3
H
L
152mV
H
L
+
-
220mV
Figure 9. Negative Temperature Compensation Operation
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NCV7692
Short Circuit Detection
(S1). The comparator connected between VS and SC is
referenced to a voltage 2.0 V down from VS. A detection
voltage less than 2.0 V will toggle a signal from the
comparator to the output drive buffer turning off output
drive (BASE) to the external bipolar transistor. An initial
blanking time of 23 ms is used during turn−on of the device
to ignore false detections. This is beneficial during normal
operation and when the device is used without a
microprocessor input (PWM) interface as in Figure 10.
Switching off the Base−driver in case of SC, will also
make the FLTS charge active, indicating the error to the
microprocessor.
The short circuit (SC) pin of the device is used as an input
to detect a fault when the collector of the external bipolar
transistor is shorted to the battery voltage. The threshold
voltage detection is referenced 2.0 volts down from the VS
pin. A voltage of less than 2.0 volts between VS and SC will
latch the device off. The PWM pin must be toggled or UVLO
event must occur to reinitiate a turn−on. The detection time
for this event is swift to protect the external transistor. To
maintain operation during transient events down to 4.5 V,
the short circuit detection circuitry is inactive below
VS = typ 5.1 V. (the same Open Load Disable voltage as
used to disable Open load detection). Otherwise false short
circuit events could be falsely triggered due to
non−conduction of the external LEDs during transients.
Figure 10 shows a short circuit event modeled as a switch
When having multiple channels an isolation might be
needed to provide the appropriate voltage back to the SC pin
during short circuit. Figure 11 shows how external diodes
can provide this feature.
Short Citcuit
VBAT
14 V
SC
Short Circuit
Detection
Threshold
2V
R2
NCV7692
10 kΩ
-
Blanking
Timer
(23 μs)
VS
+
C1
100 nF
Output
Drive
FLTS Clamp
5 V
U2
to microprocessor
BASE
BCP56
FLTS Charge
Current
2mA
FB
LATCH
R1
1 Ω
FLTS
GND
C2
100 nF
600 kΩ
Short Circuit Detection is disabled below 5.1 V (typ).
Figure 10. Short Circuit Detection
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11
NCV7692
Short Circuit Detection with 4 or more Channels
Figure 12 shows an implementation which will work
provided the drop across the loads is < 3.4 V. This limitation
is due to the SC minimum specification of VS − 1.7 V. This
setup saves the user 2 diodes.
Interfacing the short circuit detection for multiple
channels with one NCV7692 driver system is done easily
using diodes or a diode resistor combination depending on
your system requirements.
Figure 11 shows the implementation using 4 individual
diodes which will work for all applications.
VBAT
14 V
D2
D1
D3
D4
Q1
Q2
Q3
Q4
I
B(Q2)
IB(Q3)
IB(Q4)
IB(Q1)
BCP56
BCP56
BCP56
BCP56
R2
10 kΩ
R3
10 kΩ
R6
10 kΩ
R7
10 kΩ
R5
1 Ω
R8
1 Ω
SC
BASE
FB
R1
1 Ω
R4
1 Ω
GND
Figure 11. Short Circuit Detection with 4 or more Channels
VBAT
14 V
R6, 680 Ω
R12, 680 Ω
R7, 680 Ω
D3
R13, 680 Ω
D1
D4
Q1
Q2
Q3
Q4
I
B(Q2)
IB(Q3)
IB(Q4)
IB(Q1)
BCP56
BCP56
BCP56
BCP56
R2
10 kΩ
R3
10 kΩ
R6
10 kΩ
R7
10 kΩ
R5
1 Ω
R8
1 Ω
SC
R1
1 Ω
R4
1 Ω
BASE
FB
GND
Figure 12. Saving Two Diodes for Short Circuit Protection
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12
NCV7692
Thermal ShutDown
Stoplight / Tail Light Application
The thermal shut down circuit checks the internal junction
temperature of the device. When the internal temperature
rises above the Thermal shutdown threshold for greater than
the thermal shutdown filter time (23 ms [typ]) the device is
switched off. The filter is implemented to achieve a clean
detection.
Switching off the Base−driver in case of TSD, will also
make the FLTS charge active, indicating the error to the
microprocessor.
Automotive applications have a need to drive the RCL
(Rear Combination Light). Combining the NCV7692 with
the NCV1455B device accomplishes that task. Figure 14
shows the interface of the two ICs using an additional diode
(D2). The STOP input signal provides a signal to the
NCV7692 which will provide a 100% duty cycle output to
the LED strings whenever STOP is high. When only TAIL
is high, a modulated duty cycle input is provided to the PWM
input and also provides power to the NCV7692 and the LED
string. The NCV1455B can provide up to 200 mA (albeit
with a 2.5 V drop at 200 mA) of output drive current.
If your application exceeds the current capability of the
NCV1455B (200mA) two extra diodes will be required as
shown in Figure 15. In this case, the current flow through the
LEDs will come from STOP and/or TAIL eliminating the
high current from the NCV1455B.
Applications
Direct Drive without direct battery connection:
Some applications may not allow for a direct connection
of VS to the battery voltage. These applications require a
connection with a smart−FET. Figure 13 highlights this
setup.
MRA4003T3G
VBAT
14 V
C3
0.1 μF
PWM
Control
NCV7692
R2
10 kΩ
C1
100 nF
R3
10 kΩ
VS
PWM BASE
FLTS
FB
NTC GND
SC
BCP56
C2
0.1 μF
R1
1 Ω
Figure 13. SmartFET Control
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13
NCV7692
D1, MRA4003T3G
D2, MRA4003T3G
STOP
(VBAT
)
C3
0.1 μF
D3, SBAV70L
TAIL
GND
D4, SBAV70L
NCV7692
R2
10 kΩ
C1
100 nF
VS
SC
BCP56
PWM BASE
NCV1455B
R3
10 kΩ
FLTS
NTC
FB
GND
TRIG
VCC
DIS
C2
0.1 μF
R1
1 Ω
GND
OUT THRES
RESET
CV
Figure 14. Stoplight / Taillight Application
D1, MRA4003T3G
D2, MRA4003T3G
STOP
(VBAT
)
C3
0.1 μF
D3, SBAV70L
D4, SBAV70L
TAIL
GND
NCV7692
R2
10 kΩ
C1
100 nF
VS
SC
BCP56
PWM BASE
NCV1455B
R3
10 kΩ
FLTS
NTC
FB
GND
TRIG
VCC
DIS
C2
0.1 μF
R1
1 Ω
GND
OUT THRES
RESET
CV
Figure 15. Stoplight / Taillight Application at higher currents
www.onsemi.com
14
NCV7692
Figure 16: Application Diagram with no microprocessor.
R1 is used to limit current in the event of an open circuit on
one of the strings.
Figure 18: Open Circuit.
It shows the change in BASE drive which occurs with an
open circuit in one of the strings. The drive current out of
BASE changes from (Ib(Q1)+ Ib(Q2)) to (Ib(Q1)+Ic(Q2))
as regulation will try to maintain in the loop to get 152 mV
on FB. Figure 19 shows the equivalent circuit when an open
load occurs.
A resistor pull−up from PWM to VS illustrates how the
device can be used as a standalone LED driver without using
a microprocessor to drive the PWM input.
Figure17 along with Figure 18 and Figure 19 highlight the
use of the NCV7692 device with multiple strings connected
to a common drive BASE pin and using external resistors to
tie additional strings to a common feedback point (FB). The
FB pin will maintain regulation with the FB pin at 152 mV.
VBAT
VBAT
C1
0.1 μF
R6, 680 Ω
R7, 680 Ω
NCV7692
R2
10 kΩ
Q1
Q2
IB(Q1)
IB(Q2)
R3
10 kΩ
BCP56
BCP56
VS
SC
BCP56
PWM BASE
R2
10 kΩ
R3
10 kΩ
FLTS
NTC
FB
C2
0.1 μF
R1
1 Ω
GND
SC
BASE
FB
R1
1 Ω
R4
1 Ω
Figure 16. Application Diagram with No
Microprocessor
(Because of the SC minimum specification
limitation of VS − 1.7 V, resistors R6 and
R7 will need to be replaced by diodes if the
drop across the load is >3.4 V)
GND
Figure 17. Driving Multiple Strings
VBAT
VBAT
R6, 680 Ω
R6, 680 Ω
R7, 680 Ω
Q1
IB(Q1)
Q1
Q2
IB(Q1)
IB(Q2)
BCP56
BCP56
BCP56
IC(Q2)
R2
10 kΩ
R3
10 kΩ
R2
10 kΩ
R3
10 kΩ
SC
BASE
FB
R1
1 Ω
R4
1 Ω
SC
R1
1 Ω
R4
1 Ω
BASE
FB
GND
(Because of the SC minimum specification
limitation of VS − 1.7 V, resistors R6 and
R7 will need to be replaced by diodes if the
drop across the load is >3.4 V)
GND
Figure 19. Open Circuit Equivalent
Figure 18. Open Circuit
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15
NCV7692
Table 2. FAULT HANDLING TABLE
Driver
Condition after
Parameters
Within
Output Fault Clear
or Operation
Restitution
Driver
Condition
During Fault
Fault
Sense
Fault
Specified
Limits
Memory
Condition
Reporting
Fault
Requirement
42 ms
Driver is latched
Off.
Open Load
(FLTS
active)
Toggle PWM pin.
VS power down
below UVLO.
Latched
off.
Driver is latched
Off.
FLTS low to
high
w / FB < Vref/2 76 mV
or I
> 25 mA
base
5.1 V < VS < 19.5 V
Open Load
(FLTS =
GND)
No
effect.
n/a
No effect.
No effect.
n/a
n/a
Short
Circuit to
Vbat (FLTS
active)
23 ms
SC < VS − 2 V
VS > 5.1 V
Toggle PWM pin.
VS power down
below UVLO.
Latched
off.
Driver is latched
Off.
Driver is latched
Off.
FLTS low to
high
Short
23 ms
SC < VS − 2 V
VS > 5.1 V
Toggle PWM pin.
VS power down
below UVLO.
Latched
off.
Driver is latched
Off.
Driver is latched
Off.
FLTS low to
high
Circuit to
Vbat (FLTS
= GND)
Under
Voltage
Lockout
Driver
Off
VS > 4 V minus
200mV hysteresis.
VS < 4 V
Driver Off
Driver back on.
n/a
n/a
Threshold 1
VS > 19.5 V
Reduced output
current
Output
Current
Reduced
Driver back to
normal
operation.
Over
Voltage
VS < threshold minus
700 mV hysteresis.
Threshold 2
VS > 31.4 V
(FB Regulation
Voltage)
Thermal
Shutdown
(FLTS
Die temperature
below shutdown
hysteresis
Driver
Off
23 ms
T > 170°C
FLTS low to
high
Driver Off
Driver Off
Driver back on.
Driver back on.
J
active)
Thermal
Shutdown
(FLTS
Die temperature
below shutdown
hysteresis
Driver
Off
23 ms
T > 170°C
FLTS low to
high
J
=GND)
NOTE: All specified voltages, currents, and times refer to typical numbers.
www.onsemi.com
16
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC−8
CASE 751AZ
ISSUE B
8
1
DATE 18 MAY 2015
SCALE 1:1
NOTES 4&5
0.10 C D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE PROTRUSION SHALL BE 0.004 mm IN EXCESS OF
MAXIMUM MATERIAL CONDITION.
455CHAMFER
D
h
NOTE 6
D
A
2X
H
8
5
4. DIMENSION D DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS
OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS
SHALL NOT EXCEED 0.006 mm PER SIDE. DIMENSION E1 DOES
NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD
FLASH OR PROTRUSION SHALL NOT EXCEED 0.010 mm PER SIDE.
5. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOT
TOM. DIMENSIONS D AND E1 ARE DETERMINED AT THE OUTER
MOST EXTREMES OF THE PLASTIC BODY AT DATUM H.
6. DIMENSIONS A AND B ARE TO BE DETERMINED AT DATUM H.
7. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE LEAD
BETWEEN 0.10 TO 0.25 FROM THE LEAD TIP.
0.10 C D
NOTES 4&5
E
E1
L2
SEATING
PLANE
L
C
DETAIL A
1
4
0.20 C D
8X b
8. A1 IS DEFINED AS THE VERTICAL DISTANCE FROM THE SEATING
PLANE TO THE LOWEST POINT ON THE PACKAGE BODY.
B
M
0.25
C A-B D
NOTE 6
MILLIMETERS
TOP VIEW
NOTES 3&7
DIM MIN
MAX
1.75
0.25
---
DETAIL A
A
A1
A2
b
---
0.10
1.25
0.31
0.10
A2
NOcTE 7
0.10 C
0.51
0.25
c
D
4.90 BSC
A
E
6.00 BSC
3.90 BSC
1.27 BSC
e
END VIEW
SEATING
PLANE
E1
e
C
A1
SIDE VIEW
NOTE 8
h
0.25
0.40
0.41
1.27
L
0.25 BSC
L2
RECOMMENDED
SOLDERING FOOTPRINT*
GENERIC
MARKING DIAGRAM*
8X
0.76
8
XXXXX
ALYWX
8X
1.52
G
1
7.00
XXXXX = Specific Device Code
A
L
= Assembly Location
= Wafer Lot
Y
W
G
= Year
= Work Week
= Pb−Free Package
1
1.27
PITCH
DIMENSIONS: MILLIMETERS
*This information is generic. Please refer
to device data sheet for actual part
marking. Pb−Free indicator, “G”, may
or not be present.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON34918E
SOIC−8
PAGE 1 OF 1
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ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
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