NCV7381CDP0R2G [ONSEMI]
FlexRay® Transceiver, Clamp 30;
| 型号： | NCV7381CDP0R2G |
| 厂家： | 
ONSEMI |
| 描述： | FlexRay® Transceiver, Clamp 30 电信 光电二极管 电信集成电路 |
| 文件： | 总27页 (文件大小：338K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCV7381C
FlexRay) Transceiver,
Clamp 30
NCV7381C is a high−temperature single−channel FlexRay
transceiver compliant with FlexRay Electrical Physical Layer
Specification Rev. 3.0.1, capable of communicating at speeds of up to
10 Mbit/s. It provides differential transmit and receive capability
between a wired FlexRay communication medium on one side and a
protocol controller and a host on the other side.
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NCV7381C mode control functionality is optimized for nodes
permanently connected to car battery.
It offers excellent EMC and ESD performance.
KEY FEATURES
General
• Compliant with FlexRay Electrical Physical Layer Specification
Rev 3.0.1
SSOP 16
CASE 565AE
• FlexRay Transmitter and Receiver in Normal−power Modes for
Communication up to 10 Mbit/s
• Support of 60 ns Bit Time
• FlexRay Low−power Mode Receiver for Remote Wakeup Detection
MARKING DIAGRAM
16
NV7381C0
FAWLYYWW
G
• Excellent Electromagnetic Susceptibility (EMS) Level over Full
Frequency Range. Very Low Electromagnetic Emissions (EME)
• Bus Pins Protected against >10 kV System ESD Pulses
1
• Safe Behavior under Missing Supply or No Supply Conditions
F
A
= Fab Location
= Assembly Location
WL = Wafer Lot
YYWW = Year / Work Week
• Interface Pins for a Protocol Controller and a Host
(TxD, RxD, TxEN, RxEN, STBN, BGE, EN, ERRN)
• INH Output for Control of External Regulators
• Local Wakeup Pin WAKE
G
= Pb−Free Package
• TxEN Timeout
• BGE Feedback
PIN CONNECTIONS
1
• Supply Pins V , V , V with Independent Voltage Ramp Up:
BAT CC
IO
INH
EN
IO
TxD
TxEN
RxD
BGE
STBN
V
CC
♦ V
Supply Parametrical Range from 5.5 V to 50 V
BP
BAT
V
BM
♦ V Supply Parametrical Range from 4.75 V to 5.25 V
CC
GND
♦ V Supply Parametrical Range from 2.3 V to 5.25 V
IO
WAKE
V
BAT
• Compatible with 14 V and 28 V Systems
ERRN
RxEN
• Operating Ambient Temperature −40°C to +150°C (T
)
AMB_Class0
• Increased Operating Junction Temperature
• Junction Temperature Monitoring with Two Levels
• SSOP−16 Package
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 24 of this data sheet.
• This Device is Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Quality
• AEC−Q100 Qualified and PPAP Capable
FlexRay Functional Classes
• Bus Driver Voltage Regulator Control
• Bus Driver – Bus Guardian Interface
• Bus Driver Logic Level Adaptation
• Bus Driver Remote Wakeup
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
May, 2019 − Rev. 0
NCV7381C/D
NCV7381C
V
IO
V
CC
V
BAT
Voltage
Thermal
Shutdown
Monitoring
TxD
TxEN
RxD
INH
CC
Module
Transmitter
RxEN
BGE
BGE
BP
Module
Bus Error
Detection
STBN
ERRN
EN
CONTROL
LOGIC
Host
Module
BM
Receiver
V
BAT
(Normal mode /
Low−power mode)
Wakeup
Detection
WAKE
NCV7381C
GND
Figure 1. Block Diagram
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2
NCV7381C
PIN FUNCTION DESCRIPTION
Pin
Pin
Number
Name
Pin Type
high−voltage analog output
digital input
Pin Function
1
2
3
4
5
6
7
INH
EN
External regulator control output
Mode control input; internal pull−down resistor
Supply voltage for digital pins level adaptation
Data to be transmitted; internal pull−down resistor
Transmitter enable input; when High transmitter disabled; internal pull−up resistor
Receive data output
V
IO
supply
TxD
TxEN
RxD
digital input
digital input
digital output
digital input
BGE
Bus guardian enable input; when Low transmitter disabled; internal pull−down
resistor
8
STBN
RxEN
ERRN
digital input
digital output
Mode control input; internal pull−down resistor
Bus activity detection output; when Low bus activity detected
Error diagnosis and status output
9
10
11
12
digital output
V
BAT
supply
Battery supply voltage
WAKE
high−voltage analog input
Local wakeup input; internal pull−up or pull−down
(depends on voltage at pin WAKE)
13
14
15
16
GND
BM
ground
Ground connection
high−voltage analog input/output
high−voltage analog input/output
supply
Bus line minus
BP
Bus line plus
V
CC
Bus driver core supply voltage; 5 V nominal
APPLICATION INFORMATION
OUT
IN
VBAT
ECU
VIO reg.
3.3V / 5 V
EN
RPP
OUT
IN
VCC reg.
5 V
CVIO CVCC
CVBAT
EN
MCU
RWAKE1
VDD
VIO VCC
INH VBAT
WAKE
WAKE
STBN
EN
ERRN
Mode Control /
Host Interface
RWAKE2
CMC
RxEN
BGE
NCV7381C
Bus Guardian
BP
BM
FR
TxD
RBUS1
RBUS2
CBUS
FlexRay CC
VSS
TxEN
RxD
GND
GND
Figure 2. Application Diagram
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3
NCV7381C
RECOMMENDED EXTERNAL COMPONENTS FOR THE APPLICATION DIAGRAM
Component
Function
Min
Typ
100
100
100
33
Max
Unit
nF
nF
nF
kW
kW
W
C
Decoupling capacitor on battery line, ceramic
VBAT
C
Decoupling capacitor on V supply line, ceramic
CC
VCC
C
Decoupling capacitor on V supply line, ceramic
VIO
IO
R
WAKE1
R
WAKE2
Pull−up resistor on WAKE pin
Serial protection resistor on WAKE pin
Bus termination resistor (Note 1)
Bus termination resistor (Note 1)
Common−mode stabilizing capacitor, ceramic (Note 2)
Common−mode choke
3.3
R
47.5
47.5
4.7
BUS1
BUS2
R
W
C
nF
mH
BUS
CMC
100
1. Tolerance 1%, type 0805
2. Tolerance 20%, type 0805
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4
NCV7381C
MAXIMUM RATINGS
Symbol
Parameter
Min
−0.3
−0.3
−0.3
−0.3
−0.3
−10
−50
−50
−50
−0.3
−10
−0.3
−40
−55
Max
50
Units
V
uV
Battery voltage power supply
5 V Supply voltage
BAT−MAX
uV
5.5
5.5
5.5
V
CC−MAX
uV
IO−MAX
Supply voltage for V voltage level adaptation
V
IO
uDigIn
DC voltage at digital inputs (BGE, EN, STBN, TxD, TxEN)
DC voltage at digital outputs (ERRN, RxD, RxEN)
V
MAX
uDigOut
V
+0.3
IO
V
MAX
IN−MAX
MAX
iDigOut
uBM
Digital output pins input current (V = 0 V)
+10
mA
V
IO
DC voltage at pin BM
50
50
50
uBP
uDiff
DC voltage at pin BP
V
MAX
Maximum DC voltage between any two pins
DC voltage at pin INH
V
MAX
uINH
V
+0.3
BAT
V
MAX
MAX
iINH
INH pin maximum load current
DC voltage at WAKE pin
−
mA
V
uWAKE
V
+0.3
BAT
MAX
J_MAX
T
Junction temperature
175
150
°C
°C
−
T
STG
Storage Temperature Range
MSL
Moisture Sensitivity Level
2
T
Lead Soldering Temperature, Reflow (Note 3)
System HBM on pins BP and BM (as per IEC 61000−4−2; 150 pF / 330 W)
−
260
+10
°C
kV
SLD
uESD
−10
IEC
Component HBM on pins BP, BM, V
and WAKE
BAT
uESD
−6
−4
+6
+4
kV
kV
EXT
(as per EIA−JESD22−A114−B; 100 pF / 1500 W)
Component HBM on all other pins
(as per EIA−JESD22−A114−B; 100 pF / 1500 W)
uESD
INT
test pulses 1
test pulses 2a
test pulses 3a
test pulses 3b
−100
−
−
+75
−
V
V
V
V
Voltage transients, pins BP, BM, V
and WAKE.
BAT
According to ISO7637−2, Class C (Note 4)
−150
−
uV
TRAN
+100
Voltage transients, pin V
.
test pulse 5
Load Dump
BAT
−
50
V
According to ISO7637−2
Overvoltage, pin V , according to ISO16750−2
Jump Start
−
50
V
BAT
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
3. For more information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D
4. Test is carried out according to setup in FlexRay Physical Layer EMC Measurement Specification, Version 3.0. This specification is referring
to ISO7637.
RECOMMENDED OPERATING RANGES
Symbol
uV
Parameter
Battery voltage power supply (Note 5)
Supply voltage 5 V
Min
5.5
4.75
2.3
0
Max
50
Units
V
BAT−OP
uV
CC−OP
5.25
5.25
V
uV
IO−OP
Supply voltage for V voltage level adaptation
V
IO
uWAKE
DC voltage at WAKE pin
V
BAT
V
OP
OP
uDigIO
uINH
DC voltage at digital pins (EN, TxD, TxEN, RxD, RxEN, BGE, STBN, ERRN)
DC voltage at pin INH
0
V
IO
V
0
V
BAT
V
OP
T
Ambient temperature (Note 6)
−40
−40
150
155
°C
°C
AMB
T
J_OP
Junction temperature
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
5. For T ≤ 130°C, full functionality is guaranteed from 5.1 V. For more details see uBDUVV
parameter.
J
BAT
6. The specified range corresponds to T
AMB_Class0
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5
NCV7381C
THERMAL CHARACTERISTICS
Symbol
Rating
Value
78
Unit
°C/W
°C/W
R
R
Thermal Resistance Junction−to−Air, JEDEC 1S0P PCB
Thermal Resistance Junction−to−Air, JEDEC 2S2P PCB
θJA_1
θJA_2
69
ELECTRICAL CHARACTERISTICS
V
BAT
= 5.5 V to 50 V, V = 4.75 V to 5.25 V, V = 2.3 V to 5.25 V, C
= 100 nF, C
= 100 nF, C = 100 nF, for typical values T
VIO A
CC
IO
VBAT
VCC
= 25°C, for min/max values T = −40°C to 155°C; unless otherwise noted. All voltages are referenced to GND (pin 13). Positive currents
J
flow into the respective pin.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
CURRENT CONSUMPTION
iV
iV
Current consumption from V
Normal−power modes
Low−power modes
−
−
−
−
0.65
−
1.25
75
mA
mA
mA
mA
BAT−NORM
BAT−LP
BAT
Sleep mode, V = V = 0 V
−
80
IO
CC
Low−power modes, V = V
−
55
IO
CC
= 0 V,
V
= 12 V, T < 85°C
J
BAT
(Note 7)
iV
iV
Current consumption from V
Normal mode – bus signals Idle
Normal mode – bus signals
5.0
10
−
−
15
37
mA
mA
CC−NORM−IDLE
CC
CC−NORM−ACTIVE
Data_0/1; R
= No Load
BUS
Normal mode − bus signals
Data_0/1; R = 40 to 55 W
25
−
72
mA
BUS
iV
iV
Receive−only mode
2.0
−
−
10
mA
CC−REC
Low−power modes, T < 85°C
(Note 7)
−
8.0
mA
CC−LP
J
iV
iV
Current consumption from V
Normal−power modes
−
−
−
−
1.0
6.0
mA
IO−NORM
IO
Low−power modes, T < 85°C
mA
IO−LP
J
(Note 7)
iTot
Total current consumption
– Sum from all supply pins
Low−power modes
−
−
−
−
100
65
mA
mA
−LP
Sleep mode, V = V = 5.0 V,
IO
CC
V
= 12 V, T < 85°C
J
BAT
(Note 7)
Sleep mode, V = V = 5.0 V,
−
−
55
mA
IO
CC
V
= 12 V, T < 25°C
J
BAT
(Note 7)
TRANSMITTER CHARACTERISTICS
uBDTx
Differential voltage |uBP − uBM|
when sending symbol “Data_0” or
“Data_1”
R
C
= 40 to 55 W;
600
0
−
−
2000
30
mV
mV
active
BUS
BUS
= 100 pF
Parameters defined in Figure 3
uBDTx
Differential voltage |uBP − uBM|
when driving signal “Idle”
Idle
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NCV7381C
ELECTRICAL CHARACTERISTICS
V
BAT
= 5.5 V to 50 V, V = 4.75 V to 5.25 V, V = 2.3 V to 5.25 V, C
= 100 nF, C
= 100 nF, C = 100 nF, for typical values T
VIO A
CC
IO
VBAT
VCC
= 25°C, for min/max values T = −40°C to 155°C; unless otherwise noted. All voltages are referenced to GND (pin 13). Positive currents
J
flow into the respective pin.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
TRANSMITTER CHARACTERISTICS
dBDTx10
Transmitter delay, negative edge
Test setup as per Figure 17
with
−
−
−
−
−
−
75
75
ns
ns
ns
dBDTx01
Transmitter delay, positive edge
R
= 40 W; C
= 100 pF
BUS
BUS
dBDTxAsym
Transmitter delay mismatch,
|dBDTx10 − dBDTx01| (Note 8)
4.0
Sum of TxD signal rise and fall
time (20% to 80% V
)
IO
of up to 9 ns
Parameters defined in Figure 3
dBusTx10
dBusTx01
dBusTxDif
Fall time of the differential bus
voltage from 80% to 20%
6.0
6.0
−
−
−
−
18.75
18.75
3.0
ns
ns
ns
Rise time of the differential bus
voltage from 20% to 80%
Differential bus voltage fall and rise
time mismatch
|dBusTx10 − dBusTx01|
dBDTxia
dBDTxai
dBDTxDM
Transmitter delay idle −> active
Transmitter delay active −> idle
Test setup as per Figure 17
with
−
−
−
−
−
−
75
75
50
ns
ns
ns
R
= 40 W; C
= 100 pF
BUS
BUS
Idle−active transmitter delay
mismatch
|dBDTxia − dBDTxai|
Parameters defined in
Figure 4
dBusTxia
dBusTxai
Transition time idle −>active
Transition time active −> idle
Time span of bus activity
−
−
−
−
−
30
30
ns
ns
ns
ms
−
dTxEN
550
650
650
2600
LOW
dBDTxActiveMax
Maximum length of transmitter
activation
iBP
iBM
Absolute maximum output current
when BP shorted to BM – no time
limit
R
≤ 1 W
−
−
60
mA
BMShortMax
ShortCircuit
BPShortMax
iBP
iBM
Absolute maximum output current
when shorted to GND – no time limit
R
R
≤ 1 W
≤ 1 W
−
−
−
−
60
60
mA
mA
GNDShortMax
ShortCircuit
ShortCircuit
GNDShortMax
iBP
Absolute maximum output current
−5VShortMax
when shorted to V
time limit
= −5 V – no
BAT
iBM
−5VShortMax
iBP
iBM
Absolute maximum output current
R
R
≤ 1 W
≤ 1 W
−
−
−
−
60
72
mA
mA
W
BAT27ShortMax
ShortCircuit
ShortCircuit
when shorted to V
– no time limit
= 27 V
BAT
BAT27ShortMax
iBP
iBM
Absolute maximum output current
BAT48ShortMax
when shorted to V
– no time limit
= 48 V
BAT
BAT48ShortMax
R
Bus interface equivalent output
impedance (Bus driver simulation
model parameter)
31
105
500
BDTransmitter
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NCV7381C
ELECTRICAL CHARACTERISTICS
V
BAT
= 5.5 V to 50 V, V = 4.75 V to 5.25 V, V = 2.3 V to 5.25 V, C
= 100 nF, C
= 100 nF, C = 100 nF, for typical values T
VIO A
CC
IO
VBAT
VCC
= 25°C, for min/max values T = −40°C to 155°C; unless otherwise noted. All voltages are referenced to GND (pin 13). Positive currents
J
flow into the respective pin.
uTxD
100...4400 ns
100% V
50% V
0% V
IO
IO
IO
dBDTx01
dBDTx10
uBus
uBDTx
100%
80%
Active
300 mV
−300 mV
20%
0%
−uBDTx
Active
dBusTx01
dBusTx10
NOTE: TxD signal is constant for 100..4400 ns before the first edge.
All parameters values are valid even if the test is performed with opposite polarity.
Figure 3. Transmitter Characteristics (TxEN is Low and BGE is High)
uTxEN
dTxEN
LOW
100% V
50% V
0% V
IO
IO
IO
dBDTxia
dBDTxai
uBus
−30 mV
−300 mV
−uBDTx
dBusTxai
dBusTxia
Figure 4. Transmitter Characteristics for Transitions between Idle and Active (TxD is Low)
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NCV7381C
ELECTRICAL CHARACTERISTICS
V
BAT
= 5.5 V to 50 V, V = 4.75 V to 5.25 V, V = 2.3 V to 5.25 V, C
= 100 nF, C
= 100 nF, C = 100 nF, for typical values T
VIO A
CC
IO
VBAT
VCC
= 25°C, for min/max values T = −40°C to 155°C; unless otherwise noted. All voltages are referenced to GND (pin 13). Positive currents
J
flow into the respective pin.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
RECEIVER CHARACTERISTICS
Activity detected previously
|uBP − uBM| ≤ 3.0 V
uData0
Receiver threshold for detecting
Data_0
−300
−
−150
mV
uData1
Receiver threshold for detecting
Data_1
150
−30
−
−
−
300
30
mV
mV
mV
|uData1| − |uData0|
Mismatch of receiver thresholds
(uBP + uBM) / 2 = 2.5 V
uData0_LP
Low−power receiver threshold for
detecting Data_0
uV
BAT
≥ 7.0 V
−400
−100
uCM
Common mode voltage range
(with respect to GND) that does
not disturb the receiver function
and reception level parameters
uCM = (uBP + uBM) / 2
(Note 9)
−10
−
15
V
uBias
Bus bias voltage during bus state
1800
−200
10
−
2500
3200
200
40
mV
mV
kW
pF
R
C
= 40 to 55 W;
Idle in normal−power modes
BUS
BUS
= 100 pF
Bus bias voltage during bus state
Idle in low−power modes
(Note 10)
0
−
−
−
−
R
, R
Receiver common mode
resistance
CM1
CM2
(Note 10)
C_BP, C_BM
Input capacitance on BP and BM
pin (Note 7)
f = 5.0 MHz
f = 5.0 MHz
20
C_Bus
iBP
Bus differential input capacitance
(Note 7)
DIF
−
5.0
25
pF
uBP = uBM = 5.0 V
All other pins = 0 V
Absolute leakage current when
driver is off
LEAK
−
mA
iBM
LEAK
iBP
iBM
uBP = uBM = 0 V
All other pins = 16 V
Absolute leakage current, in case
of loss of GND
LEAKGND
−
−
1600
mA
LEAKGND
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NCV7381C
ELECTRICAL CHARACTERISTICS
V
BAT
= 5.5 V to 50 V, V = 4.75 V to 5.25 V, V = 2.3 V to 5.25 V, C
= 100 nF, C
= 100 nF, C = 100 nF, for typical values T
VIO A
CC
IO
VBAT
VCC
= 25°C, for min/max values T = −40°C to 155°C; unless otherwise noted. All voltages are referenced to GND (pin 13). Positive currents
J
flow into the respective pin.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
RECEIVER CHARACTERISTICS
uBusRx
400
60
60
−
−
−
−
−
−
3000
4330
4330
22.5
22.5
mV
ns
ns
ns
ns
Data
dBusRx0
BD
BD
Test signal parameters for
reception of Data_0 and Data_1
symbols
dBusRx1
dBusRx10
dBusRx01
dBDRx10
−
Receiver delay, negative edge
(Note 8)
−
−
−
−
−
−
75
75
ns
ns
ns
dBDRx01
Receiver delay, positive edge
(Note 8)
dBDRxAsym
Receiver delay mismatch
|dBDRx10 − dBDRx01| (Note 8)
Test signal and parameters
defined in Figure 5 and Figure 6
5.0
uBusRx
400
590
590
18
−
−
−
−
−
3000
610
610
22
mV
ns
ns
ns
ns
RxD pin loaded with 25 pF
capacitor
dBusActive
dBusIdle
Test signal parameters for bus
activity detection
dBusRxia
dBusRxai
18
22
dBDIdleDetection
Bus driver filter−time for idle
50
−
−
200
250
ns
ns
detection
dBDActivityDetection
Bus driver filter−time for activity
detection
100
dBDRxai
dBDRxia
dBDTxRxai
Bus driver idle reaction time
Bus driver activity reaction time
Idle−Loopdelay
50
100
−
−
−
−
275
325
325
ns
ns
ns
REMOTE WAKEUP DETECTION
dWU
dWU
dWU
dWU
Detection time for Wakeup
Data_0 symbol
0Detect
IdleDetect
Timeout
1.0
1.0
48
−
−
−
−
−
−
4.0
4.0
140
1.0
5.5
35
ms
ms
ms
ms
V
Detection time for Wakeup Idle/
Data_1 symbol
Maximum accepted Wakeup
pattern duration
Acceptance timeout for
interruptions
Interrupt
(Note 11)
0.13
−
uV
BAT−RWU
Minimum supply voltage V
for
BAT
remote wakeup events detection
dBDWakeup
Reaction
Reaction time after remote
wakeup event
7.0
ms
remote
TEMPERATURE MONITORING
T
T
Thermal warning level
Thermal shutdown level
125
160
140
170
155
190
°C
°C
JW
JSD
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10
NCV7381C
ELECTRICAL CHARACTERISTICS
V
BAT
= 5.5 V to 50 V, V = 4.75 V to 5.25 V, V = 2.3 V to 5.25 V, C
= 100 nF, C
= 100 nF, C = 100 nF, for typical values T
VIO A
CC
IO
VBAT
VCC
= 25°C, for min/max values T = −40°C to 155°C; unless otherwise noted. All voltages are referenced to GND (pin 13). Positive currents
J
flow into the respective pin.
dBusRx10
dBusRx01
uBus
uBusRx
Data
300 mV
150 mV
−150 mV
−300 mV
−uBusRx
Data
dBusRx0
dBusRx1
BD
BD
uRxD
dBDRx10
dBDRx01
100% V
IO
IO
IO
50% V
0% V
Figure 5. Receiver Characteristics
dBusRxia
dBusRxai
uBus
−30 mV
−150 mV
−300 mV
−uBusRx
dBusActive
dBusIdle
uRxD
dBDRxia
dBDRxai
100% V
50% V
0% V
IO
IO
IO
uRxEN
100% V
50% V
0% V
IO
IO
IO
Figure 6. Parameters of Bus Activity Detection
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11
NCV7381C
ELECTRICAL CHARACTERISTICS
V
BAT
= 5.5 V to 50 V, V = 4.75 V to 5.25 V, V = 2.3 V to 5.25 V, C
= 100 nF, C
= 100 nF, C = 100 nF, for typical values T
VIO A
CC
IO
VBAT
VCC
= 25°C, for min/max values T = −40°C to 155°C; unless otherwise noted. All voltages are referenced to GND (pin 13). Positive currents
J
flow into the respective pin.
Symbol
WAKE PIN
uV
Parameter
Conditions
Min
Typ
Max
Unit
Minimum supply voltage V
local wakeup events detection
for
BAT
−
−
7.0
V
V
BAT−WAKE
uWAKE
Threshold of WAKE comparator
0.45 x
0.5 x
0.55 x
TH
V
BAT
V
BAT
V
BAT
dBDWakePulseFilter
WAKE pulse filter time
(spike rejection)
1.0
14
−
500
50
ms
ms
dBDWakeup
Reaction time after local wakeup
event
−
Reaction
local
iWAKE
Internal pull−down current
Internal pull−up current
uWAKE = 0 V for longer than
dWakePulseFilter
3.0
−
−
12
mA
mA
PD
iWAKE
uWAKE = V
for longer than
−12
−3.0
PU
BAT
dWakePulseFilter
INH PIN
uINH1
Voltage on INH pin when
signaling Not_Sleep
iINH = −5.0 mA
uV
− 0.6
uV
− 0.27
uV
BAT
− 0.1
V
Not_Sleep
BAT
BAT
uV
BAT
> 5.5 V
iINH1
Leakage current while signaling
Sleep
−5.0
0
5.0
mA
LEAK
POWER SUPPLY MONITORING
uBDUVV
V
undervoltage detection
T ≤ 130°C (Note 7)
4.0
4.0
−
4.79
4.79
4.9
5.1
5.5
5.1
5.5
4.5
2.3
7.0
V
V
V
V
V
V
V
BAT
BAT
J
threshold
−40°C ≤ T ≤ 155°C
J
uBDRV
V
BAT
undervoltage recovery
T ≤ 130°C (Note 7)
J
BAT
threshold
−40°C ≤ T ≤ 155°C
−
4.9
J
uBDUVV
V
V
V
undervoltage threshold
undervoltage threshold
4.0
2.0
5.0
4.3
CC
CC
uUV
2.15
5.6
IO
IO
uBDUVV
undervoltage threshold for
BAT−WAKE
BAT
correct detection of the local
wakeup
uUV_HYST
Hysteresis of the undervoltage
detectors
V
V
V
V
undervoltage detector
20
20
20
20
110
100
50
200
200
200
200
mV
mV
mV
mV
BAT
undervoltage detector
CC
undervoltage detector
IO
undervoltage
140
BAT−WAKE
detector
dBDUVV
dBDUVV
dBDUVV
V
V
V
V
V
V
undervoltage detection time
undervoltage detection time
150
150
350
1.5
−
350
350
750
−
750
750
1500
4.5
ms
ms
ms
CC
CC
IO
IO
undervoltage detection time
BAT
undervoltage recovery time
CC
BAT
dBDRV
dBDRV
dBDRV
ms
ms
ms
CC
undervoltage recovery time
−
1.0
IO
IO
undervoltage recovery time
−
−
1.0
BAT
BAT
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12
NCV7381C
ELECTRICAL CHARACTERISTICS
V
BAT
= 5.5 V to 50 V, V = 4.75 V to 5.25 V, V = 2.3 V to 5.25 V, C
= 100 nF, C
= 100 nF, C = 100 nF, for typical values T
VIO A
CC
IO
VBAT
VCC
= 25°C, for min/max values T = −40°C to 155°C; unless otherwise noted. All voltages are referenced to GND (pin 13). Positive currents
J
flow into the respective pin.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
HOST INTERFACE
dBDModeChange
EN and STBN level filtering time
for operating mode transition
21
−
65
ms
dGo−to−Sleep
Go−to−Sleep mode timeout
14
−
−
−
−
33
33
ms
ms
ms
dReactionTime
Reaction time on ERRN pin
Error detected
ERRN
Wakeup detected
or Mode changed
−
1.0
DIGITAL INPUT SIGNALS VOLTAGE THRESHOLDS (Pins EN, STBN, BGE, TxEN)
uV
Low level input voltage
uV
DIG
= uV
IO
−0.3
−
−
0.3 ×
IO
V
V
DIG−IN−LOW
V
uV
High level input voltage
0.7 ×
5.5
DIG−IN−HIGH
V
IO
EN PIN
R
_EN
Pull−down resistance
50
−1.0
2.0
110
0
200
1.0
20
kW
mA
ms
PD
iEN
Low level input current
uEN = 0 V
IL
dEN
EN toggling period for status
register read−out
−
STAT
dEN
dEN
Duration of EN Low and High
1.0
−
−
−
ms
ms
STAT_L
level for status register read−out
STAT_H
dEN_ERRN
Delay from EN falling edge to
ERRN showing valid signal
during status register read−out
−
1.0
STBN PIN
R
_STBN
Pull−down resistance
50
110
0
200
1.0
kW
mA
PD
iSTBN
Low level input current
uSTBN = 0 V
−1.0
IL
BGE PIN
R
R
_BGE
_BGE
Pull−down resistance
Pull−down resistance
Low level input current
Low level input current
200
200
320
320
0
450
450
1.0
1.0
kW
kW
mA
mA
PD
PD
iBGE
iBGE
uBGE = 0 V
uBGE = 0 V
−1.0
−1.0
IL
IL
0
TxD PIN
uBDLogic_0
Low level input voltage
High level input voltage
Pull−down resistance
−0.3
−
−
0.4 ×
IO
V
V
V
uBDLogic_1
0.6 ×
5.5
V
IO
R
_TxD
5.0
11
20
10
kW
PD
C_BDTxD
Input capacitance on TxD pin
(Note 7)
f = 5.0 MHz
uTxD = 0 V
−
−
pF
iTxD
Low level input current
−1.0
0
1.0
mA
LI
TxEN PIN
_TxEN
R
Pull−up resistance
50
110
0
200
1.0
1.0
kW
mA
mA
PU
iTxEN
High level input current
Input leakage current
uTxEN = V
−1.0
−1.0
IH
IO
iTxEN
uTxEN = 5.25 V, V = 0 V
0
LEAK
IO
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13
NCV7381C
ELECTRICAL CHARACTERISTICS
V
BAT
= 5.5 V to 50 V, V = 4.75 V to 5.25 V, V = 2.3 V to 5.25 V, C
= 100 nF, C
= 100 nF, C = 100 nF, for typical values T
VIO A
CC
IO
VBAT
VCC
= 25°C, for min/max values T = −40°C to 155°C; unless otherwise noted. All voltages are referenced to GND (pin 13). Positive currents
J
flow into the respective pin.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
DIGITAL OUTPUT SIGNALS VOLTAGE LIMITS (Pins RxD, RxEN and ERRN)
uV
Low level output voltage
iRxD = 6.0 mA
0
−
0.2 ×
IO
V
DIG−OUT−LOW
DIG−OUT−HIGH
OL
V
iRxEN = 5.0 mA
OL
iERRN = 0.7 mA
OL
(Note 12)
uV
High level output voltage
iRxD = −6.0 mA
0.8 ×
−
V
IO
V
OH
V
IO
iRxEN = −5.0 mA
OH
iERRN = −0.7 mA
OH
(Note 12)
uV
uV
Output voltage on a digital output
R
= 100 kΩ to GND,
LOAD
−
−
−
500
500
mV
mV
DIG−OUT−UV
when V in undervoltage
IO
Either V or V
supplied
CC
BAT
Output voltage on a digital output
when unsupplied
R
= 100 kΩ to GND
−
DIG−OUT−OFF
LOAD
RxD PIN
dBDRxD
RxD signal rise time
RxD pin loaded with 15 pF
capacitor (Note 7)
−
−
−
−
−
−
6.5
6.5
13
ns
ns
ns
R15
F15
R15
(20%−80% V
)
IO
dBDRxD
RxD signal fall time
(20%−80% V
)
IO
dBDRxD
+ dBDRxD
Sum of rise and fall time
(20%−80% V
F15
)
IO
|dBDRxD
Difference of rise and fall time
−
−
−
−
−
−
−
−
5.0
8.5
ns
ns
ns
ns
R15
F15
− dBDRxD
|
dBDRxD
dBDRxD
dBDRxD
RxD signal rise time
RxD pin loaded with 25 pF
capacitor
R25
(20%−80% V
)
IO
RxD signal fall time
(20%−80% V
8.5
F25
R25
)
IO
Sum of rise and fall time
(20%−80% V
16.5
+ dBDRxD
F25
)
IO
|dBDRxD
Difference of rise and fall time
−
−
−
−
−
−
5.0
16.5
5.0
ns
ns
ns
R25
F25
− dBDRxD
|
dBDRxD
RxD signal sum of rise and fall
time at TP4_CC (20%−80% V )
IO
RxD pin loaded with 25 pF
capacitor plus 10 pF at the end
of a 50 W, 1 ns microstripline
(Note 13)
R25_10
+ dBDRxD
F25_10
|dBDRxD
− dBDRxD
RxD signal difference of rise and
fall time at TP4_CC
R25_10
F25_10
|
(20%−80% V
)
IO
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
7. Values based on design and characterization, not tested in production.
8. Guaranteed for 300 mV and 150 mV level of uBus.
9. Tested on a receiving bus driver. Sending bus driver has a ground offset voltage in the range of [−12.5 V to +12.5 V] and sends a 50/50
pattern.
10.Bus driver is connected to GND and uV = 5 V and uV
≥ 7 V.
CC
BAT
11. The minimum value is only guaranteed, when the phase that is interrupted was continuously present for at least 870 ns.
12.uV
= uV . No undervoltage on V and either V or V
supplied.
DIG
IO
IO
CC
BAT
13.Simulation results. Simulation performed within T
range, according to FlexRay Electrical Physical Layer Specification, Version 3.0.1.
J_OP
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14
NCV7381C
FUNCTIONAL DESCRIPTION
Operating Modes
correct transition between any mode and the Sleep mode. All
three modes – Standby, Sleep and Go−to−sleep – are referred
to as low−power modes.
The operating mode selected is a function of the host
signals STBN and EN, the state of the supply voltages and
NCV7381C can switch between several operating modes
depicted in Figure 7. In Normal and Receive−only modes,
the chip interconnects a FlexRay communication controller
with the bus medium for full−speed communication. These
two modes are also referred to as normal−power modes.
In Standby and Sleep modes, the communication is
suspended and the power consumption is substantially
reduced. A wakeup on the bus or through a locally
monitored signal on pin WAKE can be detected and signaled
to the host. Go−to−sleep mode is a temporary mode ensuring
the wakeup detection. As long as all three supplies (V
,
BAT
V
CC
, V ) remain above their respective undervoltage
IO
detection levels, the logical control by EN and STBN pins
shown in Figure 7 applies. Influence of the power supplies
and of the wakeup detection on the operating modes is
described in subsequent paragraphs.
Normal Mode
Receive−only Mode
Transmitter: on
Transmitter: off
Receiver: on
STBN=H
EN=L
STBN=H
EN=H
STBN=H
EN=L
STBN=H
EN=H
Receiver: on
INH: High
Power cons.: normal
INH: High
Power cons.: normal
STBN=H
STBN=H
EN=L
STBN=H
EN=L
STBN=H
EN=H
EN=H
STBN=L
EN=H
STBN=L
EN=L
STBN=L
EN=L
STBN=L
EN=H
Standby Mode
Go−to−sleep Mode
STBN=L
EN=H
Transmitter: off
Transmitter: off
STBN=L
EN=L
Receiver: wakeup−detection
INH: High
Receiver: wakeup−detection
INH: High
Power cons.: low
Power cons.: low
STBN=L, EN=H
Power−up
for <dGo−to−Sleep
STBN=L, EN=H
for >dGo−to−Sleep
Sleep Mode
Transmitter: off
Receiver: wakeup−detection
INH: floating
Power cons.: low
Figure 7. Operating Modes and their Control by the STBN and EN Pins
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15
NCV7381C
Go−to−sleep
Normal
Mode
Receive−Only
Standby
Mode
Sleep
Mode
Normal
Mode
Mode
Mode
STBN
EN
ERRN
Error Flag
Error Flag
Wake Flag
Wake Flag
Error Flag
dGo−to−sleep
dBDModeChange
dBDModeChange dBDModeChange
dBDModeChange
Figure 8. Timing Diagram of Operating Modes Control by the STBN and EN Pins
Power Supplies and Power Supply Monitoring
All three supplies are monitored by undervoltage
detectors with individual thresholds and filtering times both
for undervoltage detection and recovery – see Table
Electrical Characteristics − Power Supply Monitoring
Parameters.
NCV7381C is supplied by three pins. V
is the main
BAT
supply both for NCV7381C and the full electronic module.
will be typically connected to the automobile battery
V
BAT
through a reverse−polarity protection. V
is a 5 V
CC
low−voltage supply primarily powering the FlexRay bus
Logic Level Adaptation
driver core in a normal−power mode. V supply serves to
IO
Level shift input V is used to apply a reference voltage
IO
adapt the logical levels of NCV7381C to the host and/or the
FlexRay communication controller digital signal levels. All
supplies should be properly decoupled by filtering
capacitors − refer to Figure 2 and Recommended External
Components for the Application Diagram.
uV
= uV to all digital inputs and outputs in order to
DIG
IO
adapt the logical levels of NCV7381C to the host and/or the
FlexRay communication controller digital signal levels
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16
NCV7381C
Internal Flags
The NCV7381C control logic uses a number of internal flags (i.e. one−bit memories) reflecting important conditions or
events. Table 1 summarizes the individual flags and the conditions that lead to a set or reset of the flags.
Table 1. INTERNAL FLAGS
Flag
Set Condition
Reset Condition
Comment
Local
Wakeup
Low level detected on WAKE pin in a
low−power mode
Low−power mode is entered
Remote
Wakeup
Remote wakeup detected on the bus in a
low−power mode
Low−power mode is entered
Normal mode is entered
Local Wakeup flag changes to set
or
Remote Wakeup flag changes to set
or
Wakeup
Low−power mode is entered
or
Any undervoltage flag becomes set
Internal power supply of the chip becomes
sufficient for the operation of the control
logic
Power−on
Normal mode is entered
(Junction temperature is below Tjw in
a normal−power mode
Junction temperature is higher than Tjw
(typ. 138°C) in a normal−power mode
and
The thermal warning
flag has no influence
on the bus driver
function
or
Thermal
Warning
the status register is read in a low−power
mode)
and
BAT
V
is not in undervoltage
BAT
V
is not in undervoltage
Junction temperature is below Tjsd in
a normal−power mode
Junction temperature is higher than Tjsd
(typ. 172°C) in a normal−power mode
and
The transmitter is
disabled as long as
the thermal shutdown
flag is set
Thermal
Shutdown
and
falling edge on TxEN
and
V
is not in undervoltage
BAT
V
BAT
is not in undervoltage
TxEN is Low for longer than dBDTxAct-
iveMax (typ. 1.5 ms) and bus driver is in
Normal mode
The transmitter is
disabled as long as
the timeout flag is set
TxEN
Timeout
TxEN is High or Normal mode is left
(Transmitter is enabled
Transmitter is enabled
The bus error flag has
no influence on the
bus driver function
and
and
Bus Error
Data on bus are identical to TxD signal)
Data on bus are different from TxD signal
(sampled after each TxD edge)
or
Transmitter is disabled
V
is above the undervoltage threshold
BAT
V
V
is below the undervoltage threshold
for longer than dBDRV
or
BAT
BAT
BAT
Undervoltage
for longer than dBDUVV
BAT
Wake flag becomes set
V
CC
is above the undervoltage threshold for
longer than dBDRV
or
CC
V
V
is below the undervoltage threshold
CC
CC
Undervoltage
for longer than dBDUVV
CC
Wake flag becomes set
or V undervoltage is recovered
BAT
V
IO
is above the undervoltage threshold for
longer than dBDRV
or
IO
V
V
is below the undervoltage threshold
IO
IO
Undervoltage
for longer than dUV
IO
Wake flag becomes set
or V undervoltage is recovered
BAT
Any of the following status bits is set:
• Bus error
All of the following status bits are reset:
• Bus error
• Thermal Warning
• Thermal Shutdown
• TxEN Timeout
• Thermal Warning
• Thermal Shutdown
• TxEN Timeout
Error
• V
Undervoltage
• V
Undervoltage
BAT
BAT
• V Undervoltage
• V Undervoltage
CC
CC
• V Undervoltage
• V Undervoltage
IO
IO
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17
NCV7381C
Operating Mode Changes Caused by Internal Flags
FlexRay Transceiver
Changes of some internal flags described in Table 1 can
force an operating mode transition complementing or
overruling the operating mode control by the digital inputs
STBN and EN which is shown in Figure 7:
NCV7381C contains
a
fully−featured FlexRay
transceiver compliant with Electrical Physical Layer
Specification Rev. 3.0.1. The transmitter part translates
logical signals on digital inputs TxEN, BGE and TxD into
appropriate bus levels on pins BP and BM. A transmission
cannot be started with Data_1. In case the transmitter is
enabled for longer than dBDTxActiveMax, the TxEN
Timeout flag is set and the current transmission is disabled.
The receiver part monitors bus pins BP and BM and signals
the detected levels on digital outputs RxD and RxEN. The
different bus levels are defined in Figure 9. The function of
the transceiver and the related digital pins in different
operating modes is detailed in Table 2 and Table 3.
• Setting the V
and/or VIO undervoltage flag causes a
transition to Sleep mode
BAT
• Setting the V undervoltage flag, while the bus driver
CC
is not in Sleep, causes a transition to Standby mode
• In case a Wake flag is set, the NCV7381C transitions to
Standby mode, all undervoltage flags are cleared and
the corresponding undervoltage detection timers are
reset. The restart of the undervoltage detection timers
allows the external power supplies to ramp−up and
stabilize properly if, for example, they were previously
switched off during Sleep mode
• The transmitter can only be enabled if the activation of
the transmitter is initiated in Normal mode.
• The receiver function is enabled by entering a
normal−power mode.
• In case the V
is recovered from undervoltage
BAT
condition, the operating mode control of the chip by
digital inputs STBN and EN is re−enabled, all
undervoltage flags are cleared and the corresponding
undervoltage detection timers are reset
• In case the V and V are both recovered from
CC
IO
undervoltage while V
is not in undervoltage
BAT
condition, the operating mode control by digital inputs
STBN and EN is re−enabled.
NOTE: The operating mode control state machine is not
reset when an undervoltage condition is
detected. Thus if Sleep mode was requested by
the host prior to undervoltage condition
detection and the EN pin was set Low in Sleep
mode, the device stays in Sleep once the
undervoltage is recovered, although STBN and
EN pins are both set Low, which is otherwise
considered a Standby mode request.
uBus
BP
V
CC
/2
BM
Idle_LP
Idle
Data_0
Data_1
Figure 9. FlexRay Bus Signals
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18
NCV7381C
Table 2. TRANSMITTER FUNCTION AND TRANSMITTER−RELATED PINS
Operating Mode
Standby, Go−to−sleep, Sleep
Receive−only
BGE
TxEN
TxD
Transmitted Bus Signal
x
x
0
1
1
1
x
x
x
1
0
0
x
x
x
x
0
1
Idle_LP
Idle
Idle
Idle
Normal
Data_0
Data_1
Table 3. RECEIVER FUNCTION AND RECEIVER−RELATED PINS
Operating Mode
Signal on Bus
Wake flag
RxD
High
Low
High
Low
High
RxEN
High
Low
x
not set
Standby, Go−to−sleep, Sleep
x
set
x
Idle
High
Low
Normal,
Receive−only
Data_0
Data_1
x
x
Low
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19
NCV7381C
Bus Guardian Interface
Bus Driver Remote Wakeup Detection
The interface consists of the BGE digital input signal
allowing a Bus Guardian unit to disable the transmitter and
of the RxEN digital output signal used to signal whether the
communication signal is Idle or not.
During a low−power mode and under the presence of
V
voltage, a low−power receiver constantly monitors the
BAT
activity on bus pins BP and BM. A valid remote wakeup is
detected when either a wakeup pattern or a dedicated
wakeup frame is received. A valid remote wakeup is also
detected when wakeup pattern has been started in
normal−power mode already.
A wakeup pattern is composed of two Data_0 symbols
separated by Data_1 or Idle symbols. The basic wakeup
pattern composed of Data_0 and Idle symbols is shown in
Figure 10; the wakeup pattern composed of Data_0 and
Data_1 symbols – referred to as “alternative wakeup
pattern” − is depicted in Figure 11.
Bus Driver Voltage Regulator Control
NCV7381C provides a high−voltage output pin INH
which can be used to control an external voltage regulator
(see Figure 2). The pin INH is driven by a switch to V
BAT
supply. In Normal, Receive−only, Standby and Go−to−Sleep
modes, the switch is activated thus forcing a High level on
pin INH. In the Sleep mode, the switch is open and INH pin
remains floating. If a regulator is directly controlled by INH,
it is then active in all operating modes with the exception of
the Sleep mode.
uBus
<dWU
Timeout
>dWU
>dWU
>dWU
>dWU
IdleDetect
0Detect
IdleDetect
0Detect
0
uData0_LP
Idle(_LP)
Data_0
Idle(_LP)
Data_0
Idle(_LP)
Figure 10. Valid Remote Wakeup Pattern
<dWU
Timeout
>dWU
>dWU
>dWU
>dWU
IdleDetect
0Detect
IdleDetect
0Detect
uBus
0
uData0_LP
Idle(_LP)
Data_0
Data_1
Data_0
Data_1
Figure 11. Valid Alternative Remote Wakeup Pattern
A remote wakeup will be also detected if NCV7381C receives a full FlexRay frame at 10 Mbit/s with the following payload
data:
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
The wakeup pattern, the alternative wakeup pattern and the wakeup frame lead to identical wakeup treatment and signaling.
Local Wakeup Detection
The high−voltage input WAKE is monitored in
low−power modes and under the condition of sufficient
Internal pull−up and pull−down current sources are
connected to WAKE pin in order to minimize the risk of
parasitic toggling. The current source polarity is
automatically selected based on the WAKE input signal
polarity – when the voltage on WAKE stays stable High
(Low) for longer than dWakePulseFilter, the internal current
source is switched to pull−up (pull−down).
V
BAT
supply level. If a falling edge is recognized on WAKE
pin, a local wakeup is detected. In order to avoid false
wakeups, the Low level after the falling edge must be longer
than dWakePulseFilter in order for the wakeup to be valid.
The WAKE pin can be used, for example, for switch or
contact monitoring.
www.onsemi.com
20
NCV7381C
ERRN Pin and Status Register
Provided V supply is present together with either V
state of the internal “Error” or the wakeup source (See
Table 4).
The polarity of the indication is reversed – ERRN pin is
pulled Low when the “Error” flag is set. The signaling on pin
ERRN functions in all operating modes.
IO
BAT
or V , the digital output ERRN indicates the state of the
CC
internal “Error” flag when in Normal mode and the state of
the internal “Wake” flag when in Standby, Go−to−Sleep or
Sleep. In Receive−only mode ERRN indicates either the
Table 4. SIGNALING ON ERRN PIN
STBN
EN
Conditions
Error flag
Wake flag
ERRN
High
Low
not set
x
High
High
−
set
x
not set
x
x
High
Low
EN has been set to High after previous wakeup
set
x
High
Low
Low
x
Set local
Set remote
not set
set
High
Low
EN has not been set to High after previous wakeup
x
x
High
Low
−
x
Additionally, a full set of internal bits referred to as status
register can be read through ERRN pin with EN pin used as
a clock signal – the status register content is described in
Table 5 while an example of the read−out waveforms is
shown in Figure 12 and Figure 13. The individual status bits
are channeled to ERRN pin with reversed polarity (if a status
bit is set, ERRN is pulled Low) at the falling edge on EN pin
(the status register starts to be shifted only at the second
falling edge). As long as the EN pin toggling period falls in
the read−out continues. As soon as the EN level is stable for
more than dBDModeChange, the read−out is considered as
finished and the operating mode is changed according the
current EN value. At the same time, the status register bits
S4 to S10 are reset provided the particular bits have been
read−out and the corresponding flags are not set any more –
see Table 5. The status register read−out always starts with
bit S0 and the exact number of bits shifted to ERRN during
the read−out is not relevant.
the dEN
range, the operating mode is not changed and
STAT
Table 5. STATUS REGISTER
Reset after Finished
Bit Number
Status Bit Content
Note
Read−out
S0
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
Local wakeup flag
Remote wakeup flag
not used; always High
Power−on status
reflects directly the corresponding flag
no
no
Bus error status
Thermal shutdown status
Thermal warning status
TxEN Timeout status
yes, if the
corresponding flag is
reset and the bit was
read−out
the status bit is set if the corresponding flag
was set previously (the respective High level of
the flag is latched in its status counter−part)
V
Undervoltage status
Undervoltage status
Undervoltage status
BAT
V
CC
V
IO
Normal mode: BGE pin logical state (Note 14)
Other modes: Low
S11
BGE Feedback
−
S12−S15
S16−S23
S24−S31
not used; always Low
no
Version of the NCV7381C analog
part
fixed values identifying the production masks
version
no
Version of the NCV7381C digital part
14.The BGE pin state is latched during status register read−out at rising edge of the EN pin.
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21
NCV7381C
Receive−Only
Normal
Mode
Mode
STBN
EN
dEN
dEN
STAT_H
STAT_L
dEN
STAT
dBDModeChange
Sx
dEN_ERRN
S1
ERRN
Error Flag
S0
Error Flag
Figure 12. Example of the Status Register Read−out (Started with EN High)
Receive−Only
Mode
STBN
EN
dEN
dEN
STAT_H
STAT_L
dEN
STAT
dBDModeChange
Sx
dEN_ERRN
S1
Error Flag
ERRN
S0
Error Flag
Figure 13. Example of the Status Register Read−out (Started with EN Low)
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22
NCV7381C
TYPICAL CHARACTERISTICS
700
600
1200
TEMP = 25°C
V
IO
= 3.3 V
TEMP = 25°C
V
= 3.3 V
IO
1000
800
600
400
500
400
300
200
V
IO
= 5 V
V
= 5 V
IO
200
0
100
0
0
5
10
15
iRxD (mA)
20
25
30
0
5
10
15
−iRxD (mA)
20
25
30
OL
OH
Figure 14. RxD Low Output Characteristic
Figure 15. RxD High Output Characteristic
300
V
BAT
= 14 V
TEMP = 25°C
250
200
150
100
V
BAT
= 4.9 V
50
0
0
1
2
3
4
5
−iINH (mA)
Figure 16. INH Not_Sleep Output
Characteristic
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23
NCV7381C
100 nF
100 nF
VCC
100 nF
14 5.0
VDC VDC
VIO
TxD
VBAT
BP
RBUS
CBUS
NCV7381C
RxD
BM
25 pF
GND
Figure 17. Test Setup for Dynamic Characteristics
3x 100 nF MLCC || 3x 22 mF ELCO
ISO 7637−2
pulse
generator
33 kW
V
14
5.0 3.3
V
V
BAT
CC
IO
1 nF
V
V
V
DC DC
DC
WAKE
ISO 7637−2
pulse
3.3 kW
330 pF
330 pF
generator
NCV7381C
TxD
RxD
BP
R
BUS
56 W
ISO 7637−2
pulse
generator
BM
15 pF
GND
Figure 18. Test Setup for Measuring the Transient Immunity
ORDERING INFORMATION
Part Number
†
Container
Type
Quantity
Description
FlexRay Transceiver, Clamp 30, High Temperature
Package
NCV7381CDP0R2G
SSOP 16 GREEN
Tape & Reel
2000
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
FlexRay is a registered trademark of Daimler Chrysler AG.
www.onsemi.com
24
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SSOP 16
CASE 565AE−01
ISSUE O
DATE 19 SEP 2008
98AON34903E
ON SEMICONDUCTOR STANDARD
DOCUMENT NUMBER:
STATUS:
Electronic versions are uncontrolled except when
accessed directly from the Document Repository. Printed
versions are uncontrolled except when stamped
“CONTROLLED COPY” in red.
REFERENCE:
DESCRIPTION: SSOP 16
PAGE 1 OF2
DOCUMENT NUMBER:
98AON34903E
PAGE 2 OF 2
ISSUE
REVISION
DATE
O
RELEASED FOR PRODUCTION FROM POD #6000212 TO ON SEMICONDUCTOR.
REQ. BY B. BERGMAN.
19 SEP 2008
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
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© Semiconductor Components Industries, LLC, 2008
Case Outline Number:
September, 2008 − Rev. 01O
565AE
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vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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