NCV21874DR2G [ONSEMI]
45 V Offset, 0.4 V/C, Zero-Drift Operational Amplifier;
| 型号： | NCV21874DR2G |
| 厂家： | 
ONSEMI |
| 描述： | 45 V Offset, 0.4 V/C, Zero-Drift Operational Amplifier |
| 文件： | 总19页 (文件大小：726K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
45 mV Offset, 0.4 mV/5C,
Zero-Drift Operational
Amplifier
NCS21871, NCV21871,
NCS21872, NCV21872,
NCS21874, NCV21874
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The NCS21871, NCS21872 and NCS21874 family of zero−drift op
amps feature offset voltage as low as 45 mV over the 1.8 V to 5.5 V
supply voltage range. The zero−drift architecture reduces the offset
drift to as low as 0.4 mV/°C and enables high precision measurements
over both time and temperature. This family has low power
consumption over a wide dynamic range and is available in space
saving packages. These features make it well suited for signal
conditioning circuits in portable, industrial, automotive, medical and
consumer markets.
5
5
1
1
SOT23−5
SN SUFFIX
CASE 483
SC70−5
SQ SUFFIX
CASE 419A
Features
1
• Gain−Bandwidth Product: 270 kHz to 350 kHz
• Low Supply Current: 17 mA (typ at 3.3 V)
• Low Offset Voltage: 45 mV max
• Low Offset Drift: 0.4 mV/°C max
• Wide Supply Range: 1.8 V to 5.5 V
• Wide Temperature Range: −40°C to +125°C
• Rail−to−Rail Input and Output
UDFN8
MU SUFFIX
CASE 517AW
MSOP−8
DM SUFFIX
CASE 846A−02
8
14
1
1
SOIC−8
D SUFFIX
CASE 751
SOIC−14
D SUFFIX
CASE 751A
• Available in Single, Dual and Quad Packages
• NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
ECP5
FCT SUFFIX
CASE 971BE
Applications
• Automotive
• Battery Powered/ Portable Application
• Sensor Signal Conditioning
• Low Voltage Current Sensing
• Filter Circuits
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 2 of this data sheet.
• Bridge Circuits
• Medical Instrumentation
ORDERING INFORMATION
See detailed ordering and shipping information on page 3 of
this data sheet.
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
June, 2020 − Rev. 1
NCS21871/D
NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874
DEVICE MARKING INFORMATION
Single Channel Configuration
NCS21871, NCV21871
XXX
AYW
G
7AAYWG
7CMG
G
G
TSOP−5/SOT23−5
SC70−5
ECP5
CASE 483
CASE 419A
CASE 971BE
Dual Channel Configuration
NCS21872, NCV21872
8
8
1
2187
AYWG
G
21872
ALYW
G
72
YM
1
1
UDFN8, 2x2, 0.5P
CASE 517AW
Micro8/MSOP8
CASE 846A−02
SOIC−8
CASE 751
Quad Channel Configuration
NCS21874, NCV21874
14
N874G
AWLYWW
1
SOIC−14
CASE 751A
X
A
Y
= Specific Device Code
= Assembly Location
= Year
W
M
= Work Week
= Date Code
G or G = Pb−Free Package
(Note: Microdot may be in either location)
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2
NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874
PIN CONNECTIONS
Single Channel Configuration
NCS21871, NCV21871
1
2
3
5
OUT
VSS
VDD
IN−
OUT
VSS
IN+
IN+
VSS
IN−
VDD
1
2
3
VDD
5
4
C3 C1
B2
4
OUT
IN−
A3 A1 IN+
ECP5 (Top View)
SC70−5 / SC−88−5 / SOT−353−5
SOT23−5 / TSOP−5
Dual Channel Configuration
NCS21872, NCV21872
Quad Channel Configuration
NCS21874, NCV21874
1
OUT 1
IN− 1
IN+ 1
VDD
14
13
12
11
10
9
OUT 4
IN− 4
IN+ 4
OUT 1
IN− 1
IN+ 1
VSS
1
2
3
4
8
7
6
5
VDD
2
−
−
−
OUT 2
IN− 2
IN+ 2
+
+
+
3
4
5
6
7
−
+
VSS
IN+ 3
IN− 3
OUT 3
IN+ 2
IN− 2
+
+
UDFN8* / Micro8 / SOIC−8
−
−
*The exposed pad of the UDFN8 package
can be floated or connected to VSS.
8
OUT 2
SOIC−14
ORDERING INFORMATION
†
Temperature
Channels
Package
Device Part Number
Shipping
COMMERCIAL AND INDUSTRIAL
−40°C to 125°C
Single
SOT23*5 / TSOP*5
NCS21871SN2T1G
NCS21871SQ3T2G
3000 / Tape & Reel
SC70*5 / SC*88*5 /
SOT*353*5
ECP5
MICRO*8
SOIC−8
NCS21871FCTTAG*
NCS21872DMR2G*
NCS21872DR2G*
NCS21872MUTBG*
NCS21874DR2G*
Dual
4000 / Tape & Reel
3000 / Tape & Reel
−40°C to 125°C
UDFN−8
SOIC−14
Quad
2500 / Tape & Reel
3000 / Tape & Reel
AUTOMOTIVE
−40°C to 125°C
Single
SOT23*5 / TSOP*5
NCV21871SN2T1G
NCV21871SQ3T2G
SC70*5 / SC*88*5 /
SOT*353*5
Dual
MICRO*8
SOIC−8
NCV21872DMR2G*
NCV21872DR2G*
NCV21874DR2G*
4000 / Tape & Reel
3000 / Tape & Reel
2500 / Tape & Reel
Quad
SOIC−14
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*In Development. Contact local sales office for more information.
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3
NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874
ABSOLUTE MAXIMUM RATINGS
Over operating free−air temperature, unless otherwise stated.
Parameter
Rating
Unit
Supply Voltage
6
V
INPUT AND OUTPUT PINS
Input Voltage (Note 1)
(VSS) − 0.3 to (VDD) + 0.3
V
Input Current (Note 1)
10
mA
Output Short Circuit Current (Note 2)
TEMPERATURE
Continuous
Operating Temperature Range
Storage Temperature Range
Junction Temperature
−40 to +125
−65 to +150
+150
°C
°C
°C
ESD RATINGS (Note 3)
Human Body Model (HBM)
Charged Device Model (CDM)
OTHER RATINGS
4000
2000
V
V
Latch−up Current (Note 4)
MSL
100
mA
Level 1
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Input terminals are diode−clamped to the power−supply rails. Input signals that can swing more than 0.3 V beyond the supply rails should
be current limited to 10 mA or less
2. Short−circuit to ground.
3. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per JEDEC standard JS−001 (AEC−Q100−002)
ESD Charged Device Model tested per JEDEC standard JESD22−C101 (AEC−Q100−011)
4. Latch−up Current tested per JEDEC standard: JESD78.
THERMAL INFORMATION (Note 5)
Parameter
Symbol
Package
SOT23−5 / TSOP5
SC70−5 / SC−88−5 / SOT−353−5
ECP5
Value
290
290
157
298
250
228
216
Unit
Thermal Resistance,
Junction to Ambient
q
°C/W
JA
Micro8 / MSOP8
SOIC−8
UDFN8
SOIC−14
2
5. As mounted on an 80x80x1.5 mm FR4 PCB with 650 mm and 2 oz (0.07 mm) thick copper heat spreader. Following JEDEC JESD/EIA 51.1,
51.2, 51.3 test guidelines
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Range
Unit
V
Supply Voltage (V − V
)
V
S
1.8 to 5.5
−40 to 125
DD
SS
Specified Operating Temperature Range
Input Common Mode Voltage Range
T
A
°C
V
V
CM
V
−0.1 to V +0.1
SS DD
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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4
NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874
ELECTRICAL CHARACTERISTICS: V = 1.8 V to 5.5 V
S
At T = +25°C, R = 10 kW connected to midsupply, V
= V
= midsupply, unless otherwise noted.
A
L
CM
OUT
Boldface limits apply over the specified operating temperature range, guaranteed by characterization and/or design.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
V
V
= +5 V
= 5 V
6
45
0.4
8
mV
OS
S
Offset Voltage Drift vs Temp
Offset Voltage Drift vs Supply
DV /DT
V
0.1
0.4
mV/°C
mV/V
OS
S
DV /DV
T = +25°C
A
OS
S
Full temperature range
12.6
400
Input Bias Current
(Note 6)
I
IB
T = +25°C
A
60
+400
50
pA
Full temperature range
Input Offset Current
(Note 6)
I
T = +25°C
A
800
pA
dB
OS
Common Mode Rejection Ratio
(Note 7)
CMRR
V
V
V
V
= 1.8 V
= 3.3 V
= 5.0 V
= 5.5 V
111
118
123
127
4.1
S
S
S
S
102
Input Capacitance
C
Differential
pF
dB
IN
Common Mode
7.9
OUTPUT CHARACTERISTICS
Open Loop Voltage Gain
(Note 6)
A
VOL
V
SS
+ 100 mV < V < V − 100 mV
106
145
O
DD
Open Loop Output Impedance
Output Voltage High,
Z
See Figure 18
10
W
out−OL
V
OH
T = +25°C
80
80
80
80
mV
A
Referenced to V
DD
Full temperature range
Output Voltage Low,
Referenced to V
V
OL
T = +25°C
A
10
mV
mA
SS
Full temperature range
Sinking Current
I
O
11
5.0
Sourcing Current
Capacitive Load Drive
NOISE PERFORMANCE
Voltage Noise Density
Voltage Noise
C
See Figure 14
L
e
N
f
= 1 kHz
62
1.1
0.5
350
135
nV / √Hz
IN
e
P−P
f
f
= 0.1 Hz to 10 Hz
= 0.01 Hz to 1 Hz
mV
PP
IN
IN
Current Noise Density
Channel Separation
i
N
f
IN
= 10 Hz
fA / √Hz
NCS21872, NCS21874
dB
DYNAMIC PERFORMANCE
Gain Bandwidth Product
GBWP
C = 100 pF
NCS21871, NCS21874
NCS21872
350
270
18
kHz
L
Gain Margin
Phase Margin
Slew Rate
A
M
C = 100 pF
dB
°
L
f
M
C = 100 pF
55
L
SR
G = 1, V = 5.5 V
0.1
0.05
V/ms
DD
G = 1, V = 1.8 V
DD
6. Guaranteed by characterization and/or design
7. Specified over the full common mode range: V − 0.1 < V
< V + 0.1
DD
SS
CM
8. No load, per channel
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NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874
ELECTRICAL CHARACTERISTICS: V = 1.8 V to 5.5 V
S
At T = +25°C, R = 10 kW connected to midsupply, V
= V
= midsupply, unless otherwise noted.
A
L
CM
OUT
Boldface limits apply over the specified operating temperature range, guaranteed by characterization and/or design.
Parameter
POWER SUPPLY
Symbol
Conditions
Min
Typ
Max
Unit
Power Supply Rejection Ratio
PSRR
T = +25°C
A
106
130
dB
Full temperature range
98
Turn−on Time
t
V
= 5 V
100
20
ms
ON
S
Quiescent Current
(Note 8)
I
Q
1.8 V ≤ V ≤ 3.3 V
40
40
45
45
mA
S
3.3 V < V ≤ 5.5 V
28
S
6. Guaranteed by characterization and/or design
7. Specified over the full common mode range: V − 0.1 < V
< V + 0.1
DD
SS
CM
8. No load, per channel
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874
TYPICAL CHARACTERISTICS
120
100
80
60
40
20
0
120
105
90
120
110
100
90
T = 25°C
A
Phase Margin
80
75
70
60
Gain
60
50
45
40
C = 100 pF
R = 10 kW
T = 25°C
L
30
30
L
20
A
−20
−40
15
0
10
0
10
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 1. Open Loop Gain and Phase Margin
vs. Frequency
Figure 2. CMRR vs. Frequency
3
2
120
100
80
T
= −40 °C
= 25 °C
A
A
T
T
T = 25°C
A
= 125 °C
V
OH
A
VDD = 2.75 V
VSS = −2.75 V
1
+PSRR
0
60
−PSRR
40
−1
−2
−3
V
OL
20
0
10
100
1k
10k
100k
1M
0
2
4
6
8
10 12 14 16 18
FREQUENCY (Hz)
OUTPUT CURRENT (mA)
Figure 3. PSRR vs. Frequency
Figure 4. Output Voltage Swing vs. Output
Current at VS = 5.5 V
1
T
= −40 °C
= 25 °C
= 125 °C
A
0.8
0.6
200
150
100
50
V
OH
T
T
A
T = 25°C
S
A
A
V
= 1.8 V
VDD = 0.9 V
VSS = −0.9 V
0.4
0.2
I
I
IB+
0
0
IB−
−0.2
−0.4
−0.6
−0.8
−1
−50
V
OL
−100
−150
−200
−0.2
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
COMMON MODE VOLTAGE (V)
0
2
4
6
8
10
OUTPUT CURRENT (mA)
Figure 5. Output Voltage Swing vs. Output
Current at VS = 1.8 V
Figure 6. Input Bias Current vs. Common
Mode Voltage
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NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874
TYPICAL CHARACTERISTICS
200
150
100
50
30
V
= 5.5 V
S
25
20
15
10
V
V
= 5.0 V
= 3.3 V
S
I
I
IB+
S
IB−
0
V
S
= 1.8 V
−50
−100
T = 25°C
S
A
V
= 5 V
5
0
−150
−200
Per Channel
−40 −20
0
20
40
60
80
100
−40 −20
0
20
40
60
80
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 7. Input Bias Current vs. Temperature
Figure 8. Quiescent Current vs. Temperature
5
0.20
0.15
0.10
0.05
0
4
3
4
3
Input
Input
2
1
2
Output
V
S
= 5.0 V
0
1
A = −1
V
−1
−2
0
R = 10 kW
L
−0.05
V
= 5.0 V
A = +1
R = 10 kW
S
−1
Output
V
−0.10
−0.15
−3
−4
−2
−3
L
TIME (50 ms/div)
TIME (5 ms/div)
Figure 10. Small Signal Step Response
Figure 9. Large Signal Step Response
1.0
3.0
3.0
1.0
0.5
0
2.5
2.0
1.5
1.0
0.5
0
2.5
2.0
0.5
0
Output
Input
−0.5
−1.0
−1.5
−2.0
−2.5
1.5
1.0
0.5
0
−0.5
−1.0
−1.5
−2.0
−2.5
V
= 5.0 V
S
A = −10
V = 5.0 V
S
V
A = −10
R = 10 kW
V
L
Output
R = 10 kW
L
Input
−0.5
−1.0
−0.5
−1.0
−3.0
−3.0
INPUT (V)
OUTPUT (V)
INPUT (V)
OUTPUT (V)
TIME (50 ms/div)
TIME (50 ms/div)
Figure 12. Negative Overvoltage Recovery
Figure 11. Positive Overvoltage Recovery
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NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874
TYPICAL CHARACTERISTICS
500
400
300
200
65
60
55
50
45
40
35
30
25
20
15
10
T = 25°C
R = 10 kW
L
A
T = 25°C
A
100
0
5
0
1
10
100
10
100
LOAD CAPACITANCE (pF)
1000
GAIN (V/V)
Figure 13. Setting Time to 0.1% vs.
Figure 14. Small−Signal Overshoot vs. Load
Closed−Loop Gain
Capacitance
2000
1500
1000
500
1000
V
= V /2
S
CM
T = 25°C
A
R = 10 kW
T = 25°C
A
L
100
10
0
−500
−1000
−1500
−2000
0
1
2
3
4
5
6
7
8
9
10
1
10
100
1000
10,000
TIME (s)
FREQUENCY (Hz)
Figure 15. 0.1 Hz to 10 Hz Noise
Figure 16. Voltage Noise Density vs.
Frequency
10k
1k
1000
T = 25°C
A
100
10
100
10
1
10
100
1000
10,000
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 17. Current Noise Density vs.
Frequency
Figure 18. Open Loop Output Impedance vs.
Frequency
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NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874
APPLICATIONS INFORMATION
OVERVIEW
The NCS21871, NCS21872, and NCS21874 precision op
The NCS21871 series of precision op amps uses a
chopper−stabilized architecture, which provides the
advantage of minimizing offset voltage drift over
temperature and time. The simplified block diagram is
shown in Figure 19. Unlike the classical chopper
architecture, the chopper stabilized architecture has two
signal paths.
amps provide low offset voltage and zero drift over
temperature. The input common mode voltage range
extends 100 mV beyond the supply rails to allow for sensing
near ground or VDD. These features make the NCS21871
series well−suited for applications where precision is
required, such as current sensing and interfacing with
sensors.
Main amp
+
IN+
O
−
IN−
−
+
+
−
+
−
Chopper
Chopper
RC notch filter
RC notch filter
Figure 19. Simplified NCS21871 Block Diagram
In Figure 19, the lower signal path is where the chopper
samples the input offset voltage, which is then used to
correct the offset at the output. The offset correction occurs
at a frequency of 125 kHz. The chopper−stabilized
architecture is optimized for best performance at
frequencies up to the related Nyquist frequency (1/2 of the
offset correction frequency). As the signal frequency
exceeds the Nyquist frequency, 62.5 kHz, aliasing may
occur at the output. This is an inherent limitation of all
cascaded, symmetrical, RC notch filters tuned to the
chopper frequency and its fifth harmonic to reduce aliasing
effects.
The chopper−stabilized architecture also benefits from
the feed−forward path, which is shown as the upper signal
path of the block diagram in Figure 19. This is the high speed
signal path that extends the gain bandwidth up to 350 kHz.
Not only does this help retain high frequency components of
the input signal, but it also improves the loop gain at low
frequencies. This is especially useful for low−side current
sensing and sensor interface applications where the signal is
low frequency and the differential voltage is relatively
small.
chopper
and
chopper−stabilized
architectures.
Nevertheless, the NCS21871 op amps have minimal
aliasing up to 125 kHz and low aliasing up to 190 kHz when
compared to competitor parts from other manufacturers.
ON Semiconductor’s patented approach utilizes two
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NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874
APPLICATION CIRCUITS
Low−Side Current Sensing
Low−side current sensing is used to monitor the current
through a load. This method can be used to detect
over−current conditions and is often used in feedback
control, as shown in Figure 20. A sense resistor is placed in
series with the load to ground. Typically, the value of the
sense resistor is less than 100 mW to reduce power loss
across the resistor. The op amp amplifies the voltage drop
across the sense resistor with a gain set by external resistors
R1, R2, R3, and R4 (where R1 = R2, R3 = R4). Precision
resistors are required for high accuracy, and the gain is set
to utilize the full scale of the ADC for the highest resolution.
R3
VLOAD
VDD
VDD
VDD
Load
R1
Microcontroller
+
RSENSE
ADC
control
−
R2
R4
Figure 20. Low−Side Current Sensing
Differential Amplifier for Bridged Circuits
produced is relatively small and needs to be amplified before
going into an ADC. Precision amplifiers are recommended
in these types of applications due to their high gain, low
noise, and low offset voltage.
Sensors to measure strain, pressure, and temperature are
often configured in a Wheatstone bridge circuit as shown in
Figure 21. In the measurement, the voltage change that is
VDD
VDD
−
+
Figure 21. Bridge Circuit Amplification
EMI Susceptibility and Input Filtering
General Layout Guidelines
Op amps have varying amounts of EMI susceptibility.
Semiconductor junctions can pick up and rectify EMI
signals, creating an EMI−induced voltage offset at the
output, adding another component to the total error. Input
pins are the most sensitive to EMI. The NCS21871 op amp
family integrates low−pass filters to decrease sensitivity to
EMI.
To ensure optimum device performance, it is important to
follow good PCB design practices. Place 0.1 mF decoupling
capacitors as close as possible to the supply pins. Keep traces
short, utilize a ground plane, choose surface−mount
components, and place components as close as possible to
the device pins. These techniques will reduce susceptibility
to electromagnetic interference (EMI). Thermoelectric
effects can create an additional temperature dependent
offset voltage at the input pins. To reduce these effects, use
metals with low thermoelectric−coefficients and prevent
temperature gradients from heat sources or cooling fans.
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NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874
UDFN8 Package Guidelines
center pad can be electrically connected to VSS or it may be
left floating. When connected to VSS, the center pad acts as
a heat sink, improving the thermal resistance of the part.
The UDFN8 package has an exposed leadframe die pad on
the underside of the package. This pad should be soldered to
the PCB, as shown in the recommended soldering footprint
in the Package Dimensions section of this datasheet. The
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NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874
PACKAGE DIMENSIONS
SC−88A (SC−70−5/SOT−353)
CASE 419A−02
ISSUE L
A
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
G
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5
4
3
−B−
S
INCHES
DIM MIN MAX
MILLIMETERS
MIN
1.80
1.15
0.80
0.10
MAX
2.20
1.35
1.10
0.30
1
2
A
B
C
D
G
H
J
0.071
0.045
0.031
0.004
0.087
0.053
0.043
0.012
0.026 BSC
0.65 BSC
M
M
B
D 5 PL
0.2 (0.008)
---
0.004
0.004
0.004
0.010
0.012
---
0.10
0.10
0.10
0.25
0.30
K
N
S
N
0.008 REF
0.20 REF
0.079
0.087
2.00
2.20
J
C
K
H
SOLDER FOOTPRINT
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
mm
inches
ǒ
Ǔ
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
13
NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874
PACKAGE DIMENSIONS
TSOP−5
CASE 483−02
ISSUE K
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
NOTE 5
5X
D
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE. DIMENSION A.
5. OPTIONAL CONSTRUCTION: AN ADDITIONAL
TRIMMED LEAD IS ALLOWED IN THIS LOCATION.
TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2
FROM BODY.
0.20 C A B
2X
0.10
T
M
5
4
3
2X
0.20
T
B
S
1
2
K
B
A
DETAIL Z
G
A
MILLIMETERS
TOP VIEW
DIM
A
B
MIN
3.00 BSC
1.50 BSC
MAX
DETAIL Z
C
D
0.90
0.25
1.10
0.50
J
G
H
J
K
M
S
0.95 BSC
C
0.01
0.10
0.20
0
0.10
0.26
0.60
10
3.00
0.05
H
SEATING
PLANE
END VIEW
C
_
_
SIDE VIEW
2.50
SOLDERING FOOTPRINT*
1.9
0.074
0.95
0.037
2.4
0.094
1.0
0.039
0.7
0.028
mm
inches
ǒ
Ǔ
SCALE 10:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
14
NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874
PACKAGE DIMENSIONS
UDFN8, 2x2
CASE 517AW
ISSUE A
A
B
E
NOTES:
D
L
L
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINALS AND IS MEASURED BETWEEN
0.15 AND 0.30 MM FROM THE TERMINAL
TIP.
L1
PIN ONE
REFERENCE
DETAIL A
ALTERNATE
CONSTRUCTIONS
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. FOR DEVICE OPN CONTAINING W OPTION,
DETAIL B ALTERNATE CONSTRUCTION IS
2X
0.10
C
2X
0.10
C
NOT APPLICABLE.
TOP VIEW
MILLIMETERS
MOLD CMPD
DIM MIN
MAX
0.55
0.05
EXPOSED Cu
A
A1
A3
b
D
D2
E
E2
e
L
0.45
0.00
DETAIL B
A
0.13 REF
0.10
C
A3
C
0.18
0.30
2.00 BSC
A3
A1
1.50
1.70
0.08
C
DETAIL B
2.00 BSC
A1
SIDE VIEW
0.80
1.00
NOTE 4
ALTERNATE
SEATING
PLANE
0.50 BSC
CONSTRUCTION
0.20
0.45
L1
−−−
0.15
D2
DETAIL A
RECOMMENDED
8X L
SOLDERING FOOTPRINT*
1
4
8X
0.50
1.73
PACKAGE
OUTLINE
E2
b
5
8
8X
e
1.00
2.30
0.10 C A B
e/2
0.05
C
NOTE 3
BOTTOM VIEW
1
8X
0.30
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
15
NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874
PACKAGE DIMENSIONS
Micro8t
CASE 846A−02
ISSUE J
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. 846A-01 OBSOLETE, NEW STANDARD 846A-02.
H
E
E
MILLIMETERS
INCHES
NOM
−−
0.003
0.013
0.007
0.118
DIM
A
A1
b
c
D
E
MIN
−−
NOM
−−
MAX
MIN
−−
MAX
0.043
0.006
0.016
0.009
0.122
0.122
PIN 1 ID
e
1.10
0.15
0.40
0.23
3.10
3.10
b 8 PL
0.05
0.25
0.13
2.90
2.90
0.08
0.002
0.010
0.005
0.114
0.114
0.33
M
S
S
0.08 (0.003)
T B
A
0.18
3.00
3.00
0.118
e
L
0.65 BSC
0.55
4.90
0.026 BSC
0.021
0.193
SEATING
PLANE
0.40
4.75
0.70
5.05
0.016
0.187
0.028
0.199
−T−
H
E
A
0.038 (0.0015)
L
A1
c
RECOMMENDED
SOLDERING FOOTPRINT*
8X
8X
0.48
0.80
5.25
0.65
PITCH
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
16
NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AK
NOTES:
1. DIMENSIONING AND TOLERANCING PER
−X−
ANSI Y14.5M, 1982.
A
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
MILLIMETERS
DIM MIN MAX
INCHES
G
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N X 45
_
SEATING
PLANE
1.27 BSC
0.050 BSC
−Z−
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
0.10 (0.004)
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
M
S
S
X
0.25 (0.010)
Z
Y
SOLDERING FOOTPRINT*
1.52
0.060
7.0
4.0
0.275
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
17
NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874
PACKAGE DIMENSIONS
SOIC−14 NB
CASE 751A−03
ISSUE K
NOTES:
D
A
B
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
14
8
7
A3
E
H
5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
L
DETAIL A
1
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
13X b
M
M
B
0.25
A
A1
A3
b
D
E
1.35
0.10
0.19
0.35
8.55
3.80
1.75 0.054 0.068
0.25 0.004 0.010
0.25 0.008 0.010
0.49 0.014 0.019
8.75 0.337 0.344
4.00 0.150 0.157
M
S
S
B
0.25
C A
DETAIL A
h
A
X 45
_
e
H
h
L
1.27 BSC
0.050 BSC
6.20 0.228 0.244
0.50 0.010 0.019
1.25 0.016 0.049
5.80
0.25
0.40
0
M
A1
e
M
7
0
7
_
_
_
_
SEATING
PLANE
C
SOLDERING FOOTPRINT*
6.50
14X
1.18
1
1.27
PITCH
14X
0.58
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
18
NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874
PACKAGE DIMENSIONS
ECP5, 1.116x0.822x0.58
CASE 971BE
ISSUE O
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