NCS2325DR2G [ONSEMI]
Zero-Drift Operational Amplifier;
| 型号： | NCS2325DR2G |
| 厂家： | 
ONSEMI |
| 描述： | Zero-Drift Operational Amplifier 放大器 光电二极管 |
| 文件： | 总15页 (文件大小：762K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCS325, NCS2325,
NCS4325
50 mV Offset, 0.25 mV/5C,
35 mA, Zero-Drift
Operational Amplifier
www.onsemi.com
The NCS325, NCS2325 and NCS4325 are CMOS operational
amplifiers providing precision performance. The Zero−Drift
architecture allows for continuous auto−calibration, which provides
very low offset, near−zero drift over time and temperature, and near
flat 1/f noise at only 35 mA (max) quiescent current. These benefits
make these devices ideal for precision DC applications. These op
amps provide rail−to−rail input and output performance and are
optimized for low voltage operation as low as 1.8 V and up to 5.5 V.
The single channel NCS325 is available in the space−saving SOT23−5
package. The dual channel NCS2325 is available in Micro8, SOIC−8,
and DFN−8. The quad channel NCS4325 is available in SOIC−14.
MARKING
DIAGRAMS
5
TSOP−5
(SOT23−5)
SN SUFFIX
CASE 483
32A AYWG
G
1
1
1
DFN−8
MN SUFFIX
CASE 506BW
NCS
2325
ALYWG
G
Features
1
• Low Offset Voltage: 14 mV typ, 50 mV max at 25°C for NCS325
• Zero Drift: 0.25 mV/°C max
8
• Low Noise: 1 mVpp, 0.1 Hz to 10 Hz
• Quiescent Current: 21 mA typ, 35 mA max at 25°C
• Supply Voltage: 1.8 V to 5.5 V
• Rail−to−Rail Input and Output
• Internal EMI Filtering
SOIC−8
D SUFFIX
CASE 751
N2325
AYWW
G
1
1
8
MSOP−8
DM SUFFIX
CASE 846A
2325
AYWG
G
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
1
1
Typical Applications
14
• Battery Powered Instruments
• Temperature Measurements
• Transducer Applications
• Electronic Scales
SOIC−14
SUFFIX
CASE 751A
NCS4325G
AWLYWW
1
1
• Medical Instrumentation
• Current Sensing
A
Y
WL
= Assembly Location
= Year
= Wafer Lot
This document contains information on some products that are still under development.
ON Semiconductor reserves the right to change or discontinue these products without
notice.
W or WW = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
October, 2016 − Rev. 3
NCS325/D
NCS325, NCS2325, NCS4325
PIN CONNECTIONS
Dual Channel
NCS2325
Quad Channel
NCS4325
Single Channel
NCS325
OUT 1
1
2
3
4
8
7
6
5
1
2
3
4
5
6
7
14
13
12
11
10
9
OUT 1
IN− 1
1
2
3
5
VDD
IN−
OUT
VSS
IN+
VDD
OUT 4
IN− 4
−
+
OUT 2
IN− 1
IN+ 1
VSS
−
+
−
+
IN− 2
IN+ 2
IN+ 4
VSS
IN+ 1
VDD
−
+
4
SOT23
DFN−8, SOIC−8, MSOP−8
IN+ 2
IN− 2
OUT 2
IN+ 3
IN− 3
OUT 3
+
−
+
−
8
SOIC14
ORDERING INFORMATION
Configuration
†
Device
NCS325SN2T1G
Package
Shipping
Single
SOT23−5 / TSOP−5
DFN8
3000 / Tape & Reel
3000 / Tape & Reel
2500 / Tape & Reel
4000 / Tape & Reel
2500 / Tape & Reel
Dual
NCS2325MNTXG* (In Development)
NCS2325DR2G
SOIC−8
NCS2325DMR2G
Micro8 / MSOP−8
SOIC−14
Quad
NCS4325DR2G* (In Development)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*Contact local sales office for more information
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2
NCS325, NCS2325, NCS4325
ABSOLUTE MAXIMUM RATINGS Over operating free−air temperature, unless otherwise stated.
Parameter
Rating
Unit
Supply Voltage
6
V
INPUT AND OUTPUT PINS
Input Voltage (Note 1)
Input Current (Note 1)
Output Short Circuit Current (Note 2)
TEMPERATURE
(V ) − 0.3 to (V ) + 0.3
V
SS
DD
10
mA
Continuous
Operating Temperature
Storage Temperature
Junction Temperature
ESD RATINGS (Note 3)
Human Body Model (HBM)
Machine Model (MM)
OTHER RATINGS
−40 to +150
−65 to +150
+150
°C
°C
°C
4000
200
V
V
Latch−up Current (Note 4)
MSL
100
mA
Level 1
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Input terminals are diode−clamped to the power−supply rails. Input signals that can swing more than 0.3 V beyond the supply rails should
be current limited to 10 mA or less
2. Short−circuit to ground.
3. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (JEDEC standard: JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (JEDEC standard: JESD22−A115)
4. Latch−up Current tested per JEDEC standard: JESD78.
THERMAL INFORMATION
Thermal Metric
Symbol
Package
SOT23−5 / TSOP−5
Micro8 / MSOP−8
SOIC−8
Value
235
298
250
130
216
Unit
Junction to Ambient (Note 5)
q
°C/W
JA
DFN−8
SOIC−14
2
5. As mounted on an 80x80x1.5 mm FR4 PCB with 650 mm and 2 oz (0.034 mm) thick copper heat spreader. Following JEDEC JESD/EIA
51.1, 51.2, 51.3 test guidelines
OPERATING CONDITIONS
Parameter
Symbol
Range
Unit
V
Supply Voltage (V − V
)
V
T
1.8 to 5.5
−40 to 125
DD
SS
S
Specified Operating Range
Input Common Mode Voltage Range
°C
V
A
V
ICMR
V
−0.1 to V +0.1
SS DD
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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3
NCS325, NCS2325, NCS4325
ELECTRICAL CHARACTERISTICS: V = 1.8 V to 5.5 V
S
At T = +25°C, R = 10 kW connected to midsupply, V
= V
= midsupply, unless otherwise noted.
A
L
CM
OUT
Boldface limits apply over the specified temperature range, T = −40°C to 125°C, guaranteed by characterization and/or design.
A
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Symbol
Conditions
Min
Typ
Max
Unit
V
OS
NCS325
V
V
= +5V
= +5V
14
14
50
75
mV
S
NCS2325,
NCS4325
S
Offset Voltage Drift vs Temp
Input Bias Current
DV /DT
T = −40°C to 125°C
A
0.02
50
0.25
mV/°C
pA
OS
I
IB
Input Offset Current
I
100
108
pA
OS
Common Mode Rejection Ratio
CMRR
NCS325
V
SS
V
SS
V
SS
+0.3 < V
< V − 0.3,
85
90
90
dB
CM
DD
V
S
= 1.8 V
+0.3 < V
< V − 0.3,
110
110
CM
DD
V
S
= 5.5 V
NCS2325,
NCS4325
+0.3 < V
< V − 0.3,
= 5 V
CM DD
V
S
V
V
−0.1 < V
−0.1 < V
< V + 0.1, V = 1.8 V
80
92
SS
CM
DD
S
< V + 0.1, V = 5.5 V
SS
CM
DD
S
Input Resistance
Input Capacitance
R
C
15
GW
pF
pF
pF
pF
IN
IN
NCS325
Differential
Common Mode
Differential
1.8
3.5
4.1
8.0
NCS2325,
NCS4325
Common Mode
OUTPUT CHARACTERISTICS
Output Voltage High
V
Output swing within V
Output swing within V
12
100
100
mV
mV
mA
kW
OH
DD
Output Voltage Low
V
8
OL
SC
SS
Short Circuit Current
I
5
1.4
Open Loop Output Impedance
Z
f = 350 kHz, I = 0 mA, V = 1.8 V
O S
out−OL
f = 350 kHz, I = 0 mA, V = 5.5 V
2.7
O
S
Capacitive Load Drive
NOISE PERFORMANCE
Voltage Noise Density
Voltage Noise
C
e
See Figure
L
f
= 1 kHz
100
0.3
1
nV / √Hz
N
IN
e
P−P
f
f
= 0.01 Hz to 1 Hz
= 0.1 Hz to 10 Hz
mV
PP
IN
mV
PP
IN
Current Noise Density
i
N
f
IN
= 10 Hz
0.3
pA / √Hz
DYNAMIC PERFORMANCE
Open Loop Voltage Gain
Gain Bandwidth Product
A
R = 10 kW, V = 5.5 V
114
350
270
dB
VOL
L
S
GBWP
NCS325
kHz
C = 100 pF, R = 10 kW
L
L
NCS2325,
NCS4325
C = 100 pF, R = 10 kW
L
L
Phase Margin
Gain Margin
Slew Rate
f
C = 100 pF
60
20
°
M
L
A
C = 100 pF
L
dB
M
SR
G = +1, C = 100 pF, Vs = 1.8 V
0.10
0.16
V/ms
L
G = +1, C = 100 pF, Vs = 5.5 V
L
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
100
107
dB
T = −40°C to 125°C
A
95
Turn−on Time
t
V
= 5 V
100
21
ms
ON
S
Quiescent Current
I
Q
No load
35
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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4
NCS325, NCS2325, NCS4325
12
10
8
100
80
90
V
V
= 5 V
S
Gain, V = 1.8 V
S
60
= midsupply
CM
Gain, V = 5.5 V
S
T = 25°C
A
Phase, V = 1.8 V
60
S
GAIN
30
Sample size = 31
Phase, V = 5.5 V
S
40
20
0
0
−30
−60
−90
−120
−150
−180
6
PHASE
−20
4
−40
−60
−80
2
0
0
3
6
9
12 15 18
21 24 27
30
10
100
1000
10k
100k
1M
OFFSET VOLTAGE (mV)
FREQUENCY (Hz)
Figure 1. Offset Voltage Distribution
Figure 2. Gain and Phase vs. Frequency
100
90
80
70
60
50
40
30
20
10
0
100
V
= 5 V
T = 25°C
S
A
90
80
70
60
50
40
30
20
10
0
R = 10 kW
L
T = 25°C
A
V
S
V
S
= 1.8 V
= 5 V
V
V
SS
DD
10
100
1000
FREQUENCY (Hz)
10k
100k
10
100
1000
10k
100k
1M
FREQUENCY (Hz)
Figure 3. CMRR vs. Frequency
Figure 4. PSRR vs. Frequency
3
2
500
400
V
, V = 5 V
T = 25°C
A
V
= 1.8 V
OH
S
S
T = 25°C
A
300
IIB+
IIB−
200
V
OH
, V = 1.8 V
S
1
100
0
0
−100
−200
−300
−400
−500
V
, V = 1.8 V
S
OL
−1
−2
−3
V
, V = 5 V
S
OL
0
1
2
3
4
5
6
7
8
9
10
−1 −0.8 −0.6 −0.4 −0.2
0
0.2 0.4 0.6 0.8
1
OUTPUT CURRENT (mA)
COMMON MODE VOLTAGE (V)
Figure 6. Input Bias Current vs. Common
Mode Voltage, VS = 1.8 V
Figure 5. Output Voltage Swing vs. Output
Current
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5
NCS325, NCS2325, NCS4325
500
400
500
V
= 5.5 V
V
S
= 5.5 V
IIB+
S
400
300
T = 25°C
A
IIB+
IIB−
IIB−
300
200
200
100
100
0
0
−100
−200
−300
−400
−500
−100
−200
−300
−400
−500
−3 −2.5 −2 −1.5 −1
0
0.5
1
1.5
2
2.5
3
3.5
−50
−25
0
25
50
70
100
125 150
COMMON MODE VOLTAGE (V)
TEMPERATURE (°C)
Figure 7. Input Bias Current vs. Common
Mode Voltage, VS = 5.5 V
Figure 8. Input Bias Current vs. Temperature
1.0
0.75
0.5
3
2
T = 25°C
A
V
= 5.0 V
S
IIB+
IIB−
R = 10 kW
L
C = 10 pF
L
Av = 1 V/V
1
0.25
0
0
−0.25
−0.5
−0.75
−1
−1
−2
−3
−1 −0.75 −0.5 −0.25
0
0.25
0.5 0.75
1
−200 −100
0
100
200
300
400
500
DIFFERENTIAL VOLTAGE (V)
TIME (ms)
Figure 9. Input Bias Current vs. Input
Differential Voltage
Figure 10. Large Signal Step Response
0.2
0.1
3
2
V
= 5.0 V
S
Input
Output
R = 10 kW
L
C = 10 pF
L
Av = 1 V/V
1
0
0
−1
−2
−3
V
= 5.0 V
S
−0.1
−0.2
R = 10 kW
L
C = 10 pF
L
Av = −10 V/V
−200 −100
0
100
200
300
400
500
−100
−50
0
50
100
150
200
TIME (ms)
TIME (ms)
Figure 12. Positive Over Voltage Recovery
Figure 11. Small Signal Step Response
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6
NCS325, NCS2325, NCS4325
3
2
700
V
= 5.0 V
S
Input
Output
R = 10 kW
L
600
500
400
300
200
100
0
Output = 4 V Step
1
0
−1
−2
−3
V
= 5.0 V
S
R = 10 kW
L
C = 10 pF
L
Av = −10 V/V
−100
−50
0
50
100
150
200
1
10
100
TIME (ms)
GAIN (dB)
Figure 13. Negative Over Voltage Recovery
Figure 14. Setting Time vs. Closed Loop Gain
70
60
50
40
30
20
10
0
V
S
V
S
= 1.8 V
= 5.5 V
R = 10 kW
Input = 50 mV
L
10
100
LOAD CAPACITANCE (pF)
1000
TIME (1 s/div)
Figure 15. Small Signal Overshoot vs. Load
Capacitance
Figure 16. 0.1 Hz to 10 Hz Noise
1000
100
10
1000
100
10
V
S
V
S
= 1.8 V
= 5.5 V
1
0.1
0.01
V
S
V
S
= 1.8 V
= 5.5 V
1
10
100
FREQUENCY (Hz)
1000
0.1
1
10
100
1000
10k
FREQUENCY (Hz)
Figure 18. Current Noise Spectral Density vs.
Frequency
Figure 17. Voltage Noise Spectral Density vs.
Frequency
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7
NCS325, NCS2325, NCS4325
0.2
0.18
0.16
0.14
0.12
0.1
30
V
S
= 5.5 V
V
= 5.0 V
= 5 V
PP
S
SR−
SR+
25
20
V
IN
R = 10 kW
C = 100 pF
Av = −10 V/V
L
V
S
= 1.8 V
L
V
V
= 1.8 V
15
S
= 1.5 V
IN
SR+
10
SR−
0.08
5
0
0.06
−40 −20
0
20
40
60
80
100 120 140
−40 −20
0
20
40
60
80
100 120 140
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 19. Slew Rate vs. Temperature
Figure 20. Quiescent Current vs. Temperature
6
5
5
4.99
4.98
4.97
4.96
4.95
4.94
4.93
4.92
4.90
4.89
4.88
V
DD
Pulse
4
3
Output
2
1
0
R = 10 kW
T = 25°C
A
L
4.87
4.86
120
−1
−20
0
20
40
60
80
100
TIME (ms)
Figure 21. Turn−on Response
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8
NCS325, NCS2325, NCS4325
APPLICATIONS INFORMATION
INPUT VOLTAGE
EMI SUSCEPTIBILITY AND INPUT FILTERING
Op amps have varying amounts of EMI susceptibility.
Semiconductor junctions can pick up and rectify EMI
signals, creating an EMI−induced voltage offset at the
output, adding another component to the total error. Input
pins are the most sensitive to EMI. The NCS325, NCS2325
and NCS4325 integrate a low−pass filter to decrease its
sensitivity to EMI.
The NCS325, NCS2325 and NCS4325 have rail−to−rail
common mode input voltage range. Diodes between the
inputs and the supply rails keep the input voltage from
exceeding the rails.
VDD
10 kΩ
IN+
IN−
APPLICATION CIRCUITS
+
Low−Side Current Sensing
The goal of low−side current sensing is to detect
over−current conditions or as a method of feedback control.
A sense resistor is placed in series with the load to ground.
Typically, the value of the sense resistor is less than 100 mW
to reduce power loss across the resistor. The op amp
amplifies the voltage drop across the sense resistor with a
gain set by external resistors R1, R2, R3, and R4 (where R1
= R2, R3 = R4). Precision resistors are required for high
accuracy, and the gain is set to utilize the full scale of the
ADC for the highest resolution.
−
10 kΩ
VSS
Figure 22. Equivalent Input Circuit
R3
VLOAD
VDD
VDD
VDD
Load
R1
Microcontroller
+
RSENSE
ADC
control
−
R2
R4
Figure 23. Low−Side Current Sensing
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9
NCS325, NCS2325, NCS4325
Differential Amplifier for Bridged Circuits
produced is relatively small and needs to be amplified before
going into an ADC. Precision amplifiers are recommended
in these types of applications due to their high gain, low
noise, and low offset voltage.
Sensors to measure strain, pressure, and temperature are
often configured in a Wheatstone bridge circuit as shown in
Figure 24. In the measurement, the voltage change that is
VDD
VDD
−
+
Figure 24. Bridge Circuit Amplification
GENERAL LAYOUT GUIDELINES
the device pins. These techniques will reduce susceptibility
to electromagnetic interference (EMI). Thermoelectric
effects can create an additional temperature dependent
offset voltage at the input pins. To reduce these effects, use
metals with low thermoelectric−coefficients and prevent
temperature gradients from heat sources or cooling fans.
To ensure optimum device performance, it is important to
follow good PCB design practices. Place 0.1 mF decoupling
capacitors as close as possible to the supply pins. Keep traces
short, utilize a ground plane, choose surface−mount
components, and place components as close as possible to
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10
NCS325, NCS2325, NCS4325
PACKAGE DIMENSIONS
TSOP−5
CASE 483−02
ISSUE K
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
NOTE 5
5X
D
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE. DIMENSION A.
5. OPTIONAL CONSTRUCTION: AN ADDITIONAL
TRIMMED LEAD IS ALLOWED IN THIS LOCATION.
TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2
FROM BODY.
0.20 C A B
2X
0.10
T
M
5
4
3
2X
0.20
T
B
S
1
2
K
B
A
DETAIL Z
G
A
MILLIMETERS
TOP VIEW
DIM
A
B
MIN
3.00 BSC
1.50 BSC
MAX
DETAIL Z
C
D
0.90
0.25
1.10
0.50
J
G
H
J
K
M
S
0.95 BSC
C
0.01
0.10
0.20
0
0.10
0.26
0.60
0.05
H
SEATING
PLANE
END VIEW
C
10
_
_
SIDE VIEW
2.50
3.00
SOLDERING FOOTPRINT*
1.9
0.074
0.95
0.037
2.4
0.094
1.0
0.039
0.7
0.028
mm
inches
ǒ
Ǔ
SCALE 10:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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11
NCS325, NCS2325, NCS4325
PACKAGE DIMENSIONS
DFN8, 3x3, 0.65P
CASE 506BW−01
ISSUE O
NOTES:
A
B
D
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
L
L
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30mm FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
L1
DETAIL A
OPTIONAL
CONSTRUCTIONS
E
MILLIMETERS
PIN ONE
DIM MIN
0.80
A1 0.00
MAX
1.00
0.05
REFERENCE
A
2X
EXPOSED Cu
MOLD CMPD
0.10
C
A3
b
0.20 REF
0.25
0.35
D
3.00 BSC
2.50
3.00 BSC
1.75
0.65 BSC
2X
0.10
C
C
D2 2.30
E
E2 1.55
e
K
L
TOP VIEW
DETAIL B
A
C
DETAIL B
(A3)
OPTIONAL
0.05
CONSTRUCTIONS
0.20
0.35
−−−
0.45
0.15
L1 0.00
0.05
C
NOTE 4
SEATING
PLANE
A1
SIDE VIEW
D2
RECOMMENDED
SOLDERING FOOTPRINT*
DETAIL A
8X
0.62
2.50
1
4
8X
L
E2
3.30
1.75
8X
K
8
5
8X b
1
e/2
08.4X0
0.10 C A B
e
0.65
PITCH
NOTE 3
C
0.05
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
12
NCS325, NCS2325, NCS4325
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AK
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−X−
A
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
MILLIMETERS
DIM MIN MAX
INCHES
G
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N X 45
_
SEATING
PLANE
1.27 BSC
0.050 BSC
−Z−
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
0.10 (0.004)
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
M
S
S
X
0.25 (0.010)
Z
Y
SOLDERING FOOTPRINT*
1.52
0.060
7.0
4.0
0.275
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
13
NCS325, NCS2325, NCS4325
PACKAGE DIMENSIONS
Micro8t
CASE 846A−02
ISSUE J
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. 846A-01 OBSOLETE, NEW STANDARD 846A-02.
H
E
E
MILLIMETERS
INCHES
NOM
−−
0.003
0.013
0.007
0.118
DIM
A
A1
b
c
D
MIN
−−
NOM
−−
MAX
MIN
−−
MAX
0.043
0.006
0.016
0.009
0.122
0.122
PIN 1 ID
e
1.10
0.15
0.40
0.23
3.10
3.10
b 8 PL
0.05
0.25
0.13
2.90
2.90
0.08
0.002
0.010
0.005
0.114
0.114
0.33
M
S
S
0.08 (0.003)
T B
A
0.18
3.00
E
3.00
0.118
e
L
0.65 BSC
0.55
4.90
0.026 BSC
0.021
0.193
SEATING
PLANE
0.40
4.75
0.70
5.05
0.016
0.187
0.028
0.199
−T−
H
E
A
0.038 (0.0015)
L
A1
c
RECOMMENDED
SOLDERING FOOTPRINT*
8X
8X
0.48
0.80
5.25
0.65
PITCH
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
14
NCS325, NCS2325, NCS4325
PACKAGE DIMENSIONS
SOIC−14 NB
CASE 751A−03
NOTES:
ISSUE L
D
A
B
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
14
8
7
A3
E
H
5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
L
DETAIL A
1
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
13X b
M
M
B
0.25
A
A1
A3
b
D
E
1.35
0.10
0.19
0.35
8.55
3.80
1.75 0.054 0.068
0.25 0.004 0.010
0.25 0.008 0.010
0.49 0.014 0.019
8.75 0.337 0.344
4.00 0.150 0.157
M
S
S
B
0.25
C A
DETAIL A
h
A
X 45
_
e
H
h
L
1.27 BSC
0.050 BSC
6.20 0.228 0.244
0.50 0.010 0.019
1.25 0.016 0.049
5.80
0.25
0.40
0
0.10
M
A1
e
M
7
0
7
_
_
_
_
SEATING
PLANE
C
SOLDERING FOOTPRINT*
6.50
14X
1.18
1
1.27
PITCH
14X
0.58
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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