NCS20282FCSTAG [ONSEMI]
Dual Operational Amplifier, 7 MHz Bandwidth with Shutdown;
| 型号： | NCS20282FCSTAG |
| 厂家： | 
ONSEMI |
| 描述： | Dual Operational Amplifier, 7 MHz Bandwidth with Shutdown |
| 文件： | 总11页 (文件大小：1255K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Dual Operational Amplifier,
7 MHz Bandwidth with
Shutdown
NCS20282
The NCS20282 high precision op amp features a wide bandwidth
along with shutdown. These amplifiers provide low bias current useful
for transimpedance applications. The wide bandwidth eases the design
of active filters. The NCS20282 is specified for operation from −40°C
to +125°C.
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WLCSP9
CASE 567UW
WLCSP9
CASE 567YD
Features
• High Bandwidth: 7 MHz typical
• Low Bias Current: 50 pA typical
• Rail−to−Rail Input/Output
• Shutdown Current: 1 mA max
• Offset Voltage: 1.5 mV max
• Offset Drift: 10 mV/°C max
• Supply Voltage: 2.5 V to 5.5 V
MARKING DIAGRAM
AAA
AYW
AAA = Specific Device Code
A
Y
= Assembly Location
= Year
• These Devices are Pb−free, Halogen Free/BFR Free and are RoHS
W
= Work Week
Compliant
(Note: Microdot may be in either location)
Typical Applications
• Transducer Applications
• Sensor Conditioning
• Medical Instrumentation
• Impedance Sensing
PIN CONNECTIONS
A3
A2
A1
OUTB
VDD
OUTA
VDD
B3
B2
B1
−INB
EN
−INA
+INA
+
C3
+INB
C2
VSS
C1
+INA
A
B
OUTA
OUTB
−
−INA
EN
Package Bottom View (Bump Up)
+
+INB
−
−INB
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 9 of this data sheet.
VSS
This document contains information on some products that are still under development.
ON Semiconductor reserves the right to change or discontinue these products without
notice.
© Semiconductor Components Industries, LLC, 2020
1
Publication Order Number:
August, 2020 − Rev. 0
NCS20282/D
NCS20282
Table 1. ABSOLUTE MAXIMUM RATINGS Over operating free−air temperature, unless otherwise stated.
Parameter
Rating
Unit
Supply Voltage (VDD− VSS)
INPUT AND OUTPUT PINS
Input Voltage (Note 1)
7
V
(V – 0.5) to 7
V
mA
V
SS
Input Current (Note 1)
5
7
Output Pin Voltage, Disabled
Output Short Circuit Current (Note 2)
TEMPERATURE
Continuous
Operating Temperature
Storage Temperature
Junction Temperature
ESD RATINGS (Note 3)
Human Body Model (HBM)
Charged Device Model (CDM)
OTHER RATINGS
–40 to +125
–65 to +150
+150
°C
°C
°C
2000
1000
V
V
Latch−up Current (Note 4)
MSL
100
mA
Level 1
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. The input voltage at any pin may exceed the voltage shown if the current at that pin is limited to 5 mA.
2. Short−circuit to ground.
3. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per JEDEC standard JS−001−2017
ESD Charged Device Model tested per JEDEC standard JS−002−2014
4. Latch−up Current tested per JEDEC standard: JESD78
Table 2. THERMAL INFORMATION
2
Parameter
Symbol
Cu Area mm
1.0 oz
301
263
246
229
220
211
2.0 oz
263
230
215
204
196
188
183
179
175
173
Unit
Thermal Resistance
Junction to Ambient
Q
JA
10
25
°C/W
40
80
140
250
350
500
650
800
206
200
197
194
NOTE: Four layer JSEC JESD51−7
Table 3. OPERATING CONDITIONS
Parameter
Symbol
Range
Units
V
Supply Voltage (V − V
)
V
S
2.5 to 5.5
DD
SS
Specified Operating Temperature Range
Input Common Mode Voltage Range
T
−40 to +125
°C
A
V
CM
V
SS
to V
DD
V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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2
NCS20282
Table 4. ELECTRICAL CHARACTERISTICS: V = 2.5 V to 5.5 V
S
At T = +25°C, R = 10 kW, V
= V
= midsupply, Enable input connected to V , unless otherwise noted.
A
L
CM
OUT DD
Boldface limits apply over the specified temperature range, T = –40°C to +125°C, guaranteed by characterization and/or design.
A
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Symbol
Conditions
Min
Typ
Max
Units
V
OS
300
2
1500
10
mV
mV/°C
pA
Offset Voltage Drift vs Temp
Input Bias Current (Note 5)
Input Offset Current
DV /DT
OS
I
IB
50
10
800
I
pA
OS
Input Common−Mode Voltage Range
Common Mode Rejection Ratio
Input Resistance
V
V
SS
to V
86
10
10
2
V
CM
DD
CMRR
V
= −0.1V to (V +0.1V)
66
96
dB
CM
DD
R
Differential
Common Mode
Differential
GW
IN
Input Capacitance
C
pF
IN
Common Mode
5
OUTPUT CHARACTERISTICS
Open Loop Voltage Gain
A
VOL
0.4 V ≤ V
≤ V – 0.4 V
116
dB
OUT
DD
Closed Loop Output Impedance
Z
See Figure 23
See
Figure 23
W
OUT_CL
Output Voltage High, Referenced to V
V
V
V
−3
V
V
−10
mV
mV
mA
DD
OH
DD
SS
DD
Output Voltage Low, Referenced to V
Short Circuit Current (Note 5)
V
+6
+10
SS
OL
SC
SS
I
Sinking Current
Sourcing Current
10
10
15
15
Capacitive Load Drive (Note 5)
DYNAMIC PERFORMANCE
Gain Bandwidth Product (Note 5)
C
100
300
pF
L
GBW
V
= 3 V;
5.4
7
MHz
S
R = 10 kW, C = 100 pF
L
L
Gain Margin
A
C = 100 pF
50
55
5
dB
°
M
L
Phase Margin
Y
C = 100 pF
L
M
Slew Rate
SR
A = +1
V
V/ms
ms
Overload Recovery Time
NOISE PERFORMANCE
Voltage Noise Density
Current Noise Density
POWER SUPPLY
t
V
IN
X A > V
S
1
OR
V
e
N
f
IN
= 10 kHz
20
nV/√Hz
fA/√Hz
i
N
f
IN
= 1 Hz
300
Power Supply Rejection Ratio
Shutdown Enable Time (Notes 5, 6)
Shutdown Disable Time (Note 6)
PSRR
90
120
30
dB
ms
ms
nA
t
50
ON
t
30
OFF
Shutdown Leakage
Input
Output
V
= V +400 mV
500
500
IN
S
V
= V +1 V
S
OUT
Enable Input Threshold Voltage
Enable Input Leakage Current
Quiescent Current
V
Operating
Disabled
Enable = + 5.0 V
Enable = V
1.3
V
th(EN)
0.5
I
1.1
1.1
850
0.3
mA
mA
Enable
SS
I
Q
Per Channel Quiescent
1300
1
No load
Shutdown
5. Guaranteed by design and/or characterization
6. Shutdown Disable Time (t
) and Enable Time (t ) are defined as the time between the 50% point of the signal applied to the EN pin and
OFF
ON
the point at which the output voltage reaches the 10% (disable) or 90% (enable) level.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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3
NCS20282
TYPICAL CHARACTERISTICS
Figure 1. CMRR vs. Frequency
Figure 2. PSRR vs. Frequency
Figure 3. Input Bias Current vs.
VCM at VS = 2.5 V
Figure 4. Input Bias Current vs.
VCM at VS = 3.3 V
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4
NCS20282
TYPICAL CHARACTERISTICS
Figure 5. Input Bias Current vs.
CM at VS = 5.5 V
Figure 6. Input Offset Current vs.
VCM at VS = 2.5 V
V
Figure 7. Input Offset Current vs.
CM at VS = 3.3 V
Figure 8. Input Offset Current vs.
VCM at VS = 5.5 V
V
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5
NCS20282
TYPICAL CHARACTERISTICS
120
100
80
120
100
80
160
140
120
100
80
160
140
120
100
80
Phase
Phase
15 pF (P)
Gain
100 pF (P)
200 pF (P)
300 pF (P)
500 pF (P)
60
60
40
40
Gain
20
20
60
60
2.5 V (G)
3.3 V (G)
5.5 V (G)
2.5 V (P)
3.3 V (P)
5.5 V (P)
15 pF (G)
40
0
40
0
100 pF (G)
200 pF (G)
300 pF (G)
500 pF (G)
20
−20
20
−20
A = −10 V/V
V
R = 10 KW
C = 15 pF
L
A = −10 V/V
−40
−60
10M 100M
−40
−60
100M
0
0
V
L
R = 10 KW
L
−20
−20
10
100
1K
10K
100K
1M
10
100
1K
10K
100K
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 9. Open Loop Gain and Phase Margin
vs. Frequency
Figure 10. Open Loop Gain and Phase Margin
vs. CL
−50
−60
0.100
0.075
−70
0.050
0.025
0
−80
A = +1 V/V
V
−90
V
S
= 2.5 V
R = 10 KW
L
−100
−110
−120
−130
C = 15 pF
L
−0.025
−0.050
V
V
V
= 2.5 V
= 3.3 V
= 5.5 V
S
S
S
Input
C = 15 pF
−0.075
−0.100
−140
−150
L
10
100
1K
10K
100K
1M
10M
−2
0
2
4
6
8
10
12
FREQUENCY (Hz)
TIME (ms)
Figure 11. Channel Separation
Figure 12. Non Inverting Small Signal
Transient Response
0.100
0.075
0.050
0.025
0
1.00
0.75
0.50
0.25
0
A = +1 V/V
V
V
S
= 2.5 V
A = +1 V/V
V
R = 10 KW
L
V
S
= 5.5 V
R = 10 KW
L
−0.025
−0.050
−0.25
−0.50
Input
C = 15 pF
C = 100 pF
L
Input
L
C = 15 pF
−0.75
−1.00
−0.075
−0.100
L
C = 100 pF
L
−2
0
2
4
6
8
10
12
−2
0
2
4
6
8
10
12
TIME (ms)
TIME (ms)
Figure 13. Non Inverting Small Signal
Transient Response
Figure 14. Non Inverting Large Signal
Transient Response
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NCS20282
TYPICAL CHARACTERISTICS
3.0
2.5
0.100
0.075
2.0
A = +1 V/V
A = +1 V/V
V
V
1.5
0.050
0.025
0
V
S
= 5.5 V
V
S
= 5.5 V
1.0
R = 10 KW
L
R = 10 KW
L
0.5
0
−0.5
−1.0
−1.5
−2.0
−2.5
−3.0
−0.025
−0.050
Input
C = 15 pF
L
C = 100 pF
Input
L
C = 300 pF
C = 15 pF
L
L
−0.075
−0.100
C = 500 pF
L
C = 100 pF
L
−2
0
2
4
6
8
10
12
12
12
−2
0
2
4
6
8
10
12
12
12
TIME (ms)
TIME (ms)
Figure 15. Non Inverting Large Signal
Transient Response
Figure 16. Non Inverting Large Signal
Transient Response vs. CLoad
0.10
0.08
0.06
0.04
0.02
0
0.10
0.08
0.06
0.04
0.02
0
Input
A = −1 V/V
V
A = −1 V/V
V
R = 10 KW
Input
V
C = 15 pF
V = 2.5 V
= 5.5 V
L
S
C = 15 pF
S
L
C = 100 pF
R = 10 KW
L
L
C = 100 pF
L
L
−0.02
−0.04
−0.02
−0.04
−0.06
−0.06
−0.08
−0.10
−0.08
−0.10
−2
0
2
4
6
8
10
−2
0
2
4
6
8
10
TIME (ms)
TIME (ms)
Figure 17. Inverting Small Signal Transient
Response
Figure 18. Inverting Small Signal Transient
Response
1.00
0.75
0.50
0.25
0
3
2
Input
C = 15 pF
L
C = 100 pF
L
1
A = −1 V/V
V
R = 10 KW
Input
V
= 2.5 V
C = 15 pF
C = 100 pF
S
L
0
L
L
A = −1 V/V
= 5.5 V
R = 10 KW
−0.25
−0.50
V
−1
V
S
L
−2
−3
−0.75
−1.00
−2
0
2
4
6
8
10
−2
0
2
4
6
8
10
TIME (ms)
TIME (ms)
Figure 19. Inverting Large Signal Transient
Response
Figure 20. Inverting Large Signal Transient
Response
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NCS20282
TYPICAL CHARACTERISTICS
3.0
2.5
2.0
1.5
1.0
0.5
3.0
2.5
2.0
Enable
Output
Enable
Output
1.5
1.0
0.5
0
0
−0.5
−0.5
−10
0
10
20
30
40
−0.5
0
0.5
1.0
1.5
TIME (ms)
FREQUENCY (ms)
Figure 21. Enable Turn−On Time
Figure 22. Disable Turn−Off Time
1K
100
10
10K
1K
100
1
10
1
0.1
A = +1 V/V
V
0.01
10
100
1K
10K
100K
1M
10M
1
10
100
1K
10K
100K
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 23. Closed Loop Output Impedance
Figure 24. Voltage Noise Density vs.
Frequency
10
8
V
= 5.5 V
S
A = 11 (RTI)
V
6
R = 10 KW
L
4
2
0
−2
−4
−6
−8
−10
0
1
2
3
4
5
6
7
8
9
10
TIME (s)
Figure 25. 0.1 Hz to 10 Hz Noise
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8
NCS20282
DEVICE ORDERING INFORMATION
†
Device
Marking
Bump Type
Case Outline
Package
Shipping
NCS20282FCTTAG
AAA
Sn Plate
567UW
WLCSP−9
(Pb−Free)
5000 / Tape & Reel
5000 / Tape & Reel
NCS20282FCSTAG*
(In Development)
AAA
SAC 405
567YD
WLCSP−9
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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9
NCS20282
PACKAGE DIMENSIONS
WLCSP9, 1.02x1.02x0.33
CASE 567UW
ISSUE A
NOTES:
A
E
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 2009.
B
PIN A1
REFERENCE
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO THE SPHERICAL
CROWNS OF THE SOLDER BALLS.
D
MILLIMETERS
DIM
A
A1
A2
b
D
E
MIN
−−−
0.04
NOM
−−−
0.06
0.23 REF
0.200
1.02
MAX
0.33
0.08
TOP VIEW
0.180
0.99
0.99
0.220
1.05
1.05
A
A2
1.02
0.05
C
C
e
0.35 BSC
0.05
A1
SEATING
PLANE
NOTE 3
C
SIDE VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
PACKAGE
OUTLINE
A1
9X
b
e
e
0.03
C A B
C
B
A
9X
0.20
0.35
1
2
3
PITCH
0.35
BOTTOM VIEW
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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10
NCS20282
PACKAGE DIMENSIONS
WLCSP9, 1.02x1.02x0.441
CASE 567YD
ISSUE O
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◊
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