NCS1002ADR2G [ONSEMI]

Constant Voltage / Constant Current SecondarySide Controller;
NCS1002ADR2G
型号: NCS1002ADR2G
厂家: ONSEMI    ONSEMI
描述:

Constant Voltage / Constant Current SecondarySide Controller

文件: 总9页 (文件大小:101K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
NCS1002A  
Constant Voltage / Constant  
Current Secondary­Side  
Controller  
Description  
http://onsemi.com  
MARKING  
The NCS1002A is a performance upgrade from the NCS1002  
focused on reducing power consumption in applications that require  
more efficient operation. It is a highly integrated solution for  
Switching Mode Power Supply (SMPS) applications requiring a dual  
control loop to perform Constant Voltage (CV) and Constant Current  
(CC) regulation. The NCS1002A integrates a 2.5 V voltage reference  
and two precision op amps. The voltage reference, along with Op Amp  
1, is the core of the voltage control-loop. Op Amp 2 is an independent,  
uncommitted amplifier specifically designed for the current control.  
Key external components needed to complete the two control loops  
are: (a) A resistor divider that senses the output of the power supply  
(battery charger) and fixes the voltage regulation set point at the  
specified value. (b) A sense resistor that feeds the current sensing  
circuit with a voltage proportional to the DC output current. This  
resistor determines the current regulation set point and must be  
adequately rated in terms of power dissipation. The NCS1002A comes  
in a small 8−pin SOIC package and is ideal for space-shrunk  
applications such as battery chargers.  
DIAGRAMS  
8
SOIC−8  
D SUFFIX  
CASE 751  
1002A  
8
ALYWG  
G
1
1
A
L
Y
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= Pb−Free Package  
W
G
(Note: Microdot may be in either location)  
PIN CONNECTIONS  
V
1
2
3
4
8
7
6
5
Out 1  
CC  
Features  
Out 2  
In 2−  
In 2+  
In 1−  
In 1+  
Low Input Offset Voltage: 0.5 mV, Typ  
Input Common-Mode Range includes Ground  
Low Quiescent Current: 75 mA per Op Amp at V = 5 V  
GND  
CC  
Large Output Voltage Swing  
Wide Power Supply Range: 3 V to 36 V  
High ESD Protection: 2 kV  
This is a Pb−Free Device  
(Top View)  
1
2
3
8
7
6
V
CC  
Output 1  
Inputs 1  
Typical Applications  
-
+
Battery Chargers  
Switch Mode Power Supplies  
Output 2  
Inputs 2  
+
-
2.5V  
4
5
GND  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 8 of this data sheet.  
© Semiconductor Components Industries, LLC, 2014  
1
Publication Order Number:  
June, 2014 − Rev. 5  
NCS1002A/D  
NCS1002A  
MAXIMUM RATINGS  
Parameter  
Symbol  
Rating  
36  
Unit  
V
Supply Voltage (V to GND) (Operating Range V = 3 V to 36 V)  
V
CC  
CC  
CC  
Differential Input Voltage  
V
id  
36  
V
Input Voltage  
V
−0.3 to +36  
2000  
V
i
ESD Protection Voltage at Pin  
Maximum Junction Temperature  
Specification Temperature Range (T  
Human Body Model  
V
V
ESD  
T
J
150  
°C  
°C  
°C  
°C  
to T  
)
T
A
−40 to +105  
−55 to +125  
−55 to +150  
min  
max  
Operating Free−Air Temperature Range  
Storage Temperature Range  
T
oper  
T
stg  
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the  
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect  
device reliability.  
THERMAL CHARACTERISTICS  
Parameter  
Symbol  
Rating  
Unit  
Thermal Resistance  
Junction−to−Ambient  
R
175  
°C/W  
q
JA  
http://onsemi.com  
2
NCS1002A  
ELECTRICAL CHARACTERISTICS  
Symbol  
Characteristics  
Conditions  
Min  
Typ  
Max  
Unit  
I
Total Supply Current, excluding current in the Voltage Reference V = 5 V, no  
0.15  
0.25  
mA  
CC  
CC  
load; −40 v T v +105°C  
A
I
Total Supply Current, excluding Current in the Voltage Reference V = 30 V, no  
0.2  
0.3  
mA  
CC  
CC  
load; −40 v T v +105°C  
A
OP AMP 1 (OP AMP WITH NONINVERTING INPUT CONNECTED TO THE INTERNAL V  
)
ref  
(V = 5 V, T = 25°C unless otherwise noted)  
CC  
A
V
IO  
Input Offset Voltage  
T = 25°C  
2.0  
3.0  
mV  
mV  
A
−40 v T v +105°C  
A
DV  
Input Offset Voltage Drift (−40 v T v +105°C)  
7.0  
20  
mV/°C  
nA  
IO  
A
l
IB  
Input Bias Current (Inverting Input Only)  
150  
AVD  
Large Signal Voltage Gain (V = 15 V, R = 2 kW,  
100  
V/mV  
CC  
L
V
ICM  
= 0 V)  
PSRR  
Power Supply Rejection (V = 5.0 V to 30 V, V  
= 2 V)  
80  
20  
100  
40  
dB  
CC  
OUT  
I
Output Source Current (V = 15 V, V = 2.0 V,  
OUT  
mA  
SOURCE  
CC  
V
id  
= 1 V)  
I
Short Circuit to GND (V = 15 V)  
40  
10  
60  
mA  
mA  
O
CC  
I
Output Current Sink (V = −1 V)  
V
CC  
= +15 V, V = 0.2 V  
OUT  
1
SINK  
id  
(Note 1)  
V
= +15 V, V  
= 2 V  
OUT  
10  
26  
26  
27  
27  
20  
27  
mA  
V
CC  
V
OH  
Output Voltage Swing, High (V = 30 V)  
R = 2 kW, T = 25°C  
CC  
L
A
−40 v T v +105°C  
A
R = 10 kW, T = 25°C  
28  
L
A
−40 v T v +105°C  
A
V
Output Voltage Swing, Low  
R = 10 kW, T = 25°C  
5.0  
0.4  
50  
mV  
OL  
L
A
SR  
Slew Rate (AV = +1, V = 0.5 V to 2 V, V = 15 V,  
0.2  
0.5  
V/ms  
i
CC  
R = 2 kW, C = 100 pF)  
L
L
GBP  
THD  
Gain Bandwidth Product (V = 30 V, AV = +1, (Note 1)  
0.9  
MHz  
%
CC  
R = 2 kW, C = 100 pF, f = 100 kHz, V = 10 mV )  
L
L
IN  
PP  
Total Harmonic Distortion (f = 1 kHz, AV = 10,  
R = 2 kW, V = 30 V, V = 2 V  
0.08  
)
PP  
L
CC  
OUT  
OP AMP 2 (INDEPENDENT OP AMP) (V = 5.0 V, T = 25°C unless otherwise noted)  
CC  
A
V
IO  
Input Offset Voltage  
T = 25°C  
0.5  
2.0  
3.0  
mV  
A
−40 v T v +105°C  
A
DV  
I
Input Offset Voltage Drift (−40 v T v +105°C)  
7.0  
2.0  
mV/°C  
IO  
A
Input Offset Current  
T = 25°C  
A
75  
nA  
IO  
−40 v T v +105°C  
150  
150  
200  
A
I
Input Bias Current  
T = 25°C  
A
20  
nA  
V/mV  
dB  
B
−40 v T v +105°C  
A
AVD  
Large Signal Voltage Gain (V = 15 V,  
T = 25°C  
50  
25  
80  
100  
100  
CC  
A
R = 2 kW, V  
= 1.4 V to 11.4 V)  
L
OUT  
−40 v T v +105°C  
A
PSRR  
Power Supply Rejection (V = 5 V to 30 V)  
CC  
1. Guaranteed by design and/or characterization.  
http://onsemi.com  
3
 
NCS1002A  
ELECTRICAL CHARACTERISTICS (continued)  
Symbol  
Characteristics  
Conditions  
Min  
Typ  
Max  
Unit  
OP AMP 2 (INDEPENDENT OP AMP) (continued) (V = 5.0 V, T = 25°C unless otherwise noted)  
CC  
A
V
ICM  
Input Common Mode Voltage Range (Note 2)  
(V = +30 V)  
CC  
T = 25°C  
A
0
V
1.5  
V
CC  
−40 v T v +105°C  
0
V
2.0  
A
CC  
CMRR  
Common Mode Rejection Ratio (Note 4)  
0 to V − 1.7 V,  
70  
60  
20  
85  
dB  
CC  
T = 25°C  
A
0 to V − 2.2 V  
CC  
−40 v T v +105°C  
A
I
Output Current Source (V = 15 V, V  
= 2 V, V = +1 V)  
40  
40  
10  
20  
27  
mA  
mA  
mA  
mA  
V
SOURCE  
CC  
OUT  
ID  
I
O
Short−Circuit to GND (V = 15 V)  
60  
CC  
I
Output Current Sink (V = −1 V)  
V
= +15 V, V = 0.2 V  
OUT  
1
SINK  
ID  
CC  
V
= +15 V, V  
= 2 V  
10  
26  
26  
27  
27  
CC  
OUT  
V
OH  
Output Voltage Swing, High (V = 30 V)  
R = 2 kW, T = 25°C  
CC  
L
A
−40 v T v +105°C  
A
R = 10 kW, T = 25°C  
28  
L
A
−40 v T v +105°C  
A
V
Output Voltage Swing, Low  
R = 10 kW, T = 25°C  
5.0  
0.4  
0.9  
50  
mV  
V/ms  
MHz  
OL  
L
A
SR  
Slew Rate (AV = +1, V = 0.5 V to 3 V, V = 15 V, R = 2 kW, C = 100 pF)  
0.2  
0.5  
i
CC  
L
L
GBP  
Gain Bandwidth Product (V = 30 V, AV = +1,  
CC  
R = 2 kW, C = 100 pF, f = 100 kHz, V = 10 mV ) (Note 4)  
L
L
IN  
PP  
THD  
Total Harmonic Distortion (f = 1 kHz, AV = 10,  
R = 2 kW, V = 30 V, V = 2 V  
0.08  
50  
%
)
PP  
L
CC  
OUT  
e
noise  
Equivalent Input Noise Voltage (f = 1 kHz, R = 100 W, V = 30 V)  
nV/Hz  
S
CC  
VOLTAGE REFERENCE (V = 5.0 V, T = 25°C unless otherwise noted)  
CC  
A
I
Cathode Current  
Reference Voltage (I = 1 mA)  
0.05  
2.49  
2.48  
100  
2.51  
2.52  
30  
mA  
V
K
V
ref  
T = 25°C  
2.5  
2.5  
7.0  
K
A
−40 v T v +105°C  
A
DV  
Reference Deviation over Temperature (V = V , I = 10 mA, −40 v T v  
A
mV  
ref  
KA  
ref  
K
+105°C) (Note 4)  
I
Minimum Cathode Current for Regulation (2.4875 V V 2.5125 V )  
10  
50  
mA  
min  
f
KA  
f
I ZKA I  
Dynamic Impedance (Note 3)  
(V = V , I = 1 mA to 100 mA, f < 1 kHz)  
0.2  
0.5  
W
KA  
ref  
K
2. The input common−mode voltage of either input signal should not be allowed to go negative by more than 0.3 V. The upper end of the  
common−mode range is V − 1.5 V. Both inputs can go to V + 0.3 V without damage.  
CC  
CC  
3. The Dynamic Impedance is defined as l ZKA l = DV / DI .  
KA  
K
4. Guaranteed by design and/or characterization.  
http://onsemi.com  
4
 
NCS1002A  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
5
4
3
2
1
0
OP1  
−50 −30 −10 10  
30  
50  
70  
90  
110 130  
−40  
−20  
0
20  
40  
60  
80  
100 120  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 1. Input Offset Voltage vs. Temperature  
Figure 2. IB vs. Temperature  
2.6  
2.58  
2.56  
2.54  
2.52  
2.5  
2.52  
2.51  
2.5  
2.48  
2.46  
2.44  
2.42  
2.4  
2.49  
2.48  
0
10  
20 30 40 50 60 70 80 90 100  
−40  
−20  
0
20  
40  
60  
80  
100  
CATHODE CURRENT IK (mA)  
TEMPERATURE (°C)  
Figure 3. Vref as a Function of IK  
Figure 4. Vref Over Temperature  
0.5  
0.45  
0.4  
0.35  
0.3  
0.25  
0.2  
−40302010 0 10 20 30 40 50 60 70 80 90 100  
TEMPERATURE (°C)  
Figure 5. Ref Dynamic Impedance vs.  
Temperature  
http://onsemi.com  
5
NCS1002A  
120  
100  
80  
60  
40  
20  
0
120  
100  
80  
60  
40  
20  
0
25°C  
−40°C  
−40°C  
25°C  
105°C  
105°C  
0
5
10  
15  
20  
25  
30  
35  
0
5
10  
15  
20  
25  
30  
35  
SUPPLY VOLTAGE (V)  
SUPPLY VOLTAGE (V)  
Figure 6. NCS1002A PSRR vs. Supply Voltage  
Figure 7. NCS1002A CMRR vs. Supply Voltage  
10  
V
S
= +/− 15 V  
R = 2kW to V  
L
EE  
A = 10  
V
1
0.1  
V
25°C  
= 2 V  
PP  
O
THD+N  
0.01  
0.001  
THD  
100  
1k  
FREQUENCY (Hz)  
10k  
Figure 8. Distortion vs. Frequency  
S − Stable; U − Unstable  
V
CC  
100  
U
U
U
U
U
S
S
S
S
S
S
S
S
S
S
U
U
U
U
U
U
U
S
S
S
S
S
S
S
S
U
U
U
U
U
U
U
U
U
U
S
S
S
S
S
U
U
U
U
U
U
U
U
U
U
U
U
S
S
S
U
U
U
U
U
U
U
U
U
U
U
U
U
S
S
S
U
U
U
U
U
U
S
S
S
S
S
S
S
S
S
U
U
U
U
U
S
S
S
S
S
S
S
S
S
S
S
U
U
U
U
U
S
S
S
S
S
S
S
S
S
S
S
S
U
U
U
U
S
S
S
S
S
S
S
S
S
S
S
S
U
U
U
U
S
V
OL  
V
OL  
V
OH  
V
OH  
T = 25°C  
A
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
50  
40  
30  
20  
15  
10  
7.5  
5
2.5  
1
0.5  
0.25  
0.1  
0.05  
V
V
V
− 0.5  
− 1  
CC  
T = 105°C  
A
V
T = 25°C  
CC  
A
T = 105°C  
A
− 1.5  
CC  
V
− 2  
CC  
− 2.5  
CC  
GND + 2  
GND + 1.5  
GND + 1  
GND + 0.5  
GND  
0
0.1 0.47  
1
4.7 47 100 200 300 1000  
0
5
10  
15  
20  
25  
30  
35  
40  
45  
OUTPUT CURRENT (mA)  
CAPACITIVE LOAD ON Vref PIN 3 (nF)  
Figure 9. Output Voltage Swing vs. Output Current  
id = 1 V, VCM = 0 V, VCC = 3 V to 36 V  
Figure 10. Region of Reference Stability vs.  
Capacitive Load (Pin 3)  
V
http://onsemi.com  
6
NCS1002A  
http://onsemi.com  
7
NCS1002A  
ORDERING INFORMATION  
Device  
Package  
Shipping  
NCS1002ADR2G  
SOIC−8  
(Pb−Free)  
2500 / Tape & Reel  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
http://onsemi.com  
8
NCS1002A  
PACKAGE DIMENSIONS  
SOIC−8 NB  
CASE 751−07  
ISSUE AK  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSION A AND B DO NOT INCLUDE  
MOLD PROTRUSION.  
−X−  
A
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)  
PER SIDE.  
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
PROTRUSION SHALL BE 0.127 (0.005) TOTAL  
IN EXCESS OF THE D DIMENSION AT  
MAXIMUM MATERIAL CONDITION.  
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW  
STANDARD IS 751−07.  
S
M
M
B
0.25 (0.010)  
Y
1
K
−Y−  
MILLIMETERS  
DIM MIN MAX  
INCHES  
G
MIN  
MAX  
0.197  
0.157  
0.069  
0.020  
A
B
C
D
G
H
J
K
M
N
S
4.80  
3.80  
1.35  
0.33  
5.00 0.189  
4.00 0.150  
1.75 0.053  
0.51 0.013  
C
N X 45  
_
SEATING  
PLANE  
1.27 BSC  
0.050 BSC  
−Z−  
0.10  
0.19  
0.40  
0
0.25 0.004  
0.25 0.007  
1.27 0.016  
0.010  
0.010  
0.050  
8
0.020  
0.244  
0.10 (0.004)  
M
J
H
D
8
0
_
_
_
_
0.25  
5.80  
0.50 0.010  
6.20 0.228  
M
S
S
X
0.25 (0.010)  
Z
Y
SOLDERING FOOTPRINT*  
1.52  
0.060  
7.0  
4.0  
0.275  
0.155  
0.6  
0.024  
1.270  
0.050  
mm  
inches  
ǒ
Ǔ
SCALE 6:1  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,  
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC  
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any  
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without  
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications  
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC  
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for  
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where  
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and  
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,  
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture  
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
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USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
Japan Customer Focus Center  
Phone: 81−3−5817−1050  
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Order Literature: http://www.onsemi.com/orderlit  
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P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada  
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Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
NCS1002A/D  

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