NCP45790IMN24RTWG [ONSEMI]
Load Switch, Integrated, ecoSWITCH™8.0 mΩ, 24V, 8 A, Fault Protection;
| 型号： | NCP45790IMN24RTWG |
| 厂家： | 
ONSEMI |
| 描述： | Load Switch, Integrated, ecoSWITCH™8.0 mΩ, 24V, 8 A, Fault Protection 光电二极管 |
| 文件： | 总12页 (文件大小：267K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ecoSwitcht
Advanced Load Management
Controlled Load Switch with Reverse
Current Protection and Ultra Low RON
NCP45790
www.onsemi.com
The NCP45790 load management device provides a component and
area−reducing solution for efficient power domain switching with
inrush current limit via soft start. This device is designed to integrate
control and driver functionality with back−to−back high performance
low on−resistance power MOSFETs in a single package. This cost
effective solution is ideal for reverse current applications and the
specific power management and disconnect functions used in USB
Type−C and Type−C Power Delivery ports.
R
TYP
I
*
ON
MAX
8.0 mW
8 A
*I
MAX
is defined as the maximum steady state current
the load switch can pass at room ambient temperature
without entering thermal lockout. See the SOA section
for more information on transient current limitations.
Features
• Advanced Controller with Charge Pump
DFN14, 4x4
CASE 506EK
• Integrated N−Channel MOSFET with Ultra Low R
ON
1
• Soft−Start via Controlled Slew Rate
• Adjustable Slew Rate Control
MARKING DIAGRAM
• Fault Detection with Power Good Output
• Thermal Shutdown and Under Voltage Lockout
• Short−Circuit and Adjustable Over−Current Protections
• Reverse−Current Protection Option
45790
ALYWG
G
• Input Voltage Range 3 V to 24 V
45790 = Specific Device Code
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
• Extremely Low Standby Current
• This is a Pb−free, RoHS/REACH Compliant Device
Typical Applications
(Note: Microdot may be in either location)
• USB Type C & Type−C Power Delivery
• Reverse Current Load Switching Applications
• Servers, Set−Top Boxes and Gateways
• Notebook and Tablet Computers
PIN CONFIGURATION
V
1
2
3
4
5
6
7
14 NC
13 NC
IN
• Telecom, Networking, Medical and Industrial Equipment
• Hot−Swap Devices and Peripheral Ports
EN
15: V
IN
V
CC
12
11
10
9
V
IN
VIN
ENB
OCP PG
V
NC
V
SS
OCP
PG
OUT
Bandgap,
Regulator
&
16: V
Control
Logic
OUT
NC
NC
Thermal Shutdown,
UVLO, OCP
VCC
SR
8
Biases
(Top View)
Delay and
Slew Rate
Control
ORDERING INFORMATION
Charge
Pump
Device
NCP45790IMN24RTWG DFN14 3000 / Tape &
(Pb−Free) Reel
Package
Shipping
†For information on tape and reel specifications,
including part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
VOUT
VSS
SR
Figure 1. Block Diagram
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
January, 2021 − Rev. 1
NCP45790/D
NCP45790
Table 1. PIN DESCRIPTION
Pin
Name
Function
1,12,15
V
Input voltage (3 V − 24 V) – Pin 15 should be used for high current (>0.5 A)
Active−high digital input used to turn on the MOSFET driver, pin has an internal pull down resistor to GND
Driver supply voltage (3.0 V − 5.5 V)
IN
2
3
4
5
EN
V
CC
V
SS
Driver ground
OCP
Over−current protection trip point adjustment made with a voltage applied (0 V − 1.2 V), pin has an internal
pull up resistor to EN; short to ground if over−current protection is not needed
6
PG
Active−high, open−drain output that indicates when the gate of the MOSFET is fully charged, external pull up
resistor ≥ 100 kW to an external voltage source required; tie to GND if not used.
7
SR
Slew Rate control pin. Slew rate adjustment made with an external capacitor to GND; float if not used.
10,16
V
OUT
Source of MOSFET connected to load. Includes an internal bleed resistor to GND. – Pin 16 should be used
for high current (>0.5 A)
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
V
Supply Voltage Range
V
CC
−0.3 to 6
−0.3 to 30
−0.3 to 30
Input Voltage Range
V
IN
V
Output Voltage Range
V
OUT
V
EN Input Voltage Range
V
GND−0.3 to (V + 0.3)
V
EN
PG
CC
PG Output Voltage Range (Note 1)
OCP Input Voltage Range
V
−0.3 to 6
−0.3 to 6
28.6
V
V
OCP
V
Thermal Resistance, Junction−to−Ambient, Steady State (Note 2)
R
R
°C/W
°C/W
A
θJA
Thermal Resistance, Junction−to−Case (V Paddle)
1.7
IN
θJC
Continuous MOSFET Current @ T = 25°C (Note 2)
I
20
A
MAX
Total Power Dissipation @ T = 25°C (Note 2)
P
D
3.49
34.9
W
mW/°C
A
Derate above T = 25°C
A
Storage Temperature Range
T
−55 to 150
°C
°C
STG
Lead Temperature, Soldering (10 sec.)
ESD Capability, Human Body Model (Notes 3 and 4)
ESD Capability, Charged Device Model (Notes 3 and 4)
Latch−up Current Immunity (Note 3)
T
260
2
SLD
ESD
ESD
kV
kV
mA
HBM
1
CDM
LU
100
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. PG is an open drain output that requires an external pull−up resistor > 100 kW to an external voltage source.
2. Surface−mounted on FR4 board using the minimum recommended pad size, 1 oz Cu. Over current protection will limit maximum realized
current to 8 A at highest setting.
3. Tested by the following methods @ T = 25°C:
A
ESD Human Body Model tested per JESD22−A114
ESD Charged Device Model per ESD STM5.3.1
Latch−up Current tested per JESD78
4. Rating is for all pins except for V and V
which are tied to the internal MOSFET’s Drain and Source. Typical MOSFET ESD performance
IN
OUT
for V and V
should be expected and these devices should be treated as ESD sensitive.
IN
OUT
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2
NCP45790
Table 3. OPERATING RANGES
Rating
Symbol
Min
3
Max
5.5
5.5
24
Unit
V
VCC − (V > 4.5 V)
V
CC
V
CC
IN
VCC − (V < 4.5 V)
4.5
3
V
IN
VIN − (V > 4.5 V)
V
IN
V
CC
VIN − (V < 4.5 V)
V
4.5
short
0
24
V
CC
IN
OCP External Resistor to VSS
R
open
200
0
kW
mJ
V
OCP
OFF to ON Transition Energy Dissipation Limit (See Application Section)
E
TRANS
VSS
V
SS
−
Ambient Temperature
Junction Temperature
T
−40
−40
85
°C
°C
A
T
125
J
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
Table 4. ELECTRICAL CHARACTERISTICS (TJ = 25°C, V = 3 V − 5.5 V, unless otherwise specified)
CC
Parameter
Conditions
= 4.5 V; V = 3 V
Symbol
Min
−
Typ
8.0
8.0
8.0
8.0
10.8
35
Max
9.0
9.0
9.0
9.0
100
100
1.5
300
5
Unit
On−Resistance
V
CC
V
CC
V
CC
V
CC
V
EN
V
EN
V
EN
V
EN
V
EN
V
EN
R
ON
mW
IN
= 3.3 V; V = 4.5 V
−
IN
= 3.3 V; V = 15 V
−
IN
= 3.3 V; V = 24 V
−
IN
Leakage Current − V to V
(Note 5)
= 0 V; V = 24 V
I
−
nA
nA
mA
mA
mA
mA
V
IN
OUT
IN
LEAK
Reverse Leakage − V
to V
= 0 V; V = 24 V (for typical)
I
−
OUT
IN
IN
RLEAK
V
IN
Control Current − V to V
= 0 V; V = 24 V (for typical)
I
−
0.8
150
1.3
0.3
−
IN
SS
IN
INCTL
INCTL
= V ; V = 24 V (for typical)
I
−
CC
IN
Supply Standby Current (Note 6)
Supply Dynamic Current (Note 7)
EN Input High Voltage
= 0 V; V = 24 V (for typical)
I
−
IN
STBY
= V ; V = 24 V (for typical)
I
DYN
−
0.5
−
CC
IN
V
IH
2
EN Input Low Voltage
V
−
−
0.8
1
V
IL
EN Input Leakage Current
V
= 0 V
I
R
V
−1.0
76
−
−
mA
kW
mV
nA
mA
EN
IL
EN Pull Down Resistance
100
21.8
3.45
99
124
100
100
130
PD
OL
PG Output Low Voltage
I
= 100 mA
SINK
PG Output Leakage Current
Slew Rate Control Constant (Note 8)
FAULT PROTECTIONS
V
TERM
= 3.3 V
I
−
OH
K
SR
70
Thermal Shutdown Threshold (Note 9)
Thermal Shutdown Hysteresis (Note 9)
T
−
−
145
20
−
−
°C
°C
V
SDT
T
HYS
V
IN
V
IN
Under Voltage Lockout Threshold
Under Voltage Lockout Hysteresis
V
rising
V
UVLO
−
2.0
220
1.0
7.1
11
2.1
300
1.2
−
IN
V
HYS
−
mV
A
Over−Current Protection Trip
R
R
R
= open
I
0.6
−
OCP
OCP
OCP
TRIP
= 20 kW
= short to GND (Note 10)
−
−
Over−Current Protection Blanking Time
t
−
2.25
11
−
ms
A
OCP
Short−Circuit Protection Trip Current (Note 11) Soft Short & Hard Shorts (Note 12)
I
−
−
SC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Average current from V to V
with MOSFET turned off.
IN
OUT
6. Average current from V to GND with MOSFET turned off.
CC
7. Average current from V to GND after charge up time of MOSFET.
CC
8. See Applications Information section for details on how to adjust the gate slew rate.
9. Operation above T = 125°C is not guaranteed.
J
10.Transient currents exceeding the short−circuit protection trip current will cause the device to fault. For OCP settings less than 20 kW, high
steady state currents may cause an over temperature lockout before the OCP threshold is reached due to self−heating.
11. Short circuit protection testing assumed a 100 W supply capability limit on Vin.
12.Short Circuit Protection protects the device against hard shorts (R
≤ 250 mW Vout to Ground) for Vin < 18 V, and against soft shorts
SHORT
(R
> 250 mW) for Vin < 24 V.
SHORT
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3
NCP45790
Table 5. SWITCHING CHARACTERISTICS (T = 25°C unless otherwise specified) (Notes 13 and 14)
J
Parameter
Conditions
= 4.5 V; V = 3 V
Symbol
Min
13
13
13
13
100
100
100
100
−
Typ
19.4
19.7
22.4
22.5
188
187
846
480
105
96
Max
28
28
28
28
700
700
700
700
−
Unit
Output Slew Rate − Default
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
SR
V/ms
IN
= 5.0 V; V = 3 V
IN
= 3.3 V; V = 24 V
IN
= 5.0 V; V = 24 V
IN
Output Turn−on Delay
= 4.5 V; V = 3 V
T
ON
ms
ms
IN
= 5.0 V; V = 3 V
IN
= 3.3 V; V = 24 V
IN
= 5.0 V; V = 24 V
IN
Output Turn−off Delay
= 4.5 V; V = 3 V
T
OFF
IN
= 5.0 V; V = 3 V
−
−
IN
= 3.3 V; V = 24 V
−
90
−
IN
= 5.0 V; V = 24 V
−
78
−
IN
Power Good Turn−on Time
Power Good Turn−off Time
= 4.5 V; V = 3 V
T
0.4
0.4
0.4
0.4
−
0.88
0.79
2.4
1.9
−
3.5
3.5
3.5
3.5
10
10
10
10
ms
ns
IN
PG,ON
= 5.0 V; V = 3 V
IN
= 3.3 V; V = 24 V
IN
= 5.0 V; V = 24 V
IN
= 4.5 V; V = 3 V
T
PG,OFF
IN
= 5.0 V; V = 3 V
−
−
IN
= 3.3 V; V = 24 V
−
−
IN
= 5.0 V; V = 24 V
−
−
IN
13.See below figure for Test Circuit and Timing Diagram.
14.Tested with the following conditions: V
= V ; R = 100 kW; R = 10 W; C = 0.1 mF.
TERM
CC
PG
L
L
VIN
VCC
EN
VOUT
OCP
NCP45790
VSS
RL
CL
OFF ON
PG
SR
50%
50%
TON
VEN
Dt
TOFF
90%
90%
DV
Dt
DV
SR=
10%
TPG,ON
VOUT
TPG,OFF
50%
50%
VPG
Figure 2. Switching Characteristics Test Circuit and Timing Diagrams
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4
NCP45790
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
14
12
10
8
10
9.5
9
8.5
8
7.5
7
6
6.5
6
4
2
5.5
5
0
−80 −60 −40 −20
0
20 40 60 80 100 120 140
0
2
4
6
8
10 12 14 16 18 20 22 24 26
Vin (V)
TEMPERATURE (°C)
Figure 3. On−Resistance vs. Input Voltage
Figure 4. On−Resistance vs. Temperature
3.2
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0.0
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
VCC = 5.5 V
VCC = 5.0 V
VCC = 4.5 V
VCC = 5.5 V
VCC = 3.0 V
VCC = 3.3 V
2
4
6
8
10 12 14 16 18 20 22 24
Vin (V)
−80 −60 −40 −20
0
20 40 60 80 100 120 140 160
TEMPERATURE (°C)
Figure 5. Supply Standby Current vs. Supply Voltage
Figure 6. Supply Standby Current vs. Temperature
360
350
450
400
VCC = 5.5 V
VCC = 5.5 V
VCC = 4.5 V
VCC = 3.3 V
340
330
320
310
300
290
280
270
260
250
240
350
300
250
200
150
100
50
0
−80 −60 −40 −20
0
20 40 60 80 100 120 140
0
2
4
6
8
10 12 14 16 18 20 22 24 26
Vin (V)
TEMPERATURE (°C)
Figure 7. Dynamic Current vs. Input Voltage
Figure 8. Supply Dynamic Current vs. Temperature
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5
NCP45790
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise specified) (continued)
J
400
300
11
10
9
8
V
IN
= 24 V
7
VCC = 5.5 V
6
5
200
VCC = 3.3 V
4
3
100
2
1
0
V
= 3 V
IN
0
0
2
4
6
8
10 12 14 16 18 20 22 24 26
Vin (V)
−80 −60 −40 −20
0
20 40 60 80 100 120
TEMPERATURE (°C)
Figure 9. Input to Output Leakage vs. Input Voltage
(EN = 0 V)
Figure 10. Input to Output Leakage vs. Temperature
(EN = HIGH)
60
160
54
140
Vin = 24.0 V
48
42
36
30
24
18
12
Vin = 24.0 V
120
100
Vin = 3.0 V
80
60
40
20
0
6
Vin = 3.0 V
20 40 60
0
−80
−60
−40
−20
0
20
40
60
80
−80 −60 −40 −20
0
80 100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 11. Vin Controller Current vs. Temperature
(EN = 0)
Figure 12. Vin Controller Current vs. Temperature
(EN = HIGH)
1
600
0.9
500
400
300
200
100
0
Vin = 24 V
Vin = 15 V
0.8
VCC = 3.0 V
0.7
0.6
0.5
VCC = 5.5 V
0.4
Vin = 3 V
0.3
0.2
0.1
0
0
2
4
6
8
10 12 14 16 18 20 22 24 26
Vin (V)
−80 −60 −40 −20
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
Figure 13. Output Turn−On Delay vs. Input Voltage
Figure 14. Output Turn−On Delay vs. Temperature
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NCP45790
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise specified) (continued)
J
2.5
2.25
2
3000
2500
Vin = 24.0 V
VCC = 3.0 V
1.75
1.5
1.25
1
2000
VCC = 4.5 V
1500
Vin = 3.0 V
VCC = 5.5 V
1000
0.75
0.5
0.25
0
500
0
0
2
4
6
8
10 12 14 16 18 20 22 24 26
Vin (V)
−80 −60 −40 −20
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
Figure 15. Power Good Turn−On Time vs. Input Voltage
Figure 16. Power Good Turn−On vs. Temperature
23
11.2
VCC = 5.5 V
22.5
11
10.8
10.6
10.4
10.2
10
22
VCC = 5.5 V
VCC = 3.0 V
VCC = 3.0 V
21.5
21
20.5
20
0
2
4
6
8
10 12 14 16 18 20 22 24 26
Vin (V)
0
2
4
6
8
10 12 14 16 18 20 22 24 26
Vin (V)
Figure 17. Default Slew Rate vs. Input Voltage
(SR Pin = Floating)
Figure 18. Slew Rate vs. Input Voltage
(SR Pin = 10 nF to GND)
115
1.2
1
VCC = 3.0 V
110
105
100
95
VCC = 4.5 V
VCC = 5.5 V
Vin = 24.0 V
Vin = 3.0 V
0.8
0.6
0.4
0.2
0
90
85
80
0
2
4
6
8
10 12 14 16 18 20 22 24 26
Vin (V)
−80 −60 −40 −20
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
Figure 19. KSR vs. Temperature
Figure 20. OCP Trip Current vs. Input Voltage
(OCP = Float)
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NCP45790
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise specified) (continued)
J
1600
1400
1200
1000
800
600
400
200
0
2.10
2.05
Vin Ascending
2.00
1.95
1.90
1.85
1.80
1.75
VCC = 5.5 V
VCC = 3.0 V
Vin Decending
−80 −60 −40 −20
0
20 40 60 80 100 120 140
−80 −60 −40 −20
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 21. OCP Trip Current vs. Temperature
(OCP = OPEN)
Figure 22. UVLO Trip Voltage vs. Temperature
0.1
0.01
0.001
0.0001
0.00001
0
10 20 30 40 50 60 70 80 90 100
ALLOWED CURRENT (A)
Figure 23. Safe Operating Area Transient Current
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NCP45790
APPLICATIONS INFORMATION
NCP45790 OCP Trip Current per R_OCP Resistance
Enable Control
14
12
10
8
The NCP45790 part enables the MOSFET in an
active−high configuration. When the EN pin is at a logic
high level and the V supply pin has an adequate voltage
CC
Upper Limit
Lower Limit
applied, the MOSFET will be enabled. When the EN pin is
at a logic low level, the MOSFET will be disabled. An
internal pull down resistor to ground on the EN pin ensures
that the MOSFET will be disabled when not driven.
Typical
6
Short−Circuit Protection (Hard short)
The NCP45790 device is equipped with a short−circuit
protection that helps protect the part and the system from a
4
2
0
sudden high−current event, such as the output, V
hard−shorted to ground.
, being
OUT
0
20
40
60
80 100 120 140 160 180 200
R_OCP (kW)
Once active, the circuitry monitors the voltage difference
between the V pin and the V pin. When the difference
IN
OUT
Figure 24. OCP Trip Current Setting
is equal to the short−circuit protection threshold voltage, the
MOSFET is turned off. The part remains off and is latched
Thermal Shutdown
in the Fault state until EN is toggled or V supply voltage
CC
The thermal shutdown of the NCP45790 device protects
the part from internally or externally generated excessive
temperatures. This circuitry is disabled when EN is not
active to reduce standby current. When an over−temperature
condition is detected, the MOSFET is turned off.
The part comes out of thermal shutdown when the
junction temperature decreases to a safe operating
temperature as dictated by the thermal hysteresis. Upon
exiting a thermal shutdown state, and if EN remains active,
the MOSFET will be turned on in a controlled fashion with
the normal output turn−on delay and slew rate.
is cycled, at which point the MOSFET will be turned on in
a controlled fashion with the normal output turn−on delay
and slew rate.
Over−Current Protection (Soft short)
The NCP45790 device is equipped with an over−current
protection (OCP) that helps protect the part and the system
from a high current event which exceeds the expected
operational current (e.g., a soft short).
In the event that the current from the V pin to the V
IN
OUT
pin exceeds the OCP threshold for longer than the blanking
time, the MOSFET will shut down and the PG pin is driven
low. Like the short−circuit protection, the part remains
Under Voltage Lockout
The under voltage lockout of the NCP45790 device turns
latched in the Fault state until EN is toggled or V supply
CC
the MOSFET off when the input voltage, V , drops below
IN
voltage is cycled, at which point the MOSFET will be turned
on in a controlled fashion with the normal output turn−on
delay and slew rate.
The over−current trip point is determined by the resistance
between the OCP pin and ground. If no over−current
protection is needed, then the OCP pin should be tied to
GND; if the OCP protection is disabled in this way, the
short−circuit protection will still remain active.
the under voltage lockout threshold. This circuitry is
disabled when EN is not active to reduce standby current.
If the V voltage rises above the under voltage lockout
IN
threshold, and EN remains active, the MOSFET will be
turned on in a controlled fashion with the normal output
turn−on delay and slew rate.
Power Good
The NCP45790 device has a power good output (PG) that
can be used to indicate when the gate of the MOSFET is fully
charged. The PG pin is an active−high, open−drain output
that requires an external pull up resistor, RPG, greater than
or equal to 100 kW to an external voltage source, VTERM,
that is compatible with input levels of all devices connected
to this pin (as shown in Figures 25).The power good output
can be used as the enable signal for other active−high
devices in the system (as shown in Figure 25). This allows
for guaranteed by design power sequencing and reduces the
number of enable signals needed from the system controller.
If the power good feature is not used in the application, the
PG pin should be tied to GND.
www.onsemi.com
9
NCP45790
below the specified I . C (capacitive load) should be less
max
L
VIN
VOUT
PG
then C
as defined by the following equation:
max
VCC
EN
Load
EN
NCP45790
VSS
OFF ON
Imax
SRtyp
(eq. 2)
Cmax
+
RPG
Where I
is the maximum load current, and SR is the
typ
max
VTERM
typical default slew rate when no external load capacitor is
added to the SR pin.
ecoSWITCH LAYOUT GUIDELINES
Figure 25. Guaranteed−by−Design Power
Sequencing Example
Electrical Layout Considerations
Correct physical PCB layout is important for proper low
noise accurate operation of all ecoSWITCH products.
Slew Rate Control
The NCP45790 device is equipped with controlled output
slew rate which provides soft start functionality. This limits
the inrush current caused by capacitor charging and enables
these devices to be used in hot swapping applications.
The slew rate can be decreased with an external capacitor
added between the SR pin and ground. With an external
capacitor present, the slew rate can be determined by the
following equation:
Power Planes: The ecoSWITCH is optimized for extremely
low Ron resistance, however, improper PCB layout can
substantially increase source to load series resistance by
adding PCB board parasitic resistance. Solid connections to
the VIN and VOUT pins of the ecoSWITCH to copper
planes should be used to achieve low series resistance and
good thermal dissipation. The ecoSWITCH requires ample
heat dissipation for correct thermal lockout operation. The
internal FET dissipates load condition dependent amounts
of power in the milliseconds following the rising edge of
enable, and providing good thermal conduction from the
packaging to the board is critical. Direct coupling of VIN to
VOUT should be avoided, as this will adversely affect slew
rates. The figure below shows an example of correct power
plane layout. The number and location of pins for specific
ecoSWITCH products may vary. This demonstrates large
planes for both VIN and VOUT, while avoiding capacitive
coupling between the two planes.
KSR
CSR
(eq. 1)
Slew Rate +
[Vńs]
where K is the specified slew rate control constant, found
SR
on page 3, and C is the capacitor added between the SR pin
SR
and ground. Note that the slew rate of the device will always
be the lower of the default slew rate and the adjusted slew
rate. Therefore, if the C is not large enough to decrease the
slew rate more than the specified default value, the slew rate
of the device will be the default value.
SR
Capacitive Load
The peak in−rush current associated with the initial
charging of the application load capacitance needs to stay
ecoSwitch is trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
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10
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN14 4x4, 0.5P
CASE 506EK
ISSUE A
DATE 18 MAY 2021
GENERIC
MARKING DIAGRAM*
XXXXXX
XXXXXX
ALYWG
G
XXX = Specific Device Code
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
(Note: Microdot may be in either location)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON94406G
DFN14 4x4, 0.5P
PAGE 1 OF 1
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