NCP156ABFCT180270T2G [ONSEMI]
LDO Regulator - Dual, Camera Modules, Low Iq, Very Low Dropout, Ultra Low Noise 500 mA, 250 mA;型号: | NCP156ABFCT180270T2G |
厂家: | ONSEMI |
描述: | LDO Regulator - Dual, Camera Modules, Low Iq, Very Low Dropout, Ultra Low Noise 500 mA, 250 mA 输出元件 调节器 |
文件: | 总9页 (文件大小:152K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NCP156
LDO Regulator - Dual, Camera
Modules, Low Iq, Very Low
Dropout, Ultra Low Noise
500 mA, 250 mA
www.onsemi.com
The NCP156 is Dual Output Linear Voltage Regulator optimized for
camera module application. The device offers unique combination of
High Current Low Voltage Bias Rail Topology for supplying digital
block and very precise second output for powering analog sensor
block. This combination allows achieving the best performance and
power efficiency.
T
MARKING
DIAGRAM
WLCSP6, 1.2x0.8
CASE 567MV
XXMG
Features
XX = Specific Device Code
• High Current Bias Rail Topology for OUT1
M
= Month Code
• High PSRR, Ultra Low Noise LDO for OUT2
• Output voltage range: OUT1 – 0.8 V to 1.8 V
(Factory trimmed) OUT2 – 1.8 V to 3.6 V
G
= Pb−Free Package
PIN CONNECTIONS
• Low I of typ. 90 mA
Q
1
2
• Slow V
Slew Rate for Camera Modules (Optional)
typ. ≤30 mV/ms
OUT
A
B
C
IN1
OUT1
• Ultra−Low Dropout: OUT1 typ. 70 mV @ 1.2 V/500 mA
Ultra−Low Dropout: OUT2 typ. 95 mV @ 2.8 V/250 mA
EN
GND
•
1% Typical Accuracy
• High PSRR: OUT1 typ. 70 dB at 1 kHz
High PSRR: OUT2 typ. 92 dB at 1 kHz
OUT2
IN2
• Thermal Shutdown and Current Limit Protections
• Stable with a Small Ceramic Capacitor
(Top View)
• Available WLCSP−6 1.2x0.8 mm Package
• Active Output Discharge for Fast Output Turn−Off
• These are Pb−free Devices
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 8 of this data sheet.
Typical Applications
• Camera Modules
• Smartphones, Tablets
NCP156
VOUT1
VOUT2
VIN1
OUT1
OUT2
IN1
IN2
VIN2
CIN2
mF
CIN1
mF
COUT2
mF
COUT1
mF
EN
GND
1
2.2
1
1
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
September, 2019 − Rev. 1
NCP156/D
NCP156
OUT1
IN1
EN
IN2
MOSFET
THERMAL
DRIVER WITH
CURRENT
LIMIT
SHUTDOWN
*Active
ENABLE
LOGIC
discharge
GND
(A option only)
OUTPUT
VOLTAGE
TRIMMING
MOSFET
DRIVER WITH
CURRENT
LIMIT
BANDGAP
REFERENCE
THERMAL
SHUTDOWN
OUT2
Figure 2. Simplified Schematic Block Diagram
Table 1. PIN FUNCTION DESCRIPTION
Pin No.
A1
Pin Name
IN1
Description
Output 1 – Power Supply pin
Regulated Output 1 Voltage pin
A2
OUT1
EN
B1
Applying V < 0.4 V disables the regulator; Pulling V > 0.9 V enables both voltage outputs.
EN EN
B2
GND
IN2
Common ground connection
C1
Output 2 – Power Supply pin, Output 1 – Control Supply pin
Regulated Output 2 Voltage pin
C2
OUT2
Table 2. THERMAL CHARACTERISTICS (Note 1)
Rating
Symbol
Value
Unit
Thermal Characteristics, WLCSP6 1.2x0.8mm,
Thermal Resistance, Junction−to−Air
°C/W
q
90
JA
1. Single component mounted on 1 oz, FR4 PCB with 645mm2 Cu area
Table 3. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
V
Input Voltage 1 (Note 2)
V
IN1
V
IN2
−0.3 to 6
−0.3 to 6
Input Voltage 2 (Note 2)
V
Output Voltage 1
V
OUT1
V
OUT2
−0.3 to V
+ 0.3
V
IN1
IN2
Output Voltage 2
−0.3 to V
+ 0.3
V
Enable Input
V
−0.3 to 6
Indefinite
150
V
EN
SC
Output Short Circuit Duration
Maximum Junction Temperature
Storage Temperature
t
s
T
°C
°C
V
J(MAX)
T
STG
−55 to 125
2000
ESD Capability, Human Body Model (Note 3)
ESD Capability, Machine Model (Note 3)
ESD Capability, Charged Device Model (Note 3)
ESD
HBM
ESD
200
V
MM
ESD
1000
V
CDM
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
2. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
3. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
ESD Charged Device Model tested per EIA/JESD22−C101, Field Induced Charge Model
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
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2
NCP156
Table 4. ELECTRICAL CHARACTERISTICS −40°C ≤ T ≤ 125°C; V
= V
+0.3 V, V
= 2.7 V or (V
+ 1.6 V) or
OUT1
J
IN1
OUT1(NOM)
IN2
OUT1
V
C
+ 0.3 V whichever is greater, I
= I
= 1 mA, V = 1 V, unless otherwise noted. C
= C
= 1 mF, C = 2.2 mF,
OUT2(NOM)
OUT1
OUT2
EN
IN1
IN2
= 1 mF. Typical values are at T = +25°C. Min/Max values are for −40°C ≤ T ≤ 125°C unless otherwise noted.
OUT2
J
J
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
Operating Input Voltage
Range
V
IN1
V
+
5.5
V
OUT1
DO
V
V
IN2
V
OUT1
5) ≥ 2.4 or
=
5.5
IN2
(V
+1.
V
OUT2(NO
+V
M)
,
DO
whichever
is greater
Output Voltage Accuracy
Undervoltage Lock−out
Output Voltage Accuracy
T = 25°C
V
V
1
%
V
J
OUT1
OUT2
V
IN2
Rising
UVLO
1.5
0.2
Hysteresis
V
+ 0.3 V ≤ V
V
V
< 1.2 V
V
OUT1
−18
−1.5
−2
+18
+1.5
+2
mV
%
OUT1(NOM)
OUT1(NOM)
= 2.7 V or
OUT1(NOM)
IN1
OUT1
≤ V
+ 1.0 V,
V
OUT2
(V
) + 1.6 V),
≥ 1.2 V
OUT1
whichever is greater, 1 mA
< I < 500 mA
OUT1
V
= (V
+ 0.3 V) to 5.5 V,
≤ 250 mA
V
OUT2
%
IN2
OUT2(NOM)
0 mA ≤ I
OUT2
V
V
+ 0.3 V ≤ V
≤ 5.5 V
Line
REG
0.01
0.02
0.01
%/V
Line Regulation
Load Regulation
OUT1
OUT1(NOM)
IN1
V
OUT2
V
+ 0.3 V ≤ V ≤ 5.5 V
OUT2(NOM) IN2
V
V
to
(2.7 V or (V
ever is greater) < V
+ 1.6 V), which-
IN2
IN2
OUT1
OUT1(NOM)
< 5.5 V
OUT1
OUT2
OUT1
OUT2
I
I
I
I
= 1 mA to 500 mA
Load
V
5
1
mV
mV
REG
OUT1
OUT2
OUT1
OUT2
= 1 mA to 250 mA
= 500 mA
Dropout Voltage
(Note 5)
70
150
160
1.5
DO
= 250 mA
= V
V
= 2.8 V
95
OUT2(NOM)
V
IN2
to V
Dropout Voltage I
= 500 mA, V
(Notes 5, 6)
V
1.1
850
550
10
V
OUT1
OUT1
IN1
IN2
DO(IN2)
Output Current Limit
OUT1
V
OUT
= 90% V
I
CL
550
300
mA
OUT(NOM)
OUT2
Quiescent Current IN1
Quiescent Current IN2
Disable Current
I
I
= 0 mA
= 0 mA
I
I
20
130
1
mA
mA
V
OUT1
OUT2
Q1
80
Q2
V
Pin
Pin
V
EN1
≤ 0.4 V
I
I
0.05
0.1
IN1
IN2
IN1(DIS)
IN2(DIS)
V
1
EN Pin Threshold Voltage
EN Input Voltage “H”
EN Input Voltage “L”
V
EN(H)
0.9
V
EN(L)
0.4
2
EN Pull Down Current
V
EN
= 5.5 V
I
0.3
200
130
mA
ms
EN
Turn−On Delay
OUT1
OUT2
From assertion of V to raising V
t
DELAY
EN
OUT
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA =
25°C. Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
5. Dropout voltage is characterized when VOUT falls 3% below VOUT(NOM).
6. For output 1 voltages below 0.9 V, V
to V
dropout voltage does not apply due to a minimum V
operating voltage of 2.4 V.
IN2
OUT1
IN2
7. Refer to Table 6 for output slew rate configuration.
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3
NCP156
Table 4. ELECTRICAL CHARACTERISTICS −40°C ≤ T ≤ 125°C; V
= V
+0.3 V, V
= 2.7 V or (V
+ 1.6 V) or
OUT1
J
IN1
OUT1(NOM)
IN2
OUT1
V
C
+ 0.3 V whichever is greater, I
= I
= 1 mA, V = 1 V, unless otherwise noted. C
= C
= 1 mF, C = 2.2 mF,
OUT2(NOM)
OUT1
OUT2
EN
IN1
IN2
= 1 mF. Typical values are at T = +25°C. Min/Max values are for −40°C ≤ T ≤ 125°C unless otherwise noted.
OUT2
J
J
Parameter
Slew Rate (Note 7)
Test Conditions
Symbol
Min
Typ
100
200
15
Max
Unit
V
OUT
Normal
V
OUT1
V
OUT2
V
OUT1
V
OUT2
mV/ms
Slow
30
Power Supply Rejection Ratio V
V
to V
OUT
, f = 1 kHz, I
, f = 1 kHz, I
, f = 1 kHz, I
= 150 mA, V
≥
≥
PSRR(V
)
)
70
dB
IN1
OUT1
OUT1
OUT2
OUT1
IN1
IN1
+0.5 V
V
V
to V
= 10 mA, V ≥
IN2
PSRR(V
92
80
IN2
OUT
OUT2
IN2
+0.5 V
V
V
to V
= 150 mA, V
IN1
PSRR(IN2 to
OUT1)
IN2
OUT1
OUT1
+0.5 V
Output Noise Voltage
OUT1
OUT2
V
= V
+0.5 V
V
N
40
mVRMS
IN
OUT
f = 10 Hz to 100 kHz
8.5
Thermal Shutdown Threshold Temperature increasing
Temperature decreasing
T
160
140
150
°C
SDL
T
SDH
Output Discharge Pull−Down
V
≤ 0.4 V
R
W
EN
DISCH
(only if Active Discharge feature enabled)
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA =
25°C. Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
5. Dropout voltage is characterized when VOUT falls 3% below VOUT(NOM).
6. For output 1 voltages below 0.9 V, V
to V
dropout voltage does not apply due to a minimum V
operating voltage of 2.4 V.
IN2
OUT1
IN2
7. Refer to Table 6 for output slew rate configuration.
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NCP156
TYPICAL CHARACTERISTICS
1.206
1.204
1.202
1.200
1.198
1.196
1.194
1.192
1.190
2.808
2.806
I
= 1 mA
OUT
OUT
2.804
2.802
2.800
2.798
2.796
2.794
2.792
I
= 1 mA
OUT
I
= 250 mA
OUT
I
= 500 mA
V
V
V
V
C
C
= 1.5 V
= 3.1 V
IN1
IN2
V
V
V
V
C
C
= 1.5 V
= 3.1 V
IN1
IN2
= 1.2 V
= 2.8 V
OUT1
= 1.2 V
OUT1
OUT2
= 2.8 V
OUT2
= 2.2 mF (MLCC)
= 1 mF (MLCC)
OUT1
OUT2
= 2.2 mF (MLCC)
= 1 mF (MLCC)
OUT1
OUT2
1.188
1.186
2.790
2.788
−40 −20
0
20
40
60
80
100 120 140
−40 −20
0
20
40
60
80
100 120 140
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 3. Output Voltage vs. Temperature −
Figure 4. Output Voltage vs. Temperature −
V
OUT1 = 1.2 V
VOUT2 = 2.8 V
3.0
2.5
2.0
1.5
1.0
0.5
0
3.0
2.5
2.0
1.5
1.0
0.5
0
V
V
V
V
= 1.5 V to 5.5 V
= 3.1 V
IN1
IN2
= 1.2 V
= 2.8 V
OUT1
OUT2
I
= I
OUT2
= 1 mA
OUT1
C
C
= 2.2 mF (MLCC)
= 1 mF (MLCC)
OUT1
OUT2
V
V
V
V
= 1.5 V
= 3.1 V to 5.5 V
IN1
IN2
−0.5
−1.0
−1.5
−0.5
−1.0
−1.5
= 1.2 V
= 2.8 V
OUT1
OUT2
I
= I
OUT2
= 1 mA
OUT1
−2.0
−2.5
−3.0
−2.0
−2.5
−3.0
C
C
= 2.2 mF (MLCC)
= 1 mF (MLCC)
OUT1
OUT2
−40 −20
0
20
40
60
80 100 120 140
−40 −20
0
20
40
60
80
100 120 140
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 5. Line Regulation vs. Temperature −
Figure 6. Line Regulation vs. Temperature −
V
OUT1 = 1.2 V
VOUT = 2.8 V
10
9
5.0
4.5
4.0
3.5
3.0
2.5
2.0
V
V
V
V
= 1.5 V
= 3.1 V
IN1
IN2
= 1.2 V
= 2.8 V
8
OUT1
OUT2
7
I
I
= 1 mA
OUT1
6
= 1 mA to 250 mA
= 2.2 mF (MLCC)
OUT2
V
= 1.5 V
= 3.1 V
= 1.2 V
= 2.8 V
= 1 mA to 500 mA
= 1 mA
C
C
IN1
OUT1
5
V
IN2
= 1 mF (MLCC)
OUT2
4
V
V
OUT1
OUT2
3
1.5
1.0
I
I
OUT1
2
OUT2
C
C
= 2.2 mF (MLCC)
= 1 mF (MLCC)
OUT1
OUT2
1
0
0.5
0
−40 −20
−40 −20
0
20
40
60
80 100 120 140
0
20
40
60
80 100 120 140
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 7. Load Regulation vs. Temperature −
OUT1 = 1.2 V
Figure 8. Load Regulation vs. Temperature −
V
VOUT = 2.8 V
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5
NCP156
APPLICATIONS INFORMATION
General
V
+ 0.3 V. The input voltage 2 is used as bias
OUT1_NOM
The NCP156 is a 500 mA/250 mA dual output high
voltage of N−MOS output together with supply OUT2 and
performance Low Dropout Linear Regulator. It offers
unique combination of N−MOS and P−MOS regulators to
provide the best performance and power efficiency. The
device is optimized for camera sensor applications to supply
digital and analog power rails. Digital supply rail requires
high current, low input voltage and as low as possible
dropout to achieve the best efficiency and analog pixel array
requires less current but very stable and clean supply line
with very fast transient response. The NCP156 is offered in
WLCSP6 package which helps with high integration as
close as possible to sensor for best parameters.
must be chosen more carefully. The basic condition to V
IN2
selections is the same as for first input V ≥ V
IN2
OUT2_NOM
+ V
. Due to the fact that V
is also bias voltage for
DO2
IN2
N−MOS regulator difference between V
and V
IN2
OUT1
must be at least 1.5 V.
The internal voltage references for both channels have
cascade topology. It means reference V for OUT2 is
REF2
derived from IN2 and reference for OUT1 is derived also
from reference V not from V . All negative effects on
REF2
IN1
V
REF2
is visible also on V
and then on V
. The
REF1
OUT1
reference voltage V
has same value as V
due to
REF2
OUT2
there is necessary to have enough voltage headroom
between V and V . If V is in dropout region then
Input Capacitor Selection (CIN)
IN2
OUT2
OUT2
It is recommended to connect at least a 1 mF Ceramic X5R
or X7R capacitor as close as possible to the IN pin of the
device. Larger input capacitor may be necessary if fast and
large load transients are encountered in the application. This
capacitor will provide a low impedance path for unwanted
AC signals or noise modulated onto constant input voltage.
There is no requirement for the min. or max. ESR of theinput
capacitor but it is recommended to use ceramic capacitors
for their low ESR and ESL. A good input capacitor will limit
the influence of input trace inductance and source resistance
during sudden load current changes.
OUT1 is affected too. Consequently the OUT1 output
voltage is lower than nominal due to lower V reference
REF1
which is affected by drop V
. For more information
REF2
please refer design note DN05110/D.
Enable Operation
The NCP156 uses the single EN pin for both output
channels. If the EN pin voltage is <0.4 V the device is
guaranteed to be disabled. The pass transistors are
turned−off so that there is virtually no current flow between
the INs and OUTs. According to selected option the active
discharge transistors are active so that the output voltages
are pulled to GND through a 150 W resistor. In the disable
state the device consumes as low as typ. 150 nA from the
power supply. Active discharge feature is available for each
output and can be select during manufacturing. It is
necessary to choose correct option by exact device part
number. Possible OPN configurations are in Table 5 below.
If the EN pin voltage >0.9 V the device is guaranteed to
be enabled. The NCP156 regulates the output voltage and
the active discharge transistor is turned−off.
Output Decoupling (COUT
)
The NCP156 requires an output capacitor for each output
connected as close as possible to the output pin of the
regulator. The recommended capacitor value for OUT1 is
2.2 mF and X7R or X5R dielectric due to its low capacitance
variations over the specified temperature range.
Recommended output capacitor for OUT2 is 1 mF same type
as OUT1. The NCP156 is designed to remain stable with
minimum effective capacitance of 1 mF for OUT1 and
0.7 mF for OUT2 to account for changes with temperature,
DC bias and package size. Especially for small package size
capacitors such as 0201 the effective capacitance drops
rapidly with the applied DC bias.
The EN pin has internal pull−down current source with
typ. value of 300 nA which assures that the device is
turned−off when the EN pin is not connected. In the case
where the EN function isn’t required the EN should be tied
directly to IN.
There is no requirement for the minimum value of
Equivalent Series Resistance (ESR) for the C
but the
OUT
maximum value of ESR should be less than 1.9 W. Larger
output capacitors and lower ESR could improve the load
transient response or high frequency PSRR. It is not
recommended to use tantalum or electrolytic capacitors on
the output due to their large ESR. They can be used in
connection with appropriate ceramic capacitor as secondary
energy reservoir.
Slew Rate Control
The NCP156 is optimized for camera sensor application
and meets all requirements for using in modern camera
applications such as a smartphones, cameras and image
capture devices. Power supply specification of sensors often
requires output voltage slew rate limitation to protect sensor
during regulator start−up. The NCP156 incorporates
soft−start feature which can assure safe start−up output
voltage ramp without excess current spikes and voltage
undershoots. The device provides two options of slew rate
speed, normal means typical slew rate about 100/200 mV/ms
(OUT1/OUT2) and slow option means <15/30 mV/ms.
Option is set during manufacturing process and cannot be
Input Voltage Requirements
The NCP156 is combination N−MOS and P−MOS
regulators in one package. It brings specific needs to proper
design of power supply voltage rails. Input voltage 1 can be
as low as V
+V
with minimal impact on
OUT1_NOM
DO1
performance. Typical parameters are characterized for
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6
NCP156
modified later. The possible slew rate configuration is
shutdown feature provides the protection from a
explained in below in Table 6.
catastrophic device failure due to accidental overheating.
This protection is not intended to be used as a substitute for
proper heat sinking. The long duration of the short circuit
condition to some output channel could cause turn−off other
output when heat sinking is not enough and temperature of
Output Current Limit
The NCP156 provides output overcurrent protection on
each output which limits maximum output current. Typical
values are 850 mA for OUT1 and 550 mA for OUT2. The
NCP156 will source this amount of current measured with
the other output reach T temperature.
SD
a voltage drops on the 90% of the nominal V
. If the
= 0 V),
Power Dissipation
OUT
Output Voltage is directly shorted to ground (V
As power dissipated in the NCP156 increases, it might
become necessary to provide some thermal relief. The
maximum power dissipation supported by the device is
dependent upon board design and layout. Mounting pad
configuration on the PCB, the board material, and the
ambient temperature affect the rate of junction temperature
rise for the part.
OUT
the short circuit protection will limit the output current
typically to 880 mA on OUT1 and 590 mA on OUT2. The
current limit and short circuit protection will work properly
over whole temperature range and also input voltage range.
There is no limitation for the short circuit duration. This
protection works separately for each channel. Short circuit
on the one channel do not influence second channel which
will work according to specification.
The maximum power dissipation the NCP156 can handle
is given by:
125oC * TA
Thermal Shutdown
When the die temperature exceeds the Thermal Shutdown
PD(MAX)
+
(eq. 1)
qJA
The power dissipated by the NCP156 for given
application conditions can be calculated from the following
equations:
threshold (T − 160°C typical), Thermal Shutdown event
SD
is detected and the affected channel is turn−off. Second
channel still working. The channel which is overheated will
remain in this state until the die temperature decreases below
ǒ
Ǔ
ǒ
Ǔ )
P
D [ VIN1 IGND1 ) VIN2 IGND2
the Thermal Shutdown Reset threshold (T
typical). Once the device temperature falls below the 140°C
the appropriate channel is enabled again. The thermal
− 140°C
SDU
(eq. 2)
ǒV
Ǔ
ǒV
Ǔ
) IOUT1 IN1 * VOUT1 ) IOUT2 IN2 * VOUT2
350
300
250
200
150
100
50
1.4
P
P
, T = 25°C, 2 oz Cu
A
D(MAX)
1.2
1.0
0.8
0.6
0.4
0.2
0.0
, T = 25°C, 1 oz Cu
D(MAX)
A
q
q
, 1 oz Cu
, 2 oz Cu
JA
JA
0
0
100
200
300
400
500
600
700
2
COPPER HEAT SPREADER AREA (mm )
Figure 9. qJA vs. Copper Area (WLCSP−6)
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NCP156
Reverse Current
OPN Selection Guide
The PMOS pass transistor has an inherent body diode
which will be forward biased in the case that V > V .
The NCP156 device offers various combinations of active
discharge feature and V slew rate speed for each output
OUT
IN
OUT
Due to this fact in cases, where the extended reverse current
condition can be anticipated the device may require
additional external protection.
channel. The OPN contains two letters behind product name
which are dedicated for Active discharge and Slew rate
speed. Possible combinations with corresponding letters are
explained below.
Power Supply Rejection Ratio
The NCP156 features very good Power Supply Rejection
ratio. If desired the PSRR at higher frequencies in the range
Table 5. ACTIVE DISCHARGE OPTION
Act. Discharge (x = ON)
OUT1
OUT2
100 kHz – 10 MHz can be tuned by the selection of C
capacitor and proper PCB layout.
OUT
A
B
C
D
x
x
PCB Layout Recommendations
x
To obtain good transient performance and good regulation
characteristics place input and output capacitors close to the
device pins and make the PCB traces wide. In order to
minimize the solution size, use 0402 capacitors. Larger
copper area connected to the pins will also improve the
device thermal resistance. The actual power dissipation can
be calculated from the equation above (Equation 2). Expose
pad should be tied the shortest path to the GND pin.
x
Table 6. VOUT SLEW RATE SPEED
Slew rate (x = Slower)
OUT1
OUT2
A
B
C
D
x
x
x
x
ORDERING INFORMATION
Voltage Option
Active Discharge
OUT1 / OUT2
V
Slew Rate
OUT
†
OUT1 / OUT2
1.0 V / 2.8 V
1.05 V / 2.8 V
1.1 V / 2.8 V
1.2 V / 1.8 V
1.2 V / 2.7 V
1.2 V / 2.8 V
1.0 V / 2.8 V
1.05 V / 2.8 V
1.1 V / 2.8 V
1.2 V / 2.7 V
1.2 V / 2.8 V
1.8 V / 2.5 V
1.8 V / 2.7 V
1.2 V / 1.8 V
OUT1 / OUT2
Device
Marking
Package
Shipping
NCP156AAFCT100280T2G*
NCP156AAFCT105280T2G
NCP156AAFCT110280T2G*
NCP156AAFCT120180T2G*
NCP156AAFCT120270T2G*
NCP156AAFCT120280T2G
NCP156ABFCT100280T2G
NCP156ABFCT105280T2G*
NCP156ABFCT110280T2G
NCP156ABFCT120270T2G*
NCP156ABFCT120280T2G
NCP156ABFCT180250T2G*
NCP156ABFCT180270T2G*
NCP156BBFCT120180T2G*
DL
Yes / Yes
Yes / Yes
Yes / Yes
Yes / Yes
Yes / Yes
Yes / Yes
Yes / Yes
Yes / Yes
Yes / Yes
Yes / Yes
Yes / Yes
Yes / Yes
Yes / Yes
No / No
Slow / Slow
DM
DN
DA
Slow / Slow
Slow / Slow
Slow / Slow
DP
Slow / Slow
DR
DD
DK
Slow / Slow
5000 /
Tape &
Reel
Normal / Normal
Normal / Normal
Normal / Normal
Normal / Normal
Normal / Normal
Normal / Normal
Normal / Normal
Normal / Normal
WLCSP6
(Pb−Free)
DE
DG
DF
DJ
DH
DC
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*Please contact local sales representative for availability.
www.onsemi.com
8
NCP156
PACKAGE DIMENSIONS
WLCSP6, 1.20x0.80
CASE 567MV
ISSUE B
E
A
NOTES:
B
D
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
PIN A1
REFERENCE
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
MILLIMETERS
2X
0.05
0.05
C
DIM
A
A1
A2
b
D
E
MIN
−−−
0.04
0.23 REF
0.24
1.20 BSC
0.80 BSC
0.40 BSC
MAX
0.33
0.08
2X
C
0.30
TOP VIEW
SIDE VIEW
A2
e
A
0.05
0.05
C
RECOMMENDED
SOLDERING FOOTPRINT*
C
PACKAGE
SEATING
PLANE
C
e
OUTLINE
NOTE 3
A1
A1
6X
b
e
0.05
0.03
C
C
A B
C
6X
0.40
PITCH
B
A
0.20
0.40
PITCH
1
2
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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◊
NCP156/D
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