NC7SZ74L8X [ONSEMI]
TinyLogic UHS D 型触发器,带预置和清除;型号: | NC7SZ74L8X |
厂家: | ONSEMI |
描述: | TinyLogic UHS D 型触发器,带预置和清除 逻辑集成电路 触发器 |
文件: | 总9页 (文件大小:469K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DATA SHEET
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TinyLogic UHS D-Type,
Flip-Flop with Preset and
Clear
US8
CASE 846AN
UQFN8
1.6X1.6, 0.5P
CASE 523AY
NC7SZ74
Description
MARKING DIAGRAMS
The NC7SZ74 is a single, D−type, CMOS flip−flop with preset and
clear from onsemi ultra high−speed series of TinyLogic. The device is
fabricated with advanced CMOS technology to achieve ultra high
speed with high output drive, while maintaining low static power
SZ74
N9KK
XYZ
dissipation over a very broad V operating range of 1.65 V to 5.5 V
CC
ALYW
V . The inputs and outputs are high impedance when V is 0 V.
CC
CC
Inputs tolerate voltages up to 5.5 V, independent of V operating
CC
voltage.
The signal level applied to the D input is transferred to the Q output
during the positive−going transition of the CLK pulse.
SZ74, N9 = Specific Device Code
A
L
YW
KK
XY
Z
= Assembly Site
= Wafer Lot Number
= Assembly Start Wee
= 2−Digit Lot Run Traceability Code
= 2−Digit Date Code Format
= Assembly Plant Code
Features
• Ultra−High Speed: t 2.6 ns (Typical) into 50 pF at 5 V V
PD
CC
• High Output Drive: 24 mA at 3 V V
CC
• Broad V Operating Range: 1.65 V to 5.5 V
CC
• Power Down High−Impedance Inputs/Outputs
• Over−Voltage Tolerance Inputs Facilitate 5 V to 3 V Translation
• Proprietary Noise/EMI Reduction Circuitry
PIN CONFIGURATIONS
CONNECTION DIAGRAM
IEEE/IEC
USB (Top View)
Figure 1. Logic Symbol
MicroPakt (Top Through View)
ORDERING INFORMATION
See detailed ordering and shipping information on page 6 of
this data sheet.
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
March, 2023 − Rev. 8
NC7SZ74/D
NC7SZ74
PIN DEFINITIONS
Pin # US8
Pin # MicroPak
Name
CK
D
Description
Clock Pulse Input
1
2
3
4
5
6
7
8
7
6
5
4
3
2
1
8
Data Input
Q
Flip−Flop Output
Ground
GND
Q
Flip−Flop Output
Direct Clear Input
Direct Preset Input
Supply Voltage
CLR
PR
VCC
FUNCTION TABLE
Inputs
Output
CLR
L
PR
H
D
CK
X
Q
L
Q
H
L
Function
X
X
Clear
H
L
X
H
Preset
L
H
H
H
L
H
H
H
X
L
X
H
L
H
H
L
↑
↑
↓
H
X
H
Q
Q
No Change
n
n
H = HIGH Logic Level
L = LOW Logic Level
Qn = No change in data
Z = High Impedance
X = Immaterial
↓= Falling Edge
↑ = Rising Edge
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Min
−0.5
−0.5
−0.5
−
Max
Unit
V
V
CC
Supply Voltage
6.5
6.5
V
DC Input Voltage
DC Output Voltage
V
IN
V
OUT
6.5
V
I
IK
DC Input Diode Current
V
V
< 0 V
−50
−50
50
mA
mA
mA
mA
°C
IN
I
DC Output Diode Current
DC Output Source/Sink Current
< 0 V
−
OK
OUT
I
−
OUT
I
or I
DC V or Ground Current
−
50
CC
GND
CC
T
STG
Storage Temperature Range
−65
−
+150
+150
+260
T
J
Junction Temperature Under Bias
°C
T
Junction Lead Temperature (Soldering, 10 Seconds)
Power Dissipation in Still Air
−
°C
L
P
D
US8
MicroPak−8
−
−
500
539
mW
ESD
Human Body Model: JEDEC:JESD22−A114
Charge Device Model: JEDEC:JESD22−C101
−
−
4000
2000
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
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2
NC7SZ74
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Supply Voltage Operating
Supply Voltage Data Retention
Input Voltage
Conditions
Min
1.65
1.50
0
Max
5.50
5.50
5.5
VCC
5.5
20
Unit
V
CC
V
V
IN
V
V
V
OUT
Output Voltage
Active State
0
3−State
0
t , t
Input Rise and Fall Times
V
CC
V
CC
V
CC
= 1.8 V, 2.5 V 0.2 V
= 3.3 V 0.3 V
0
ns/V
r
f
0
10
= 5.0 V 0.5 V
0
5
T
Operating Temperature
Thermal Resistance
−40
+85
250
232
°C
A
θ
JA
US8
MicroPak−8
°C/W
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
NOTE: Unused inputs must be held HIGH or LOW. They may not float.
DC ELECTRICAL CHARACTERISTICS
T = +255C
T = −40 to +855C
A
A
Min
0.65 V
0.70 V
Typ
Max
Min
0.65 V
0.70 V
Max
Symbol
Parameter
VCC
1.65 to 1.95
2.30 to 5.50
1.65 to 1.95
2.30 to 5.50
1.65
Conditions
Units
V
IH
HIGH Level Control
Input Voltage
V
CC
CC
CC
CC
V
IL
LOW Level Control
Input Voltage
0.35 V
0.30 V
0.35 V
0.30 V
V
V
CC
CC
CC
CC
V
OH
HIGH Level Output
Voltage
VIN = VIH,
1.55
2.20
2.90
4.40
1.29
1.90
2.40
2.30
3.80
1.65
2.30
3.00
4.50
1.52
2.15
2.80
2.68
4.20
1.55
2.20
2.90
4.40
1.29
1.90
2.40
2.30
3.80
I
= −100 mA
OH
2.30
3.00
4.50
1.65
I
I
I
I
I
= −4 mA
= −8 mA
= −16 mA
= −24 mA
= −32 mA
OH
OH
OH
OH
OH
2.30
3.00
3.00
4.50
V
LOW Level Control
Output Voltage
1.65
V
OL
= V ,
IH
0.10
0.10
0.10
0.10
0.24
0.30
0.40
0.55
0.55
0.1
0.10
0.10
0.10
0.10
0.24
0.30
0.40
0.55
0.55
1.0
V
OL
IN
I
= 100 mA
2.30
3.00
4.50
1.65
I
OL
I
OL
I
OL
I
OL
I
OL
= 4 mA
0.10
0.10
0.15
0.22
0.22
2.30
= 8 mA
3.00
= 16 mA
= 24 mA
= 32 mA
3.00
4.50
I
IN
Input Leakage
Current
1.65 to 5.5
0 ≤ V ≤ 5.5 V
mA
mA
mA
IN
I
Power Off Leakage
Current
0
V
or V = 5.5 V
OUT
1
1
10
10
OFF
IN
IN
I
Quiescent Supply
Current
1.65 to 5.50
V
= 5.5 V, GND
CC
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3
NC7SZ74
AC ELECTRICAL CHARACTERISTICS
T = +255C
T = −40 to +855C
A
A
Min
75
Typ
Max
Min
Max
Symbol
Parameter
V
Conditions
C = 15 pF,
Units
Figure
CC
f
Maximum Clock
Frequency
1.80 0.15
2.50 0.20
3.30 0.30
5.00 0.50
3.30 0.50
75
MHz
Figure 4
Figure 8
MAX
L
R
= 1 MW,
D
150
200
250
175
150
200
250
175
S = Open
1
C = 50 pF,
L
D
R
= 500 W,
5.00 0.50
200
200
S = Open
1
t
, t
Propagation Delay
CK to Q, Q
1.80 0.15
2.50 0.20
3.30 0.30
5.00 0.50
3.30 0.30
C = 15 pF,
6.5
3.8
2.8
2.2
3.4
12.5
7.5
6.5
4.5
7.0
13.0
8.0
7.0
5.0
7.5
ns
ns
ns
ns
ns
ns
Figure 4
Figure 6
PLH PHL
L
R
= 1 MW,
D
S = Open
1
C = 50 pF,
L
D
R
= 500 W,
5.00 0.50
2.6
5.0
5.5
S = Open
1
t
, t
Propagation Delay
CLR, PR to Q, Q
1.80 0.15
2.50 0.20
3.30 0.30
5.00 0.50
3.30 0.30
C = 15 pF,
6.5
3.8
2.8
2.2
3.4
14.0
9.0
6.5
5.0
7.0
14.5
9.5
7.0
5.5
7.5
Figure 4
Figure 6
PLH PHL
L
R = 1 MW,
L
S = Open
1
C = 50 pF,
L
D
R
= 500 W,
5.00 0.50
2.6
5.0
5.5
S = Open
1
t
S
Setup Time CK to D
1.80 0.15
2.50 0.20
3.30 0.30
5.00 0.50
3.30 0.30
C = 15 pF,
6.5
3.5
2.0
1.5
2.0
6.5
3.5
2.0
1.5
2.0
Figure 4
Figure 7
L
R = 1 MW,
L
S = Open
1
C = 50 pF,
L
D
R
= 500 W,
5.00 0.50
1.5
1.5
S = Open
1
t
H
Hold Time, CK to D
1.80 0.15
2.50 0.20
3.30 0.30
5.00 0.50
3.30 0.30
C = 15 pF,
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
Figure 4
Figure 7
L
R = 1 MW,
L
S = Open
1
C = 50 pF,
L
D
R
= 500 W,
5.00 0.50
0.5
0.5
S = Open
1
t
W
Pulse Width, CK,
PR, CLR
1.80 0.15
2.50 0.20
3.30 0.30
5.00 0.50
3.30 0.30
C = 15 pF,
6.0
4.0
3.0
2.0
3.0
6.0
4.0
3.0
2.0
3.0
Figure 4
Figure 8
L
R = 1 MW,
L
S = Open
1
C = 50 pF,
L
D
R
= 500 W,
5.00 0.50
2.0
2.0
S = Open
1
t
Recover Time CLR,
PR to CK
1.80 0.15
2.50 0.20
3.30 0.30
5.00 0.50
3.30 0.30
C = 15 pF,
8.0
4.5
3.0
3.0
3.0
8.0
4.5
3.0
3.0
3.0
Figure 7
REC
L
R = 1 MW,
L
S = Open
1
C = 50 pF,
L
D
R
= 500 W,
5.00 0.50
3.0
3.0
S = Open
1
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4
NC7SZ74
AC ELECTRICAL CHARACTERISTICS (continued)
T = +255C
T = −40 to +855C
A
A
Min
Typ
Max
Min
Max
Symbol
Parameter
V
Conditions
Units
pF
Figure
CC
C
Input Capacitance
Output Capacitance
0
3
IN
C
0
4
pF
OUT
C
Power Dissipation
Capacitance (Note 1)
3.30
5.00
10
12
pF
PD
1. C is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I
) at
PD
CCD
no output loading and operating at 50% duty cycle. C
is related to I
dynamic operating current by the expression:
PD
CCD
I
= (C )(V )(f ) + (I static).
CCD
PD CC IN CC
3. CP input = AC Waveforms t = t = 2.5 ns.
4. CP input PRR = 10 MHz; Duty Cycle = 50%.
5. D input PRR = 5 MHz; Duty Cycle = 50%.
r
f
2. C includes load and stray capacitance.
L
Input PRR = 1.0 MHz t = 500 ns.
w
Figure 2. AC Test Circuit
Figure 3. AC Test Circuit
Figure 4. AC Waveforms
Figure 5. AC Waveforms
Figure 6. AC Waveforms
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5
NC7SZ74
ORDERING INFORMATION
†
Part Number
NC7SZ74K8X
Top Mark
Package
Packing Method
SZ74
SZ74
N9
8−Lead US8, JEDEC MO−187, Variation CA 3.1mm Wide
8−Lead US8, JEDEC MO−187, Variation CA 3.1mm Wide
8−Lead MicroPak, 1.6 mm Wide
3000 Units on Tape & Reel
3000 Units on Tape & Reel
5000 Units on Tape & Reel
5000 Units on Tape & Reel
NC7SZ74K8X−L22236
NC7SZ74L8X
NC7SZ74L8X−L22185
N9
8−Lead MicroPak, 1.6 mm Wide
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D
MicroPak is a trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other
countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
UQFN8 1.6X1.6, 0.5P
CASE 523AY
ISSUE O
DATE 31 AUG 2016
0.40
(6X)
1.60
A
0.05
C
1.60
B
0.45
(2X)
2X
1.60
1.61
0.05
C
PIN#1 IDENT
0.50
TOP VIEW
0.25
(8X)
RECOMMENDED
LAND PATTERN
0.50 0.05
0.05
0.05
C
C
NOTES:
SEATING
PLANE
A. PACKAGE CONFORMS TO JEDEC MO−255
C
VARIATION UAAD.
0.025 0.025
B. DIMENSIONS ARE IN MILLIMETERS.
SIDE VIEW
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 2009.
1.60 0.05
D. LAND PATTERN RECOMMENDATION IS
EXISTING INDUSTRY LAND PATTERN.
(0.10)
(0.20)3X
(0.09)
DETAIL A
1
2
3
(0.20)
4
8
1.60 0.05
0.30 0.05
0.30 0.05 (7X)
0.50
(0.15)
7
6
5
0.20 0.05 (8X)
0.30 0.05
0.10
0.05
C
C
A
B
1.00 0.05
DETAIL A
SCALE : 2X
BOTTOM VIEW
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13591G
UQFN8 1.6X1.6, 0.5P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
US8
CASE 846AN
ISSUE O
DATE 31 DEC 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13778G
US8
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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