NC7SVL32FHX [ONSEMI]

Tiny Logic Low-ICCT Two-Input OR Gate;
NC7SVL32FHX
型号: NC7SVL32FHX
厂家: ONSEMI    ONSEMI
描述:

Tiny Logic Low-ICCT Two-Input OR Gate

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December 2010  
NC7SVL32  
TinyLogic® Low-ICCT Two-Input OR Gate  
Features  
Description  
The NC7SVL32 is a single two-input OR gate with a  
Low-ICCT input design from Fairchild’s Ultra-Low Power  
(ULP-A) series of TinyLogic®. The NC7SVL32 features  
very low quiescent current, even when the input voltage  
is lower than the VCC supply. This feature services  
mobile handset applications very well, allowing for direct  
interface with baseband processor general-purpose  
I/Os. Since mobile devices rely on a battery supply, the  
NC7SVL32 facilitates lower power consumption in  
mixed-voltage rail environments.  
ƒ
ƒ
0.9V to 3.6V VCC Supply Operation  
3.6V Over-Voltage Tolerant I/Os at VCC from  
0.9V to 3.6V  
ƒ
ƒ
Power-Off High-Impedance Inputs and Outputs  
Proprietary Quiet Series™ Noise / EMI Reduction  
Circuitry  
ƒ
ƒ
Ultra-Small MicroPak™ Packages  
Ultra-Low Dynamic Power  
This product is designed on an advanced CMOS  
technology for a wide low-voltage operating range (0.9V  
to 3.6V VCC), high drive needs (up to 24mA), and speed  
(maximum propagation delay of 3.5ns, VCC=3.3V). It  
achieves this performance while maintaining low CMOS  
power dissipation.  
Ordering Information  
Part Number  
NC7SVL32P5X  
NC7SVL32L6X  
NC7SVL32FHX  
Top Mark  
Package  
Packing Method  
L32  
CF  
CF  
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide  
6-Lead MicroPak™, 1.00mm Wide  
3000 Units on Tape & Reel  
5000 Units on Tape & Reel  
5000 Units on Tape & Reel  
6-Lead, MicroPak2™, 1x1mm Body, .35mm Pitch  
© 2008 Fairchild Semiconductor Corporation  
NC7SVL32 • Rev. 1.0.4  
www.fairchildsemi.com  
Connection Diagram  
IEEE/IEC  
A
B
Y
1  
Figure 1.  
Logic Symbol  
Pin Configurations  
1
5
4
A
VCC  
1
2
3
6
5
4
A
B
VCC  
NC  
Y
2
B
GND  
Figure 3.  
3
GND  
Y
Figure 2.  
SC70 (Top View)  
MicroPak™ (Top Through View)  
Pin Definitions  
Pin # SC70  
Pin # MicroPak™  
Name  
A
Description  
Input  
1
2
3
4
1
2
3
4
5
6
B
Input  
GND  
Y
Ground  
Output  
NC  
VCC  
No Connect  
Supply Voltage  
5
Function Table  
Y = A+B  
Inputs  
Output  
A
L
B
L
Y
L
L
H
L
H
H
H
H
H
H
H = HIGH Logic Level  
L = LOW Logic Level  
© 2008 Fairchild Semiconductor Corporation  
NC7SVL32 • Rev. 1.0.4  
www.fairchildsemi.com  
2
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.  
In addition, extended exposure to stresses above the recommended operating conditions may affect device  
reliability. The absolute maximum ratings are stress ratings only.  
Symbol  
VCC  
Parameter  
Min.  
-0.5  
-0.5  
-0.5  
-0.5  
Max.  
4.6  
Unit  
V
Supply Voltage  
VIN  
DC Input Voltage  
4.6  
V
HIGH or LOW State(1)  
VCC + 0.5  
4.6  
VOUT  
IIK  
DC Output Voltage  
V
VCC = 0V  
VIN < 0V  
DC Input Diode Current  
DC Output Diode Current  
DC Output Source/Sink Current  
-50  
mA  
mA  
VOUT < 0V  
VOUT > VCC  
-50  
IOK  
+50  
IOH / IOL  
ICC or IGND  
TSTG  
±50  
mA  
mA  
°C  
DC VCC or Ground Current per Supply Pin  
Storage Temperature Range  
±50  
-65  
+150  
+150  
+260  
150  
TJ  
Junction Temperature Under Bias  
Junction Lead Temperature, Soldering 10 Seconds  
SC70-5  
°C  
TL  
°C  
PD  
Power Dissipation at +85°C  
MicroPak™-6  
MicroPak2™-6  
130  
mW  
V
120  
Human Body Model, JEDEC:JESD22-A114  
Charge Device Model, JEDEC:JESD22-C101  
4000  
2000  
ESD  
Note:  
1. IO absolute maximum ratings must be observed.  
Recommended Operating Conditions  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended  
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not  
recommend exceeding them or designing to Absolute Maximum Ratings.  
Symbol  
VCC  
Parameter  
Supply Voltage  
Conditions  
Min.  
0.9  
0
Max.  
3.6  
Unit  
V
VIN  
Input Voltage  
3.6  
V
VCC=0V  
HIGH or LOW State  
CC=3.0V to 3.6V  
0
3.6  
VOUT  
Output Voltage  
V
0
VCC  
V
±24.0  
±18.0  
±6.0  
±4.0  
±2.0  
±0.1  
VCC=2.3V to 2.7V  
VCC=1.65V to 1.95V  
VCC=1.4V to 1.6V  
VCC=1.1V to 1.3V  
VCC=0.9V  
IOH/IOL  
Output Current in IOH/IOL  
mA  
TA  
Operating Temperature, Free Air  
Minimum Input Edge Rate  
-40  
+85  
°C  
VIN=0.8V to 2.0, VCC=3.0V  
SC70-5  
10  
ns/V  
Δt/ΔV  
425  
500  
560  
Thermal Resistance  
MicroPak™-6  
°C/W  
θJA  
MicroPak2™-6  
Note:  
2. Unused inputs must be held HIGH or LOW. They may not float.  
© 2008 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
NC7SVL32 • Rev. 1.0.4  
3
DC Electrical Characteristics  
TA=25°C  
Min.  
TA=-40 to +85°C  
Symbol  
Parameter  
VCC  
Conditions  
Units  
Max.  
Min.  
.65 x VCC  
.65 x VCC  
.65 x VCC  
0.90  
Max.  
0.90  
.65 x VCC  
.65 x VCC  
.65 x VCC  
0.90  
1.10 VCC 1.30  
1.40 VCC 1.60  
1.65 VCC 1.95  
2.30 VCC 2.70  
2.70 VCC 3.60  
0.90  
HIGH Level Input  
Voltage  
VIH  
V
1.50  
1.50  
1.50  
1.50  
.25 x VCC  
.25 x VCC  
.25 x VCC  
.25 x VCC  
0.70  
.25 x VCC  
.25 x VCC  
.25 x VCC  
.25 x VCC  
0.70  
1.10 VCC 1.30  
1.40 VCC 1.60  
1.65 VCC 1.95  
2.30 VCC 2.70  
2.70 VCC 3.60  
0.90  
LOW Level Input  
Voltage  
VIL  
V
0.80  
0.80  
VCC-0.10  
VCC-0.10  
VCC-0.10  
VCC-0.10  
VCC-0.20  
VCC-0.20  
VCC-0.20  
VCC-0.20  
.75 x VCC  
.75 x VCC  
1.25  
1.10 VCC 1.30  
1.40 VCC 1.60  
1.65 VCC 1.95  
2.30 VCC 2.70  
2.70 VCC 3.60  
1.10 VCC 1.30  
1.40 VCC 1.60  
1.65 VCC 1.95  
2.30 VCC 2.70  
2.30 VCC 2.70  
2.70 VCC 3.60  
2.30 VCC 2.70  
2.70 VCC 3.60  
2.70 VCC 3.60  
V
V
V
V
CC-0.20  
CC-0.20  
CC-0.20  
CC-0.20  
I
OH=-100µA  
I
I
OH=-2mA  
OH=-4mA  
.75 x VCC  
.75 x VCC  
1.25  
HIGH Level Output  
Voltage  
VOH  
V
I
I
OH=-6mA  
2.00  
2.00  
1.80  
1.80  
OH=-12mA  
2.20  
2.20  
1.70  
1.70  
I
I
OH=-18mA  
OH=-24mA  
2.40  
2.40  
2.20  
2.20  
Continued on the following page…  
© 2008 Fairchild Semiconductor Corporation  
NC7SVL32 • Rev. 1.0.4  
www.fairchildsemi.com  
4
DC Electrical Characteristics (Continued)  
TA=25°C  
TA=-40 to +85°C  
Symbol  
Parameter  
VCC  
Conditions  
Units  
Min.  
Max.  
0.1  
Min.  
Max.  
0.1  
0.90  
0.1  
0.1  
1.10 VCC 1.30  
1.40 VCC 1.60  
1.65 VCC 1.95  
2.30 VCC 2.70  
2.70 VCC 3.60  
1.10 VCC 1.30  
1.40 VCC 1.60  
1.65 VCC 1.95  
2.30 VCC 2.70  
2.70 VCC 3.60  
2.30 VCC 2.70  
2.70 VCC 3.60  
2.70 VCC 3.60  
0.2  
0.2  
I
I
OL=100µA  
0.2  
0.2  
0.2  
0.2  
0.2  
0.2  
OL=2mA  
0.25 x VCC  
0.25 x VCC  
0.30  
0.25 x VCC  
0.25 x VCC  
0.3  
LOW Level  
Output Voltage  
VOL  
V
IOL=4mA  
IOL=6mA  
0.40  
0.40  
IOL=12mA  
IOL=18mA  
0.40  
0.40  
0.60  
0.60  
0.40  
0.40  
IOL=24mA  
0.55  
0.55  
Input Leakage  
Current  
IIN  
0.90 to 3.60  
±0.1  
±0.5  
0.5  
µA  
µA  
0 VIN 3.60V  
Power Off  
Leakage  
Current  
IOFF  
0
0.5  
0.9  
0 (VIN, VO) 3.60V  
VIN=VCC, or GND  
VCC VIN 3.60V  
VIN=0.9V  
0.9  
±0.9  
8
Quiescent  
Supply Current  
ICC  
0.90 to 3.60  
µA  
µA  
1.95  
3.60  
6
6
Increase in ICC  
per Input  
ICCT  
VIN=1.5V  
8
AC Electrical Characteristics  
TA=25°C  
TA=-40 to 85°C  
Symbol Parameter  
VCC  
Conditions  
CL=15pF, RL=1MΩ  
CL=15pF, RL=2kΩ  
Units Figure  
Min. Typ. Max. Min.  
Max.  
0.90  
42.0  
3.5  
1.5  
1.1  
0.6  
0.5  
8.2  
4.0  
3.2  
2.3  
1.9  
17.0  
7.0  
5.5  
4.0  
3.5  
3.0  
1.5  
1.0  
0.6  
0.5  
30.5  
7.5  
6.0  
4.5  
4.0  
1.10 VCC 1.30  
1.40 VCC 1.60  
1.65 VCC 1.95  
Propagation  
tPHL, tPLH  
Figure 4  
ns  
Delay  
Figure 5  
2.30 VCC 2.70 CL=30pF, RL=500Ω  
2.70 VCC 3.60  
Input  
CIN  
0
3
5
pF  
pF  
Capacitance  
Power  
VIN=0V or VCC  
f=10MHz  
,
CPD  
Dissipation  
0.90 to 3.60  
Capacitance  
© 2008 Fairchild Semiconductor Corporation  
NC7SVL32 • Rev. 1.0.4  
www.fairchildsemi.com  
5
AC Loadings and Waveforms  
Figure 4. AC Test Circuit  
Figure 5.  
AC Waveforms  
VCC  
2.5V ± 0.2V 1.8V ± 0.15V 1.5V ± 0.1V  
Symbol  
3.3V ± 0.3V  
1.5V  
1.2V ± 0.1V  
VCC/2  
0.9V  
VCC/2  
VCC/2  
Vmi  
VCC/2  
VCC/2  
VCC/2  
VCC/2  
VCC/2  
VCC/2  
Vmo  
1.5V  
VCC/2  
© 2008 Fairchild Semiconductor Corporation  
NC7SVL32 • Rev. 1.0.4  
www.fairchildsemi.com  
6
Physical Dimensions  
Figure 6.  
5-Lead, SC70, EIAJ SC-88a, 1.25mm Wide  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify  
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically  
the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/.  
Tape and Reel Specifications  
Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:  
http://www.fairchildsemi.com/products/analog/pdf/sc70-5_tr.pdf.  
Package Designator  
Tape Section  
Leader (Start End)  
Carrier  
Cavity Number  
125 (Typical)  
3000  
Cavity Status Cover Type Status  
Empty  
Filled  
Sealed  
Sealed  
Sealed  
P5X  
Trailer (Hub End)  
75 (Typical)  
Empty  
© 2008 Fairchild Semiconductor Corporation  
NC7SVL32 • Rev. 1.0.4  
www.fairchildsemi.com  
7
Physical Dimensions  
2X  
0.05 C  
1.45  
B
(1)  
2X  
0.05 C  
(0.49)  
5X  
(0.254)  
1.00  
(0.75)  
(0.52)  
1X  
TOP VIEW  
A
PIN 1 IDENTIFIER  
5
0.55MAX  
(0.30)  
6X  
PIN 1  
0.05 C  
0.05  
0.00  
RECOMMENED  
LAND PATTERN  
0.05 C  
C
0.45  
0.35  
0.10  
6X  
0.00  
0.25  
6X  
0.15  
1.0  
DETAIL A  
0.10  
C B A  
0.40  
0.30  
0.05  
C
0.35  
0.25  
5X  
5X  
0.40  
0.30  
DETAIL A  
PIN 1 TERMINAL  
0.075 X 45  
CHAMFER  
0.5  
BOTTOM VIEW  
(0.05)  
6X  
(0.13)  
4X  
Notes:  
1. CONFORMS TO JEDEC STANDARD M0-252 VARIATION UAAD  
2. DIMENSIONS ARE IN MILLIMETERS  
3. DRAWING CONFORMS TO ASME Y14.5M-1994  
4. FILENAME AND REVISION: MAC06AREV4  
5. PIN ONE IDENTIFIER IS 2X LENGTH OF ANY  
OTHER LINE IN THE MARK CODE LAYOUT.  
Figure 7.  
6-Lead, MicroPak™, 1.0mm Wide  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify  
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically  
the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/.  
Tape and Reel Specifications  
Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:  
http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf.  
Package Designator  
Tape Section  
Leader (Start End)  
Carrier  
Cavity Number  
125 (Typical)  
5000  
Cavity Status Cover Type Status  
Empty  
Filled  
Sealed  
Sealed  
Sealed  
L6X  
Trailer (Hub End)  
75 (Typical)  
Empty  
© 2008 Fairchild Semiconductor Corporation  
NC7SVL32 • Rev. 1.0.4  
www.fairchildsemi.com  
8
Physical Dimensions  
0.89  
0.35  
0.05 C  
2X  
1.00  
B
A
5X 0.40  
1X 0.45  
PIN 1  
0.66  
MIN 250uM  
1.00  
6X 0.19  
0.05 C  
TOP VIEW  
RECOMMENDED LAND PATTERN  
FOR SPACE CONSTRAINED PCB  
2X  
0.90  
0.35  
0.05 C  
0.55MAX  
C
5X 0.52  
SIDE VIEW  
0.73  
0.57  
1X  
(0.08) 4X  
DETAIL A  
0.09  
0.19  
6X  
1
2
3
0.20 6X  
ALTERNATIVE LAND PATTERN  
FOR UNIVERSAL APPLICATION  
(0.05) 6X  
0.35  
0.25  
5X  
0.60  
6
5
4
0.10  
.05 C  
C B A  
0.40  
0.30  
0.35  
(0.08)  
4X  
BOTTOM VIEW  
NOTES:  
A. COMPLIES TO JEDEC MO-252 STANDARD  
B. DIMENSIONS ARE IN MILLIMETERS.  
0.075X45°  
CHAMFER  
C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994  
D. LANDPATTERN RECOMMENDATION IS BASED ON FSC  
DESIGN.  
DETAIL A  
PIN 1 LEAD SCALE: 2X  
E. DRAWING FILENAME AND REVISION: MGF06AREV3  
Figure 8.  
6-Lead, MicroPak2™, 1x1mm Body, .35mm Pitch  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify  
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically  
the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/.  
Tape and Reel Specifications  
Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:  
http://www.fairchildsemi.com/packaging/MicroPAK2_6L_tr.pdf.  
Package Designator  
Tape Section  
Leader (Start End)  
Carrier  
Cavity Number  
125 (Typical)  
5000  
Cavity Status Cover Type Status  
Empty  
Filled  
Sealed  
Sealed  
Sealed  
FHX  
Trailer (Hub End)  
75 (Typical)  
Empty  
© 2008 Fairchild Semiconductor Corporation  
NC7SVL32 • Rev. 1.0.4  
www.fairchildsemi.com  
9
© 2008 Fairchild Semiconductor Corporation  
NC7SVL32 • Rev. 1.0.4  
www.fairchildsemi.com  
10  
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coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.  
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
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expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such  
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