MMUN2218LT1G [ONSEMI]
NPN Bipolar Digital Transistor (BRT);
| 型号： | MMUN2218LT1G |
| 厂家： | 
ONSEMI |
| 描述： | NPN Bipolar Digital Transistor (BRT) 光电二极管 晶体管 |
| 文件： | 总6页 (文件大小：200K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
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PIN CONNECTIONS
Digital Transistor (BRT)
PIN 3
COLLECTOR
(OUTPUT)
R1 = 1.0 kW, R2 = 10 kW
NPN Transistors with Monolithic Bias
Resistor Network
PIN 1
BASE
(INPUT)
R1
R2
PIN 2
EMITTER
(GROUND)
MMUN2218L
This digital transistor is designed to replace a single device and its
external resistor bias network. The Bias Resistor Transistor (BRT)
contains a single transistor with a monolithic bias network consisting
of two resistors; a series base resistor and a base−emitter resistor. The
BRT eliminates these individual components by integrating them into
a single device. The use of a BRT can reduce both system cost and
board space.
MARKING DIAGRAM
SOT−23
CASE 318
STYLE 6
AA6 MG
G
1
Features
AA6
M
G
= Specific Device Code
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
=
=
Date Code*
Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending up-
on manufacturing location.
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS (T = 25°C)
A
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Rating
Collector−Base Voltage
Collector−Emitter Voltage
Collector Current − Continuous
Input Forward Voltage
Symbol
Max
50
Unit
Vdc
V
CBO
V
CEO
50
Vdc
I
C
100
30
mAdc
Vdc
V
IN(fwd)
Input Reverse Voltage
V
IN(rev)
5
Vdc
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
November, 2021 − Rev. 2
MMUN2218L/D
MMUN2218L
Table 1. ORDERING INFORMATION
†
Device
Package
Shipping
MMUN2218LT1G
SOT−23
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
300
SOT−23; Minimum Pad
250
200
150
100
50
0
−50 −25
0
25
50
75
100
125 150
AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
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2
MMUN2218L
Table 2. THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
THERMAL CHARACTERISTICS (SOT−23)
Total Device Dissipation
A
P
D
T = 25°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
246
400
2.0
3.2
mW
Derate above 25°C
mW/°C
°C/W
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
R
508
311
q
JA
Thermal Resistance,
Junction to Lead
(Note 1)
(Note 2)
R
174
208
°C/W
°C
q
JL
Junction and Storage Temperature Range
T , T
J
−55 to +150
stg
1. FR−4 @ Minimum Pad.
2. FR−4 @ 1.0 x 1.0 Inch Pad.
Table 3. ELECTRICAL CHARACTERISTICS (T = 25°C, unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector−Base Cutoff Current
I
I
nA
nA
CBO
(V = 50 V, I = 0)
−
−
−
−
−
−
−
100
100
790
−
CB
E
Collector−Emitter Cutoff Current
(V = 50 V, I = 0)
CEO
CE
B
Emitter−Base Cutoff Current
(V = 6.0 V, I = 0)
I
mA
V
EBO
EB
C
−
Collector−Base Breakdown Voltage
(I = 10 mA, I = 0)
V
V
(BR)CBO
(BR)CEO
C
E
50
50
Collector−Emitter Breakdown Voltage (Note 3)
(I = 2.0 mA, I = 0)
V
C
B
−
ON CHARACTERISTICS
DC Current Gain (Note 5)
h
FE
(I = 5.0 mA, V = 10 V)
C
CE
40
60
−
Collector *Emitter Saturation Voltage (Note 3)
VCE(sat)
V
(I = 10 mA, I = 1.0 mA)
C
B
−
−
−
0.25
0.5
−
Input Voltage (off)
(V = 5.0 V, I = 100 mA)
V
V
V
V
V
i(off)
0.7
0.9
CE
C
Input Voltage (on)
(V = 0.3 V, I = 5 mA)
i(on)
1.3
CE
C
Output Voltage (on)
(V = 5.0 V, V = 2.5 V, R = 1.0 kW)
V
OL
CC
B
L
−
−
0.2
Output Voltage (off)
V
V
OH
(V = 5.0 V, V = 0.5 V, R = 1.0 kW)
CC
B
L
4.9
0.7
−
−
Input Resistor
Resistor Ratio
R1
R /R
1.0
0.1
1.3
kW
0.08
0.14
1
2
3. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle v 2%.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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3
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318
ISSUE AT
DATE 01 MAR 2023
SCALE 4:1
GENERIC
MARKING DIAGRAM*
XXXMG
G
1
XXX = Specific Device Code
M
= Date Code
G
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLES ON PAGE 2
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42226B
SOT−23 (TO−236)
PAGE 1 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318
ISSUE AT
DATE 01 MAR 2023
STYLE 1 THRU 5:
CANCELLED
STYLE 6:
STYLE 7:
PIN 1. EMITTER
2. BASE
STYLE 8:
PIN 1. BASE
PIN 1. ANODE
2. EMITTER
3. COLLECTOR
2. NO CONNECTION
3. CATHODE
3. COLLECTOR
STYLE 9:
PIN 1. ANODE
2. ANODE
STYLE 10:
STYLE 11:
PIN 1. ANODE
2. CATHODE
STYLE 12:
STYLE 13:
PIN 1. SOURCE
2. DRAIN
STYLE 14:
PIN 1. CATHODE
2. GATE
PIN 1. DRAIN
2. SOURCE
3. GATE
PIN 1. CATHODE
2. CATHODE
3. ANODE
3. CATHODE
3. CATHODE−ANODE
3. GATE
3. ANODE
STYLE 15:
STYLE 16:
STYLE 17:
PIN 1. NO CONNECTION
2. ANODE
STYLE 18:
STYLE 19:
STYLE 20:
PIN 1. CATHODE
2. ANODE
PIN 1. GATE
2. CATHODE
3. ANODE
PIN 1. ANODE
2. CATHODE
3. CATHODE
PIN 1. NO CONNECTION PIN 1. CATHODE
2. CATHODE
3. ANODE
2. ANODE
3. CATHODE−ANODE
3. CATHODE
3. GATE
STYLE 21:
STYLE 22:
STYLE 23:
PIN 1. ANODE
2. ANODE
STYLE 24:
STYLE 25:
STYLE 26:
PIN 1. GATE
2. SOURCE
3. DRAIN
PIN 1. RETURN
2. OUTPUT
3. INPUT
PIN 1. GATE
2. DRAIN
PIN 1. ANODE
2. CATHODE
3. GATE
PIN 1. CATHODE
2. ANODE
3. SOURCE
3. NO CONNECTION
3. CATHODE
STYLE 27:
STYLE 28:
PIN 1. CATHODE
2. CATHODE
3. CATHODE
PIN 1. ANODE
2. ANODE
3. ANODE
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42226B
SOT−23 (TO−236)
PAGE 2 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
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