MM74HC245AMTCX [ONSEMI]
八路 3 态收发器;
| 型号： | MM74HC245AMTCX |
| 厂家： | 
ONSEMI |
| 描述： | 八路 3 态收发器 光电二极管 逻辑集成电路 |
| 文件： | 总10页 (文件大小：346K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
Octal 3-STATE Transceiver
MM74HC245Aꢀ
20
20
20
1
1
SOIC−20 WB,
CASE 751D−05
SOIC−20, 300 mils
CASE 751BJ−01
General Description
The MM74HC245A 3−STATE bidirectional buffer utilizes
advanced silicon−gate CMOS technology, and is intended for
two−way asynchronous communication between data buses. It has
high drive current outputs which enable high speed operation even
when driving large bus capacitances. This circuit possesses the low
power consumption and high noise immunity usually associated with
CMOS circuitry, yet has speeds comparable to low power Schottky
TTL circuits.
This device has an active LOW enable input G and a direction
control input, DIR. When DIR is HIGH, data flows from the A inputs
to the B outputs. When DIR is LOW, data flows from the B inputs to
the A outputs. The MM74HC245A transfers true data from one bus to
the other.
20
1
1
TSSOP20, 4.4x6.5
CASE 948AQ
TSSOP−20 WB
CASE 948E
MARKING DIAGRAM
20
XXXX
XXXX
ALYWG
G
XXXXXXXXXX
XXXXXXXXXX
AWLYYWWG
This device can drive up to 15 LS−TTL Loads, and does not have
Schmitt trigger inputs. All inputs are protected from damage due to
static discharge by diodes to VCC and ground.
1
XXXXX = Specific Device Code
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
Features
A
• Typical Propagation Delay: 13 ns
• Wide Power Supply Range: 2 V to 6 V
• Low Quiescent Current: 160 mA Maximum (74HC)
• 3−STATE Outputs for Connection to Bus Oriented Systems
• High Output Current: 6 mA (Minimum)
• Same as the 645
G, G
= Pb−Free Package
(Note: Microdot may be in either location)
CONNECTION DIAGRAM
• These are Pb−Free Devices
Pin Assignment for SOIC and TSSOP
TRUTH TABLE
Control Inputs
G
L
DIR
L
Operation
B data to A bus
A data to B bus
Isolation
L
H
H
X
NOTE: H = HIGH Level
L = LOW Level
X = Irrelevant
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information on page 5 of
this data sheet.
© Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
November, 2022 − Rev. 2
MM74HC245A/D
MM74HC245A
Logic Diagram
Figure 1. Logic Diagram
ABSOLUTE MAXIMUM RATINGS (Note 1)
Symbol
Parameter
Rating
Unit
V
V
CC
Supply Voltage
−0.5 to +7.0
V
DC Input Voltage DIR and G pins
DC Input/Output Voltage
Clamp Diode Current
−0.5 to V +0.5
V
IN
CC
V
V
−0.5 to V +0.5
V
IN, OUT
CC
I
20
35
mA
mA
mA
°C
CD
I
DC Output Current, per pin
OUT
I
DC V or GND Current, per pin
70
CC
CC
T
STG
Storage Temperature Range
Power Dissipation (Note 2)
S.O. Package only
−65 to +150
600
P
mW
D
500
T
L
Lead Temperature (Soldering 10 seconds)
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Unless otherwise specified all voltages are referenced to ground.
2. Power dissipation temperature derating − plastic “N” package: –12 mW/°C from 65°C to 85°C.
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2
MM74HC245A
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
2
Max
Unit
V
V
CC
Supply Voltage
6
V
IN
, V
DC Input or Output Voltage
Operating Temperature Range
Input Rise/Fall Times
0
V
CC
V
OUT
T
A
−55
−
+125
1000
500
°C
ns
t , t
r
V
CC
V
CC
V
CC
= 2.0 V
= 4.5 V
= 6.0 V
f
−
−
400
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
DC ELECTRICAL CHARACTERISTICS (Note 3)
T
= −40°C
T = −55°C
A
to 125°C
A
to 85°C
T
A
= 25°C
Typ.
−
Guaranteed Limits
Symbol
Parameter
Conditions
V
CC
(V)
Unit
V
IH
Minimum HIGH Level
Input Voltage
2.0
1.50
1.50
3.15
4.20
0.50
1.35
1.80
1.9
1.50
3.15
4.20
0.50
1.35
1.80
1.9
V
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
−
3.15
4.20
0.50
1.35
1.80
1.9
−
V
IL
Maximum LOW Level
Input Voltage
−
V
V
−
−
V
OH
Minimum HIGH Level
Output Voltage
V
= V or V ,
2.0
4.5
6.0
4.20
IN
IH
IL
⎮I
⎪ ≤ 20 mA
OUT
4.4
4.4
4.4
5.9
5.9
5.9
V
IN
= V or V ,
3.98
3.84
3.70
IH
IL
⎮I
⎪ ≤ 6.0 mA
OUT
V
= V or V ,
OUT
6.0
5.70
5.48
5.34
5.20
IN
IH
IL
⎮I
⎪ ≤ 7.8 mA
V
OL
Maximum LOW Level
Output Voltage
V
= V or V
IL
OUT
2.0
4.5
6.0
4.5
0
0
0.1
0.1
0.1
0.1
0.1
0.1
V
IN
IH
⎮I
⎪ ≤ 20 mA
0
0.1
0.1
0.1
V
IN
= V or V
IL
0.20
0.26
0.33
0.40
IH
⎮I
⎪ ≤ 6.0 mA
OUT
V
= V or V
IL
OUT
6.0
6.0
6.0
6.0
0.20
−
0.26
0.1
0.5
8.0
0.33
1.0
5.0
80
0.40
1.0
10
IN
⎮I
IH
⎪ ≤ 7.8 mA
I
Input Leakage Current
(G and DIR)
V
IN
= V or GND
mA
mA
mA
IN
CC
I
Maximum 3−STATE Output
Leakage Current
V
OUT
= V or GND
−
OZ
CC
Enable G = V
IH
I
Maximum Quiescent
Supply Current
V
OUT
= V or GND,
−
160
CC
IN
CC
I
= 0 mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. For a power supply of 5 V 10% the worst case output voltages (V , and V ) occur for HC at 4.5 V. Thus the 4.5 V values should be used
OH
OL
when designing with this supply. Worst case V and V occur at V = 5.5 V and 4.5 V respectively. (The V value at 5.5 V is 3.85 V.) The
IH
IL
CC
IH
worst case leakage current (I , I , and I ) occur for CMOS at the higher voltage and so the 6.0 V values should be used.
IN CC
OZ
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3
MM74HC245A
AC ELECTRICAL CHARACTERISTICS
(V = 5 V, T = 25°C, t = t = 6 ns)
CC
A
r
f
Symbol
Parameter
Conditions
Typ.
12
Guaranteed Limit
Unit
ns
t
, t
Maximum Propagation Delay
Maximum Output Enable Time
Maximum Output Disable Time
C = 45 pF
17
35
25
PHL PLH
L
t
t
, t
R = 1 kW, C = 45 pF
24
ns
PZL PZH
L
L
, t
R = 1 kW, C = 5 pF
18
ns
PLZ PHZ
L
L
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
AC ELECTRICAL CHARACTERISTICS
(V = 2.0 V to 6.0 V, C = 50 pF, t = t = 6 ns, unless otherwise specified)
CC
L
r
f
T
A
= 25°C
T
= −40°C
T = −55°C
A
to 125°C
A
to 85°C
Typ.
Guaranteed Limits
Symbol
Parameter
Conditions
C = 50 pF
C = 150 pF
L
V
(V)
Unit
CC
t
, t
Maximum Propagation
Delay
2.0
31
41
90
96
113
116
135
128
ns
PHL PLH
L
C = 50 pF
C = 150 pF
L
4.5
6.0
13
17
18
22
23
28
27
33
L
C = 50 pF
11
14
15
19
19
23
23
28
L
C = 150 pF
L
t
, t
Maximum Output Enable
Time
ns
R = 1 kW
PZH PZL
L
C = 50 pF
2.0
4.5
6.0
71
81
190
240
240
300
285
360
L
C = 150 pF
L
C = 50 pF
26
31
38
48
48
60
57
72
L
C = 150 pF
L
C = 50 pF
21
25
32
41
41
51
48
61
L
C = 150 pF
L
t
, t
Maximum Output Disable
Time
R = 1 kW
C = 50 pF
L
2.0
4.5
6.0
2.0
4.5
6.0
39
20
18
20
6
135
27
23
60
12
10
−
169
34
29
75
15
13
−
203
41
34
90
18
15
−
ns
ns
pF
PHZ PLZ
L
t
, t
Output Rise and Fall Time C = 50 pF
L
TLH THL
5
C
Power Dissipation
Capacitance (Note 4)
G = V
G = V
50
5
PD
IL
IH
C
Maximum Input
Capacitance
5
10
20
10
20
10
20
pF
pF
IN
C
Maximum Input/Output
Capacitance, A or B
15
IN/OUT
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2
4. C determines the no load dynamic power consumption, P = C
V
f + I
V
, and the no load dynamic current consumption,
PD
D
PD CC
CC CC
I
= C
V
f + I
.
S
PD CC
CC
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4
MM74HC245A
ORDERING INFORMATION
Device
†
Package
Shipping
MM74HC245AWM
SOIC−20 WB
(Pb−Free)
38 Units / Tube
1000 / Tape & Reel
75 Units / Tube
MM74HC245AWMX
MM74HC245AMTC
MM74HC245AMTCX
SOIC−20
(Pb−Free)
TSSOP−20 WB
(Pb−Free)
TSSOP−20
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC−20, 300 mils
CASE 751BJ−01
ISSUE O
DATE 19 DEC 2008
SYMBOL
MIN
NOM
MAX
2.64
0.30
2.55
0.51
0.33
13.00
10.64
7.60
2.36
2.49
A
A1
A2
b
0.10
2.05
0.31
0.41
0.27
c
0.20
E1
E
D
12.60
10.01
7.40
12.80
10.30
7.50
E
E1
e
1.27 BSC
h
0.25
0.40
0º
0.75
1.27
8º
0.81
L
b
e
θ
5º
15º
θ1
PIN#1 IDENTIFICATION
TOP VIEW
D
h
h
q1
q
A2
A
q1
L
c
A1
END VIEW
SIDE VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MS-013.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON34287E
SOIC−20, 300 MILS
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC−20 WB
CASE 751D−05
ISSUE H
DATE 22 APR 2015
SCALE 1:1
D
A
q
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
20
11
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
E
B
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF B
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
1
10
MILLIMETERS
DIM MIN
MAX
2.65
0.25
0.49
0.32
12.95
7.60
20X b
A
A1
b
2.35
0.10
0.35
0.23
12.65
7.40
M
S
S
B
T
0.25
A
c
D
E
e
A
1.27 BSC
H
h
10.05
0.25
0.50
0
10.55
0.75
0.90
7
SEATING
PLANE
L
18X e
q
_
_
A1
c
T
GENERIC
MARKING DIAGRAM*
RECOMMENDED
20
SOLDERING FOOTPRINT*
20X
20X
0.52
1.30
XXXXXXXXXXX
XXXXXXXXXXX
AWLYYWWG
20
11
10
1
XXXXX = Specific Device Code
11.00
A
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
1
WL
YY
WW
G
1.27
PITCH
DIMENSIONS: MILLIMETERS
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42343B
SOIC−20 WB
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSSOP−20 WB
CASE 948E
ISSUE D
DATE 17 FEB 2016
SCALE 2:1
NOTES:
20X K REF
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
K
K1
M
S
S
0.10 (0.004)
T U
V
S
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
0.15 (0.006) T U
J J1
20
11
2X L/2
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
B
SECTION N−N
L
−U−
PIN 1
IDENT
0.25 (0.010)
N
1
10
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
M
S
0.15 (0.006) T U
A
−V−
N
MILLIMETERS
INCHES
MIN
DIM MIN
MAX
6.60
4.50
1.20
0.15
0.75
MAX
0.260
0.177
0.047
0.006
0.030
F
A
B
6.40
4.30
---
0.252
0.169
---
DETAIL E
C
D
0.05
0.50
0.002
0.020
F
G
H
0.65 BSC
0.026 BSC
−W−
0.27
0.09
0.09
0.19
0.19
0.37
0.20
0.16
0.30
0.25
0.011
0.004
0.004
0.007
0.007
0.015
0.008
0.006
0.012
0.010
C
J
J1
K
G
D
H
K1
L
DETAIL E
6.40 BSC
0.252 BSC
0
0.100 (0.004)
−T− SEATING
M
0
8
8
_
_
_
_
PLANE
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT
7.06
XXXX
XXXX
ALYWG
G
1
A
L
= Assembly Location
= Wafer Lot
Y
W
G
= Year
= Work Week
= Pb−Free Package
0.65
PITCH
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
01.36X6
16X
1.26
DIMENSIONS: MILLIMETERS
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASH70169A
TSSOP−20 WB
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSSOP20, 4.4x6.5
CASE 948AQ−01
ISSUE A
DATE 19 MAR 2009
b
SYMBOL
MIN
NOM
MAX
A
A1
A2
b
1.20
0.15
1.05
0.30
0.20
6.60
6.50
4.50
0.05
0.80
0.19
0.09
6.40
6.30
4.30
E1
E
c
D
6.50
6.40
E
E1
e
4.40
0.65 BSC
0.60
L
0.45
0.75
L1
1.00 REF
0º
8º
θ
e
TOP VIEW
D
c
A2
A
θ1
L
A1
L1
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-153.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON34453E
TSSOP20, 4.4X6.5
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
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