MJB6491 [ONSEMI]
15A, 80V, PNP, Si, POWER TRANSISTOR, CASE 418B-04, D2PAK-3;型号: | MJB6491 |
厂家: | ONSEMI |
描述: | 15A, 80V, PNP, Si, POWER TRANSISTOR, CASE 418B-04, D2PAK-3 开关 晶体管 |
文件: | 总6页 (文件大小:63K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MJB6488, MJB6491
Product Preview
Complementary Silicon
Plastic Power Transistors
. . . designed for use in general−purpose amplifier and switching
applications.
http://onsemi.com
• DC Current Gain Specified to 15 A −
h
FE
= 20 − 150 @ I = 5.0 Adc
C
15 A
= 5.0 (Min) @ I = 15 Adc
C
COMPLEMENTARY SILICON
POWER TRANSISTORS
80 V, 75 W
• Collector−Emitter Sustaining Voltage −
= 80 Vdc (Min)
V
CEO(sus)
• Epoxy Meets UL 94 V−0 @ 0.125 in
• ESD Ratings: Human Body Model; 3B, >8000 V,
Machine Model; C, >400 V
MARKING
DIAGRAM
MAXIMUM RATINGS
Rating
Collector−Emitter Voltage
Collector−Base Voltage
Emitter−Base Voltage
Collector Current − Continuous
Base Current
Symbol
Value
80
Unit
Vdc
Vdc
Vdc
Adc
Adc
JB64xx
V
CEO
2
D PAK
AYWW
V
CB
90
CASE 418B
STYLE 1
V
EB
5.0
15
I
C
I
B
5.0
xx
A
Y
= 88 or 91
= Assembly Location
= Year
Total Power Dissipation @ T = 25°C
P
D
75
0.6
W
W/°C
C
Derate above 25°C
WW
= Work Week
Total Power Dissipation @ T = 25°C
P
D
1.8
W
A
Derate above 25°C
0.014
W/°C
Operating and Storage Junction
Temperature Range
T , T
–65 to
+150
°C
J
stg
ORDERING INFORMATION
†
Device
Package
Shipping
THERMAL CHARACTERISTICS
Characteristic
2
MJB6488
D PAK
50 Units / Rail
Symbol
Max
1.67
70
Unit
°C/W
°C/W
2
MJB6488T4
MJB6491
D PAK
800 / Tape & Reel
50 Units / Rail
Thermal Resistance, Junction−to−Case
Thermal Resistance, Junction−to−Ambient
R
q
JC
JA
2
D PAK
R
q
2
MJB6491T4
D PAK
800 / Tape & Reel
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
Semiconductor Components Industries, LLC, 2004
1
Publication Order Number:
July, 2004 − Rev. P0
MJB6488/D
MJB6488, MJB6491
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
C
Characteristic
Symbol
Min
Max
Unit
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage (Note 1)
Collector−Emitter Sustaining Voltage (Note 1)
Collector Cutoff Current
(I = 200 mAdc, I = 0)
V
80
90
−
−
−
Vdc
Vdc
C
B
CEO(sus)
(I = 200 mAdc, V = 1.5 Vdc)
VCEX
C
BE
(V = 40 Vdc, I = 0)
I
CEO
1.0
mAdc
CE
B
Collector Cutoff Current
(V = 85 Vdc, V
= 1.5 Vdc)
C
I
−
−
100
5.0
mAdc
mAdc
CE
EB(off)
CEX
(V = 80 Vdc, V
= 1.5 Vdc, T = 150°C)
CE
EB(off)
Emitter Cutoff Current
ON CHARACTERISTICS
DC Current Gain
(V = 5.0 Vdc, I = 0)
I
−
10
mA
BE
C
EBO
(I = 5.0 Adc, V = 4.0 Vdc)
h
FE
20
5.0
150
−
−
C
C
CE
(I = 15 Adc, V = 4.0 Vdc)
CE
Collector−Emitter Saturation Voltage
Base−Emitter On Voltage
(I = 5.0 Adc, I = 0.5 Adc)
V
CE(sat)
−
−
1.3
3.5
Vdc
Vdc
C
B
(I = 15 Adc, I = 5.0 Adc)
C
B
(I = 5.0 Adc, V = 4.0 Vdc)
V
BE(on)
−
−
1.3
3.5
C
CE
(I = 15 Adc, V = 4.0 Vdc)
C
CE
DYNAMIC CHARACTERISTICS
Current−Gain − Bandwidth Product (Note 2) (I = 1.0 Adc, V = 4.0 Vdc, f
= 1.0 MHz)
f
T
5.0
25
−
−
MHz
−
C
CE
test
Small−Signal Current Gain
(I = 1.0 Adc, V = 4.0 Vdc, f = 1.0 kHz)
h
fe
C
CE
1. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2.0%.
2. f = |h | • f
.
T
fe
test
5000
1000
700
t
s
C
ob
1000
500
300
200
C
C
ib
ob
t
f
NPN
PNP
200
100
50
V
= 30 V
CC
I /I = 10
100
70
NPN
PNP
C B
I = I
B1 B2
T = 25°C
J
T = 25°C
J
50
0.2
0.5
1.0
2.0
5.0
10
20
0.5
1.0
2.0
5.0
10
20
50
I , COLLECTOR CURRENT (A)
C
V , REVERSE VOLTAGE (V)
R
Figure 1. Turn−Off Time
Figure 2. Capacitances
T
A
T
C
4.0 80
3.0 60
2.0 40
T
C
T
A
1.0 20
0
0
0
20
40
60
80
100
120
140 160
T , CASE TEMPERATURE (°C)
C
Figure 3. Power Derating
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2
MJB6488, MJB6491
V
CC
+ 30 V
1000
500
25 ms
R
C
t
r
+ 10 V
0
SCOPE
200
R
B
100
50
− 10 V
t , t v 10 ns
DUTY CYCLE = 1.0%
51
D
1
t @ V
d
[ 5.0 V
NPN
PNP
r
f
BE(off)
− 4 V
R AND R VARIED TO OBTAIN DESIRED CURRENT LEVELS.
T
= 25°C
= 30 V
B
C
FOR PNP, REVERSE ALL POLARITIES.
C
20
10
V
CC
I /I = 10
C B
D MUST BE FAST RECOVERY TYPE, e.g.:
1
0.2
0.5
1.0
2.0
5.0
10
20
1N5825 USED ABOVE I [ 100 mA
B
MSD6100 USED BELOW I [ 100 mA
I , COLLECTOR CURRENT (A)
C
B
Figure 4. Switching Time Test Circuit
Figure 5. Turn−On Time
1.0
0.7
D = 0.5
0.5
0.3
0.2
0.2
0.1
0.1
P
(pk)
Z
(t) = r(t) R
q
JC
q
JC
0.05
0.07
R
= 1.67°C/W MAX
q
JC
0.05
0.02
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
t
1
0.03
READ TIME AT t
1
t
2
0.02
0.01
0.02
T
− T = P
C
Z
q
(pk) JC(t)
J(pk)
SINGLE PULSE
0.05 0.1
DUTY CYCLE, D = t /t
1 2
0.01
0.01
0.2
0.5
1.0
2.0
5.0
10
20
50
100
200
500 1.0 k
t, TIME (ms)
Figure 6. Thermal Response
20
There are two limitations on the power handling ability of
a transistors average junction temperature and second
10
100 ms
500 ms
breakdown. Safe operating area curves indicate I − V
C
CE
5.0
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
1.0 ms
5.0 ms
2.0
1.0
T = 150°C
J
The data of Figure 7 is based on T
= 150°C; T is
J(pk)
C
SECOND BREAKDOWN LIMITED
BONDING WIRE LIMITED
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided T
J(pk)
0.5
THERMALLY LIMITED @ T = 25°C
C
v 150°C. T
may be calculated from the data in
J(pk)
CURVES APPLY BELOW RATED V
CEO
Figure 6. At high case temperatures, thermal limitations will
reduce the power that can be handled to values less than the
limitations imposed by second breakdown
0.2
0.1
dc
80
2.0
4.0
10
20
40 60
V
CE
, COLLECTOR−EMITTER VOLTAGE (V)
Figure 7. Active−Region Safe Operating Area
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3
MJB6488, MJB6491
NPN − MJB6488
PNP − MJB6491
500
500
T = 150°C
J
T = 150°C
J
200
100
50
200
100
25°C
25°C
−ꢀ55°C
−ꢀ55°C
50
20
10
20
10
V
CE
= 2.0 V
V
CE
= 2.0 V
0.5
5.0
5.0
0.2
0.5
1.0
2.0
5.0
10
20
0.2
1.0
2.0
5.0
10
20
I , COLLECTOR CURRENT (A)
C
I , COLLECTOR CURRENT (A)
C
Figure 8. DC Current Gain
2.0
1.8
1.6
1.4
1.2
1.0
2.0
T = 25°C
J
T = 25°C
J
1.8
1.6
1.4
1.2
1.0
I
C
= 1.0 A
4.0 A
8.0 A
I
C
= 1.0 A
0.8
0.6
0.4
0.2
0.8
0.6
0.4
0.2
4.0 A
8.0 A
0
0
5.0 10
20
50 100
200 500 1000
2000 5000
5.0 10
20
50 100
200 500 1000 2000 5000
I , BASE CURRENT (mA)
B
I , BASE CURRENT (mA)
B
Figure 9. Collector Saturation Region
2.8
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0
T = 25°C
J
T = 25°C
2.4
2.0
1.6
1.2
0.8
0.4
0
J
V
@ I /I = 10
C B
V
= I /I = 10
BE(sat) C B
BE(sat)
V
@ V = 2.0 V
CE
V
BE
@ V = 2.0 V
CE
BE
V
@ I /I = 10
C B
V @ I /I = 10
CE(sat) C B
CE(sat)
0.2
0.5
1.0
2.0
5.0
10
20
0.2
0.5
1.0
2.0
5.0
10
20
I , COLLECTOR CURRENT (AMP)
C
I , COLLECTOR CURRENT (AMP)
C
Figure 10. “On” Voltages
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4
MJB6488, MJB6491
PACKAGE DIMENSIONS
D2PAK
CASE 418B−04
ISSUE H
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
C
2. CONTROLLING DIMENSION: INCH.
3. 418B−01 THRU 418B−03 OBSOLETE,
NEW STANDARD 418B−04.
E
V
W
−B−
INCHES
DIM MIN MAX
MILLIMETERS
4
MIN
MAX
A
B
C
D
E
F
G
H
J
0.340 0.380
0.380 0.405
0.160 0.190
0.020 0.035
0.045 0.055
0.310 0.350
0.100 BSC
8.64
9.65 10.29
4.06
0.51
1.14
7.87
9.65
4.83
0.89
1.40
8.89
A
S
1
2
3
2.54 BSC
0.080
0.018 0.025
0.090 0.110
0.110
2.03
0.46
2.29
1.32
7.11
5.00 REF
2.00 REF
0.99 REF
2.79
0.64
2.79
1.83
8.13
−T−
SEATING
PLANE
K
W
K
L
0.052 0.072
0.280 0.320
0.197 REF
0.079 REF
0.039 REF
J
G
M
N
P
R
S
V
H
D 3 PL
M
M
0.13 (0.005)
T
B
0.575 0.625 14.60 15.88
0.045 0.055 1.14 1.40
VARIABLE
CONFIGURATION
ZONE
STYLE 1:
PIN 1. BASE
N
P
R
2. COLLECTOR
3. EMITTER
U
4. COLLECTOR
L
L
L
M
M
M
F
F
F
VIEW W−W
1
VIEW W−W
2
VIEW W−W
3
SOLDERING FOOTPRINT
8.38
0.33
1.016
0.04
10.66
0.42
5.08
0.20
3.05
0.12
17.02
0.67
mm
inches
ǒ
Ǔ
SCALE 3:1
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5
MJB6488, MJB6491
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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MJB6488/D
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