MC74VHCT132ADT [ONSEMI]
Quad 2-Input NAND Schmitt Trigger; 四2输入与非施密特触发器
| 型号： | MC74VHCT132ADT |
| 厂家： | 
ONSEMI |
| 描述： | Quad 2-Input NAND Schmitt Trigger |
| 文件： | 总8页 (文件大小：159K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEMICONDUCTOR TECHNICAL DATA
The MC74VHCT132A is an advanced high speed CMOS Schmitt NAND
trigger fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation.
Pin configuration and function are the same as the MC74VHC00, but the
inputs have hysteresis and, with its Schmitt trigger function, the VHCT132A
can be used as a line receiver which will receive slow input signals.
The VHCT inputs are compatible with TTL levels. This device can be used
as a level converter for interfacing 3.3V to 5.0V, because it has full 5V CMOS
level output swings.
D SUFFIX
14–LEAD SOIC PACKAGE
CASE 751A–03
The VHCT132A input structures provide protection when voltages
between 0V and 5.5V are applied, regardless of the supply voltage. The
DT SUFFIX
14–LEAD TSSOP PACKAGE
CASE 948G–01
output structures also provide protection when V
= 0V. These input and
CC
output structures help prevent device destruction caused by supply voltage
– input/output voltage mismatch, battery backup, hot insertion, etc.
The internal circuit is composed of three stages, including a buffer output
which provides high noise immunity and stable output. The inputs tolerate
voltages up to 7V, allowing the interface of 5V systems to 3V systems.
•
•
•
•
•
•
•
•
•
•
•
High Speed: t
= 4.9ns (Typ) at V
= 5V
M SUFFIX
14–LEAD SOIC EIAJ PACKAGE
CASE 965–01
PD
Low Power Dissipation: I
CC
= 2µA (Max) at T = 25°C
CC
A
TTL–Compatible Inputs: V = 0.8V; V = 2.0V
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2V to 5.5V Operating Range
IL IH
ORDERING INFORMATION
MC74VHCTXXAD
MC74VHCTXXADT TSSOP
MC74VHCTXXAM SOICEIAJ
SOIC
Low Noise: V
= 0.8V (Max)
OLP
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
Chip Complexity: 72 FETs or 18 Equivalent Gates
Pinout: 14–Lead Packages (Top View)
FUNCTION TABLE
Inputs
Output
Y
V
B4
13
A4
12
Y4
11
B3
10
A3
9
Y3
8
CC
A
B
14
L
L
H
H
L
H
L
H
H
H
L
H
1
2
3
4
5
6
7
A1
B1
Y1
A2
B2
Y2
GND
LOGIC DIAGRAM
1
2
4
5
9
A1
A3
B3
A4
B4
3
6
8
Y1
Y3
10
12
13
B1
A2
B2
11
Y2
Y4
4/99
REV 0
Motorola, Inc. 1999
MC74VHCT132A
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
V
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
V
DC Supply Voltage
DC Input Voltage
– 0.5 to + 7.0
– 0.5 to + 7.0
CC
V
V
in
V
DC Output Voltage
Input Diode Current
Output Diode Current
– 0.5 to V
CC
+ 0.5
V
out
I
IK
– 20
mA
mA
mA
mA
mW
cuit. For proper operation, V and
in
I
± 20
± 25
± 50
OK
V
should be constrained to the
out
range GND (V or V
)
V
.
I
DC Output Current, per Pin
DC Supply Current, V and GND Pins
in out
CC
out
CC
Unused inputs must always be
tied to an appropriate logic voltage
I
CC
level (e.g., either GND or V
).
P
D
Power Dissipation in Still Air,
SOIC Packages†
TSSOP Package†
500
450
CC
Unused outputs must be left open.
T
stg
Storage Temperature
– 65 to + 150
C
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied.
†Derating — SOIC Packages: – 7 mW/ C from 65 to 125 C
TSSOP Package: – 6.1 mW/ C from 65 to 125 C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
4.5
0
Max
5.5
Unit
V
V
CC
DC Supply Voltage
DC Input Voltage
DC Output Voltage
V
in
5.5
V
V
out
0
V
CC
V
T
A
Operating Temperature, All Package Types
– 40
+ 85
C
DC ELECTRICAL CHARACTERISTICS
T
A
= 25°C
T
≤ 85°C
T ≤ 125°C
A
A
V
CC
V
Symbol
Parameter
Test Conditions
Unit
Min
Typ
Max
Min
Max
Min
Max
V
T+
Positive Threshold Voltage
3.0
4.5
5.5
1.7
2.0
2.0
1.6
2.0
2.0
1.6
2.0
2.0
V
V
Negative Threshold Voltage
Hysteresis Voltage
3.0
4.5
6.0
0.35
0.5
0.6
0.35
0.5
0.6
0.35
0.5
0.6
V
V
V
T–
V
3.0
4.5
5.5
0.30
0.40
0.50
1.20
1.40
1.60
0.30
0.40
0.50
1.20
1.40
1.60
0.30
0.40
0.50
1.20
1.40
1.60
H
V
OH
Minimum High–Level
Output Voltage
V
= V or V
IH
2.0
3.0
4.5
1.9
2.9
4.4
2.0
3.0
4.5
1.9
2.9
4.4
1.9
2.9
4.4
IN
IL
IL
I
= – 50µA
OH
I
= –50µA
OH
I
I
= – 4mA
= – 8mA
4.5
5.5
2.58
3.94
2.48
3.80
2.34
3.66
OH
OH
V
OL
Maximum Low–Level
Output Voltage
V
= V or V
IH
= 50µA
2.0
3.0
4.5
0.0
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
IN
I
OL
I
I
= 4mA
= 8mA
4.5
5.5
0.36
0.36
0.44
0.44
0.52
0.52
OL
OL
I
Maximum Input Leakage
Current
V
= 5.5V or GND
0 to 5.5
± 0.1
± 1.0
± 1.0
µA
µA
IN
IN
I
Maximum Quiescent Supply
Current
V
IN
= V
or GND
CC
5.5
2.0
20
40
CC
I
Quiescent Supply Current
Output Leakage Current
Input: V = 3.4V
IN
5.5
0.0
1.35
0.5
1.50
5.0
1.65
10
mA
CCT
I
V
OUT
= 5.5V
µA
OPD
MOTOROLA
2
MC74VHCT132A
AC ELECTRICAL CHARACTERISTICS (Input t = t = 3.0ns)
r
f
T
A
= – 40 to
85°C
T
A
= 25°C
T
A
≤ 125°C
Symbol
Parameter
Test Conditions
Unit
Min
Typ
Max
Min
Max
Min
Max
t
t
,
Maximum Propagation
Delay, A or B to Y
V
V
= 3.3 ± 0.3 V
C
C
= 15pF
= 50pF
7.6
10.1
11.9
15.4
1.0
1.0
14.0
17.5
16.5
20.0
ns
PLH
CC
L
L
PHL
= 5.0 ± 0.5 V
C
L
C
L
= 15pF
= 50pF
4.9
6.4
7.7
9.7
1.0
1.0
9.0
11.0
11.0
13.0
CC
C
Maximum Input
Capacitance
4
10
10
10
pF
in
Typical @ 25°C, V
= 5.0 V
CC
C
Power Dissipation Capacitance (Note 1.)
pF
16
PD
1. C
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
=C +I /4(pergate).C isusedtodeterminetheno–load
PD
Averageoperatingcurrentcanbeobtainedbytheequation:I
dynamic power consumption; P = C
V
f
CC(OPR)
PD CC in CC
PD
2
V
f
+ I
in CC
V
CC
.
D
PD
CC
NOISE CHARACTERISTICS (Input t = t = 3.0ns, C = 50pF, V
= 5.0 V)
r
f
L
CC
T
A
= 25°C
Symbol
Characteristic
Unit
V
Typ
Max
V
OLP
Quiet Output Maximum Dynamic V
0.3
0.8
– 0.8
3.5
OL
V
OLV
Quiet Output Minimum Dynamic V
– 0.3
V
OL
V
IHD
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
V
V
ILD
1.5
V
3
MOTOROLA
MC74VHCT132A
3.0V
GND
TEST POINT
OUTPUT
1.5V
A
Y
t
t
DEVICE
UNDER
TEST
PLH
PHL
V
V
C *
L
OH
1.5V
OL
* Includes all probe and jig capacitance
Figure 1. Switching Waveforms
Figure 2. Test Circuit
(a) A Schmitt–Trigger Squares Up Inputs With Slow Rise and Fall Times
(b) A Schmitt–Trigger Offers Maximum Noise Immunity
V
V
CC
CC
V
V
H
H
V
V
V
V
T+
T–
T+
T–
V
V
in
in
GND
GND
V
V
OH
OH
OL
V
V
out
out
V
V
OL
Figure 3. Typical Schmitt–Trigger Applications
MOTOROLA
4
MC74VHCT132A
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751A–03
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
–A–
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
14
1
8
7
P 7 PL
–B–
M
M
0.25 (0.010)
B
MILLIMETERS
INCHES
G
F
R X 45°
DIM
A
B
C
D
F
G
J
MIN
8.55
3.80
1.35
0.35
0.40
MAX
8.75
4.00
1.75
0.49
1.25
MIN
MAX
0.344
0.157
0.068
0.019
0.049
C
0.337
0.150
0.054
0.014
0.016
J
M
SEATING
PLANE
K
D 14 PL
1.27 BSC
0.050 BSC
0.19
0.10
0.25
0.25
0.008
0.004
0.009
0.009
M
S
S
0.25 (0.010)
T
B
A
K
M
P
R
0
5.80
0.25
°
7
6.20
0.50
°
0
°
7°
0.244
0.019
0.228
0.010
5
MOTOROLA
MC74VHCT132A
OUTLINE DIMENSIONS
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948G–01
ISSUE O
NOTES:
14X K REF
0.10 (0.004)
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
M
S
S
T
U
V
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
S
0.15 (0.006) T
U
N
0.25 (0.010)
14
8
7
2X L/2
M
B
L
N
–U–
PIN 1
IDENT.
F
1
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
DETAIL E
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE –W–.
S
K
0.15 (0.006) T
U
A
MILLIMETERS
INCHES
K1
DIM
A
B
C
D
F
G
H
J
J1
K
MIN
4.90
4.30
–––
0.05
0.50
MAX
5.10
4.50
1.20
0.15
0.75
MIN
MAX
0.200
0.177
0.047
0.006
0.030
–V–
0.193
0.169
–––
0.002
0.020
J J1
SECTION N–N
0.65 BSC
0.026 BSC
0.50
0.09
0.09
0.19
0.19
0.60
0.20
0.16
0.30
0.25
0.020
0.004
0.004
0.007
0.007
0.024
0.008
0.006
0.012
0.010
–W–
C
K1
L
6.40 BSC
0.252 BSC
0.10 (0.004)
M
0
8
0
8
SEATING
PLANE
–T–
H
G
DETAIL E
D
MOTOROLA
6
MC74VHCT132A
OUTLINE DIMENSIONS
M SUFFIX
PLASTIC SOIC EIAJ PACKAGE
CASE 965–01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
L
E
14
8
Q
1
H
E
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
E
M
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
L
7
1
DETAIL P
Z
D
VIEW P
MILLIMETERS
INCHES
A
e
DIM
A
1
b
c
D
E
e
MIN
–––
MAX
2.05
0.20
0.50
0.27
10.50
5.45
MIN
MAX
0.081
0.008
0.020
0.011
0.413
0.215
c
–––
0.002
0.014
0.007
0.390
0.201
A
0.05
0.35
0.18
9.90
5.10
b
A
1
M
1.27 BSC
0.050 BSC
0.13 (0.005)
0.10 (0.004)
H
7.40
0.50
1.10
0
8.20
0.85
1.50
10
0.291
0.020
0.043
0
0.323
0.033
0.059
10
E
0.50
L
M
E
Q
Z
0.70
–––
0.90
1.42
0.028
–––
0.035
0.056
1
7
MOTOROLA
MC74VHCT132A
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,including“Typicals”
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arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
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MC74VHCT132A/D
◊
相关型号：
MC74VHCT138AD
AHCT/VHCT SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16, PLASTIC, SOIC-16
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