MC74LCX373TDW [ONSEMI]
暂无描述;型号: | MC74LCX373TDW |
厂家: | ONSEMI |
描述: | 暂无描述 锁存器 |
文件: | 总8页 (文件大小:162K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SEMICONDUCTOR TECHNICAL DATA
The MC74LCX373 is a high performance, non–inverting octal
transparent latch operating from a 2.7 to 3.6V supply. High impedance
TTL compatible inputs significantly reduce current loading to input drivers
while TTL compatible outputs offer improved switching noise
LOW–VOLTAGE
CMOS OCTAL
TRANSPARENT LATCH
performance. A V specification of 5.5V allows MC74LCX373 inputs to be
I
safely driven from 5V devices.
The MC74LCX373 contains 8 D–type latches with 3–state outputs.
When the Latch Enable (LE) input is HIGH, data on the Dn inputs enters
the latches. In this condition, the latches are transparent, i.e., a latch
output will change state each time its D input changes. When LE is LOW,
the latches store the information that was present on the D inputs a setup
time preceding the HIGH–to–LOW transition of LE. The 3–state standard
outputs are controlled by the Output Enable (OE) input. When OE is
LOW, the standard outputs are enabled. When OE is HIGH, the standard
outputs are in the high impedance state, but this does not interfere with
new data entering into the latches.
DW SUFFIX
PLASTIC SOIC
CASE 751D–04
20
1
M SUFFIX
PLASTIC SOIC EIAJ
• Designed for 2.7 to 3.6V V
CC
• 5V Tolerant — Interface Capability With 5V TTL Logic
• Supports Live Insertion and Withdrawal
Operation
20
CASE 967–01
1
• I
OFF
Specification Guarantees High Impedance When V
= 0V
CC
• LVTTL Compatible
SD SUFFIX
PLASTIC SSOP
CASE 940C–03
20
• LVCMOS Compatible
1
• 24mA Balanced Output Sink and Source Capability
• Near Zero Static Supply Current in All Three Logic States (10µA)
Substantially Reduces System Power Requirements
DT SUFFIX
PLASTIC TSSOP
CASE 948E–02
• Latchup Performance Exceeds 500mA
20
• ESD Performance: Human Body Model >2000V; Machine Model >200V
1
Pinout: 20–Lead (Top View)
PIN NAMES
V
O7
19
D7
18
D6
17
O6
16
O5
15
D5
14
D4
13
O4
12
LE
11
Pins
Function
CC
20
OE
Output Enable Input
LE
D0–D7
O0–O7
Latch Enable Input
Data Inputs
3–State Latch Outputs
1
2
3
4
5
6
7
9
8
10
OE
O0
D0
D1
O1
O2
D2
D3
O3
GND
11/96
Motorola, Inc. 1996
REV 4
MC74LCX373
LOGIC DIAGRAM
1
OE
LE
11
2
nLE
Q
O0
O1
O2
O3
O4
O5
O6
O7
3
4
D0
D1
D2
D3
D4
D5
D6
D7
D
5
nLE
Q
D
6
nLE
Q
D
7
9
nLE
Q
D
8
12
15
16
19
nLE
Q
D
13
14
17
18
nLE
Q
D
nLE
Q
D
nLE
Q
D
INPUTS
LE
OUTPUTS
On
OE
Dn
OPERATING MODE
L
L
H
H
H
L
H
L
Transparent (Latch Disabled); Read Latch
L
L
L
L
h
l
H
L
Latched (Latch Enabled) Read Latch
L
L
L
X
X
NC
Z
Hold; Read Latch
H
Hold; Disabled Outputs
H
H
H
H
H
L
Z
Z
Transparent (Latch Disabled); Disabled Outputs
Latched (Latch Enabled); Disabled Outputs
H
H
L
L
h
l
Z
Z
H = High Voltage Level; h = High Voltage Level One Setup Time Prior to the Latch Enable High–to–Low Transition;
L = Low Voltage Level; l = Low Voltage Level One Setup Time Prior to the Latch Enable High–to–Low Transition;
NC = No Change, State Prior to the Latch Enable High–to–Low Transition; X = High or Low Voltage Level or Transitions
are Acceptable; Z = High Impedance State; For I
Reasons DO NOT FLOAT Inputs
CC
MOTOROLA
2
MC74LCX373
ABSOLUTE MAXIMUM RATINGS*
Symbol
CC
Parameter
Value
Condition
Unit
V
V
V
V
DC Supply Voltage
DC Input Voltage
DC Output Voltage
–0.5 to +7.0
–0.5 ≤ V ≤ +7.0
V
I
I
–0.5 ≤ V ≤ +7.0
Output in 3–State
Note 1.
V
O
O
–0.5 ≤ V ≤ V
+ 0.5
CC
V
O
I
I
DC Input Diode Current
DC Output Diode Current
–50
–50
V < GND
mA
mA
mA
mA
mA
mA
°C
IK
I
V
O
< GND
OK
+50
V > V
O CC
I
I
I
DC Output Source/Sink Current
DC Supply Current Per Supply Pin
DC Ground Current Per Ground Pin
Storage Temperature Range
±50
O
±100
±100
CC
GND
T
–65 to +150
STG
*
Absolutemaximumcontinuousratingsarethosevaluesbeyondwhichdamagetothedevicemayoccur. Exposuretotheseconditionsorconditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied.
1. Output in HIGH or LOW State. I absolute maximum rating must be observed.
O
RECOMMENDED OPERATING CONDITIONS
Symbol
CC
Parameter
Min
Typ
Max
Unit
V
Supply Voltage
Operating
Data Retention Only
2.0
1.5
3.3
3.3
3.6
3.6
V
V
V
Input Voltage
0
5.5
V
V
I
Output Voltage
(HIGH or LOW State)
(3–State)
0
0
V
CC
O
5.5
–24
24
I
I
I
I
HIGH Level Output Current, V
= 3.0V – 3.6V
mA
mA
mA
mA
°C
OH
OL
OH
OL
CC
LOW Level Output Current, V
= 3.0V – 3.6V
= 2.7V – 3.0V
= 2.7V – 3.0V
CC
HIGH Level Output Current, V
–12
12
CC
LOW Level Output Current, V
CC
T
A
Operating Free–Air Temperature
Input Transition Rise or Fall Rate, V from 0.8V to 2.0V,
–40
0
+85
10
∆t/∆V
ns/V
IN
V
= 3.0V
CC
DC ELECTRICAL CHARACTERISTICS
T
A
= –40°C to +85°C
Symbol
Characteristic
HIGH Level Input Voltage (Note 2.)
LOW Level Input Voltage (Note 2.)
HIGH Level Output Voltage
Condition
Min
2.0
Max
Unit
V
V
V
V
2.7V ≤ V
≤ 3.6V
IH
CC
CC
2.7V ≤ V
2.7V ≤ V
≤ 3.6V
= –100µA
0.8
V
IL
≤ 3.6V; I
V
– 0.2
V
OH
CC
OH
CC
V
CC
V
CC
V
CC
= 2.7V; I
= 3.0V; I
= 3.0V; I
= –12mA
= –18mA
= –24mA
2.2
OH
OH
OH
2.4
2.2
V
OL
LOW Level Output Voltage
2.7V ≤ V
≤ 3.6V; I
= 100µA
0.2
0.4
V
CC
OL
OL
V
= 2.7V; I = 12mA
CC
CC
CC
V
V
= 3.0V; I
= 3.0V; I
= 16mA
= 24mA
0.4
OL
OL
0.55
2. These values of V are used to test DC electrical characteristics only.
I
3
MOTOROLA
MC74LCX373
DC ELECTRICAL CHARACTERISTICS (continued)
T
A
= –40°C to +85°C
Symbol
Characteristic
Input Leakage Current
Condition
≤ 3.6V; 0V ≤ V ≤ 5.5V
Min
Max
±5.0
±5.0
Unit
µA
I
I
2.7V ≤ V
I
CC
I
3–State Output Current
2.7 ≤ V
≤ 3.6V; 0V ≤ V ≤ 5.5V;
µA
OZ
CC
V = V or V
IL
O
I
IH
I
I
Power–Off Leakage Current
Quiescent Supply Current
V
= 0V; V or V = 5.5V
10
10
µA
µA
µA
µA
OFF
CC
I
O
2.7 ≤ V
≤ 3.6V; V = GND or V
CC
CC
I
CC
2.7 ≤ V
≤ 3.6V; 3.6 ≤ V or V ≤ 5.5V
±10
500
CC
I
O
∆I
CC
Increase in I
CC
per Input
2.7 ≤ V
≤ 3.6V; V = V
IH
– 0.6V
CC
CC
AC CHARACTERISTICS (t = t = 2.5ns; C = 50pF; R = 500Ω)
R
F
L
L
Limits
= –40°C to +85°C
T
A
V
= 3.0V to 3.6V
Max
V
= 2.7V
CC
CC
Symbol
Parameter
Propagation Delay
to O
Waveform
Min
Min
Max
Unit
t
t
1
1.5
1.5
8.0
8.0
1.5
1.5
9.0
9.0
ns
PLH
PHL
D
n
n
t
t
Propagation Delay
LE to O
3
2
2
1.5
1.5
8.5
8.5
1.5
1.5
9.5
9.5
ns
ns
ns
PLH
PHL
n
t
t
Output Enable Time to HIGH and
LOW Level
1.5
1.5
8.5
8.5
1.5
1.5
9.5
9.5
PZH
PZL
t
t
Output Disable Time from HIGH and
LOW Level
1.5
1.5
7.5
7.5
1.5
1.5
8.5
8.5
PHZ
PLZ
t
t
t
Setup TIme, HIGH or LOW D to LE
3
3
3
2.5
1.5
3.3
2.5
1.5
3.3
ns
ns
ns
ns
s
n
Hold TIme, HIGH or LOW D to LE
n
h
w
LE Pulse Width, HIGH
t
t
Output–to–Output Skew
(Note 3.)
1.0
1.0
OSHL
OSLH
3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (t
guaranteed by design.
) or LOW–to–HIGH (t
OSHL
); parameter
OSLH
DYNAMIC SWITCHING CHARACTERISTICS
T
A
= +25°C
Symbol
Characteristic
Condition
Min
Typ
0.8
0.8
Max
Unit
V
V
V
Dynamic LOW Peak Voltage (Note 4.)
Dynamic LOW Valley Voltage (Note 4.)
V
V
= 3.3V, C = 50pF, V = 3.3V, V = 0V
L IH IL
OLP
CC
= 3.3V, C = 50pF, V = 3.3V, V = 0V
IH IL
V
OLV
CC
L
4. Number of outputs defined as “n”. Measured with “n–1” outputs switching from HIGH–to–LOW or LOW–to–HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Input Capacitance
Condition
= 3.3V, V = 0V or V
Typical
Unit
pF
C
C
C
V
V
7
8
IN
CC
I
CC
CC
Output Capacitance
= 3.3V, V = 0V or V
pF
OUT
PD
CC
I
Power Dissipation Capacitance
10MHz, V
= 3.3V, V = 0V or V
CC
25
pF
CC
I
MOTOROLA
4
MC74LCX373
2.7V
0V
1.5V
1.5V
Dn
On
t
t
PHL
PLH
V
OH
OL
1.5V
1.5V
V
WAVEFORM 1 – PROPAGATION DELAYS
= t = 2.5ns, 10% to 90%; f = 1MHz; t = 500ns
t
R
F
W
2.7V
0V
2.7V
1.5V
0V
Dn
LE
1.5V
1.5V
OE
On
t
t
h
s
t
t
PHZ
PZH
2.7V
0V
V
V
CC
OH
– 0.3V
t
1.5V
1.5V
w
1.5V
1.5V
≈
0V
t
, t
PLH PHL
t
t
PLZ
PZL
V
OH
OL
≈
3.0V
On
1.5V
On
V
V
GND
+ 0.3V
OL
WAVEFORM 3 – LE to On PROPAGATION DELAYS, LE MINIMUM
PULSE WIDTH, Dn to LE SETUP AND HOLD TIMES
WAVEFORM 2 – OUTPUT ENABLE AND DISABLE TIMES
= t = 2.5ns, 10% to 90%; f = 1MHz; t = 500ns
t
= t = 2.5ns, 10% to 90%; f = 1MHz; t = 500ns except when noted
t
R
F W
R
F
W
Figure 1. AC Waveforms
V
CC
6V
OPEN
GND
R
1
PULSE
GENERATOR
DUT
R
C
R
L
T
L
TEST
SWITCH
Open
6V
t , t
PLH PHL
t , t
PZL PLZ
Open Collector/Drain t
PLH
and t
PHL
6V
t
, t
GND
PZH PHZ
C
R
R
= 50pF or equivalent (Includes jig and probe capacitance)
L
L
T
= R = 500Ω or equivalent
1
OUT
= Z
of pulse generator (typically 50Ω)
Figure 2. Test Circuit
5
MOTOROLA
MC74LCX373
OUTLINE DIMENSIONS
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D–04
ISSUE E
–A
–
NOTES:
1. DIMENSIONING AND TOLERANCING PER
20
11
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.150
(0.006) PER SIDE.
–B
–
P 10 PL
M
M
0.010 (0.25)
B
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF D DIMENSION
AT MAXIMUM MATERIAL CONDITION.
1
10
D 20 PL
J
M
S
S
MILLIMETERS
INCHES
0.010 (0.25)
T
A
B
DIM
A
B
C
D
MIN
12.65
7.40
2.35
0.35
0.50
MAX
12.95
7.60
2.65
0.49
0.90
MIN
MAX
0.510
0.299
0.104
0.019
0.035
0.499
0.292
0.093
0.014
0.020
F
F
R X 45°
G
J
K
1.27 BSC
0.050 BSC
0.25
0.10
0.32
0.25
0.010
0.004
0.012
0.009
C
M
P
R
0
°
7
°
0
°
7°
0.415
0.029
10.05
0.25
10.55
0.75
0.395
0.010
–T
M
–
SEATING
PLANE
K
G 18 PL
M SUFFIX
PLASTIC SOIC EIAJ PACKAGE
CASE 967–01
ISSUE O
NOTES:
1
DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2
3
CONTROLLING DIMENSION: MILLIMETER.
DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
L
E
20
11
Q
1
4
5
TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
E H
E
M
THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
L
10
1
DETAIL P
Z
D
VIEW P
MILLIMETERS
INCHES
e
A
DIM
A
MIN
---
MAX
2.05
0.20
0.50
0.27
12.80
5.45
MIN
---
MAX
0.081
0.008
0.020
0.011
0.504
0.215
c
A
0.05
0.35
0.18
12.35
5.10
0.002
0.014
0.007
0.486
0.201
1
b
c
D
E
e
A
b
1
1.27 BSC
0.050 BSC
M
0.10 (0.004)
0.13 (0.005)
H
7.40
0.50
1.10
0
8.20
0.85
1.50
10
0.291
0.020
0.043
0
0.323
0.033
0.059
10
E
L
L
M
E
Q
Z
0.70
---
0.90
0.81
0.028
---
0.035
0.032
1
MOTOROLA
6
MC74LCX373
OUTLINE DIMENSIONS
SD SUFFIX
PLASTIC SSOP PACKAGE
CASE 940C–03
NOTES:
13 DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
14 CONTROLLING DIMENSION: MILLIMETER.
15 DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
16 DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
ISSUE B
20X K REF
0.12 (0.005)
M
S
S
T
U
V
0.25 (0.010)
N
20
11
10
L/2
17 DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION/INTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN
EXCESS OF K DIMENSION AT MAXIMUM
MATERIAL CONDITION. DAMBAR INTRUSION
SHALL NOT REDUCE DIMENSION K BY MORE
THAN 0.07 (0.002) AT LEAST MATERIAL
CONDITION.
18 TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
19 DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE –W–.
M
N
B
L
F
PIN 1
IDENT
1
DETAIL E
K
–U–
A
–V–
J
J1
MILLIMETERS
INCHES
DIM
A
B
C
D
MIN
7.07
5.20
1.73
0.05
0.63
MAX
7.33
5.38
1.99
0.21
0.95
MIN
MAX
0.288
0.212
0.078
0.008
0.037
0.278
0.205
0.068
0.002
0.024
M
S
0.20 (0.008)
T U
K1
SECTION N–N
F
G
H
J
J1
K
K1
L
0.65 BSC
0.026 BSC
0.59
0.09
0.09
0.25
0.25
7.65
0
0.75
0.20
0.16
0.38
0.33
7.90
8
0.023
0.003
0.003
0.010
0.010
0.301
0
0.030
0.008
0.006
0.015
0.013
0.311
8
–W–
C
0.076 (0.003)
SEATING
PLANE
–T–
D
G
DETAIL E
M
H
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948E–02
ISSUE A
20X K REF
0.10 (0.004)
NOTES:
6
DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
M
S
S
T
U
V
S
0.15 (0.006)
T U
7
8
CONTROLLING DIMENSION: MILLIMETER.
DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
K
K1
20
11
2X L/2
9
DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
J J1
B
L
–U–
PIN 1
IDENT
10 DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
11 TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
SECTION N–N
1
10
0.25 (0.010)
N
S
12 DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE –W–.
0.15 (0.006)
T U
M
A
MILLIMETERS
INCHES
DIM
A
B
C
D
MIN
6.40
4.30
–––
0.05
0.50
MAX
6.60
4.50
1.20
0.15
0.75
MIN
MAX
0.260
0.177
0.047
0.006
0.030
–V–
0.252
0.169
–––
0.002
0.020
N
F
F
G
H
J
J1
K
K1
L
0.65 BSC
0.026 BSC
DETAIL E
0.27
0.09
0.09
0.19
0.19
0.37
0.20
0.16
0.30
0.25
0.011
0.004
0.004
0.007
0.007
0.015
0.008
0.006
0.012
0.010
–W–
C
6.40 BSC
0.252 BSC
G
D
M
0
8
0
8
H
DETAIL E
0.100 (0.004)
–T– SEATING
PLANE
7
MOTOROLA
MC74LCX373
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,including“Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
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MC74LCX373/D
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