MC34060AP [ONSEMI]
Fixed Frequency, PWM, Voltage Mode Single Ended Controllers; 固定频率,脉宽调制,电压模式单端控制器型号: | MC34060AP |
厂家: | ONSEMI |
描述: | Fixed Frequency, PWM, Voltage Mode Single Ended Controllers |
文件: | 总16页 (文件大小:134K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MC34060A, MC33060A
Fixed Frequency, PWM,
Voltage Mode Single Ended
Controllers
The MC34060A is a low cost fixed frequency, pulse width
modulation control circuit designed primarily for single–ended
SWITCHMODEt power supply control.
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MARKING
DIAGRAMS
The MC34060A is specified over the commercial operating
temperature range of 0° to +70°C, and the MC33060A is specified
over an automotive temperature range of –40° to +85°C.
14
• Complete Pulse Width Modulation Control Circuitry
• On–Chip Oscillator with Master or Slave Operation
• On–Chip Error Amplifiers
• On–Chip 5.0 V Reference, 1.5% Accuracy
• Adjustable Dead–Time Control
SO–14
D SUFFIX
CASE 751A
MC3x060AD
AWLYWW
14
1
1
14
PDIP–14
P SUFFIX
CASE 646
• Uncommitted Output Transistor Rated to 200 mA Source or Sink
• Undervoltage Lockout
MC3x060AP
AWLYYWW
14
1
1
x
= 3 or 4
A
= Assembly Location
WL = Wafer Lot
YY, Y = Year
WW = Work Week
PIN CONNECTIONS
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
Noninv
Input
Noninv
Input
+
Error
Amp
+
-
1
2
3
4
5
6
7
14
13
12
11
10
9
Error
Amp
1
2
Inv
Input
Inv
Input
-
V
CC
Compen/PWM
Comp Input
5.0 V
ref
V
ref
0.1V
Dead-Time
Control
N.C.
C
T
V
CC
Oscillator
R
T
C
E
Q1
Ground
8
(Top View)
Semiconductor Components Industries, LLC, 2002
1
Publication Order Number:
January, 2002 – Rev. 3
MC34060A/D
MC34060A, MC33060A
MAXIMUM RATINGS (Full operating ambient temperature range applies, unless otherwise noted.)
Rating
Symbol
Value
42
Unit
V
Power Supply Voltage
V
CC
Collector Output Voltage
V
C
42
V
Collector Output Current (Note 1)
Amplifier Input Voltage Range
I
500
mA
V
C
V
P
–0.3 to +42
1000
in
D
Power Dissipation @ T ≤ 45°C
mW
°C
°C
°C
A
Operating Junction Temperature
Storage Temperature Range
T
125
J
T
stg
–55 to +125
Operating Ambient Temperature Range
For MC34060A
T
A
0 to +70
For MC33060A
–40 to +85
THERMAL CHARACTERISTICS
P Suffix
D Suffix
Package Package
Characteristics
Thermal Resistance, Junction–to–Ambient
Symbol
Unit
°C/W
°C
R
80
45
120
45
θ
JA
Derating Ambient Temperature
T
A
RECOMMENDED OPERATING CONDITIONS
Condition/Value
Symbol
Min
7.0
–
Typ
Max
Unit
V
Power Supply Voltage
V
CC
15
30
–
40
40
Collector Output Voltage
V
C
V
Collector Output Current
I
C
–
200
mA
V
Amplifier Input Voltage
V
in
–0.3
–
–
V
CC
–2
Current Into Feedback Terminal
Reference Output Current
Timing Resistor
I
fb
–
0.3
mA
mA
kΩ
µF
kHz
V
I
ref
–
–
10
500
10
R
T
C
T
1.8
0.00047
1.0
–0.3
47
0.001
25
–
Timing Capacitor
Oscillator Frequency
f
200
5.3
osc
PWM Input Voltage (Pins 3 and 4)
1. Maximum thermal limits must be observed.
–
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2
MC34060A, MC33060A
ELECTRICAL CHARACTERISTICS (V = 15 V, C = 0.01 µF, R = 12 kΩ, unless otherwise noted. For typical values T = 25°C,
CC
T
T
A
for min/max values T is the operating ambient temperature range that applies, unless otherwise noted.)
A
Characteristics
Symbol
Min
Typ
Max
Unit
REFERENCE SECTION
Reference Voltage (I = 1.0 mA, T 25°C)
V
ref
4.925
4.9
4.85
5.0
–
–
5.075
5.1
5.1
V
O
A
T
= T
= T
to T
to T
– MC34060A
A
low
low
high
high
T
A
– MC33060A
Line Regulation (V = 7.0 V to 40 V, I = 10 mA)
Reg
–
–
2.0
2.0
35
25
15
75
mV
mV
mA
CC
O
line
Load Regulation (I = 1.0 mA to 10 mA)
Reg
load
O
Short Circuit Output Current (V = 0 V)
I
15
ref
SC
OUTPUT SECTION
Collector Off–State Current (V = 40 V, V = 40 V)
I
I
–
–
–
2.0
–
100
–100
1.5
µA
µA
V
CC
CE
C(off)
Emitter Off–State Current (V = 40 V, V = 40 V, V = 0 V)
)
CC
CE
E
E(off
Collector–Emitter Saturation Voltage (Note 2)
Common–Emitter
V
1.1
sat(C)
(V = 0 V, I = 200 mA)
E
C
Emitter–Follower
(V = 15 V, I = –200 mA)
V
sat(E)
–
1.5
2.5
C
E
Output Voltage Rise Time (T = 25°C)
Common–Emitter (See Figure 12)
Emitter–Follower (See Figure 13)
t
ns
ns
A
r
r
–
–
100
100
200
200
Output Voltage Fall Time (T = 25°C)
t
A
Common–Emitter (See Figure 12)
Emitter–Follower (See Figure 13)
–
–
40
40
100
100
ERROR AMPLIFIER SECTION
Input Offset Voltage (V
Input Offset Current (V
= 2.5 V)
= 2.5 V)
V
–
–
2.0
5.0
–0.1
–
10
250
–2.0
–
mV
nA
µA
V
O[Pin 3]
IO
I
IO
C[Pin 3]
Input Bias Current (V
= 2.5 V)
I
IB
–
O[Pin 3]
Input Common Mode Voltage Range
V
ICR
0 to
(V = 40 V)
CC
V
CC
–2.0
Inverting Input Voltage Range
V
–0.3 to
–2.0
–
–
–
–
–
–
–
V
IR(INV)
V
CC
Open–Loop Voltage Gain
A
70
95
dB
VOL
(∆V = 3.0 V, V = 0.5 V to 3.5 V, R = 2.0 kΩ)
O
O
L
Unity–Gain Crossover Frequency
(V = 0.5 V to 3.5 V, R = 2.0 kΩ)
f
c
–
–
600
65
kHz
deg.
dB
O
L
Phase Margin at Unity–Gain
(V = 0.5 V to 3.5 V, R = 2.0 kΩ)
φ
m
O
L
Common Mode Rejection Ratio
(V = 40 V, V = 0 V to 38 V))
CMRR
PSRR
65
–
90
CC
in
Power Supply Rejection Ratio
100
dB
(∆V = 33 V, V = 2.5 V, R = 2.0 kΩ)
CC
O
L
Output Sink Current (V
= 0.7 V)
I –
0.3
0.7
–
–
mA
mA
O[Pin 3]
O
Output Source Current (V
= 3.5 V)
I +
O
–2.0
–4.0
O[Pin 3]
2. Low duty cycle techniques are used during test to maintain junction temperature as close to ambient temperatures as possible.
T
low
= –40°C for MC33060A
= 0°C for MC34060A
T
high
= +85°C for MC33060A
= +70°C for MC34060A
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3
MC34060A, MC33060A
ELECTRICAL CHARACTERISTICS (continued) (V = 15 V, C = 0.01 µF, R = 12 kΩ, unless otherwise noted.
CC
T
T
For typical values T = 25°C, for min/max values T is the operating ambient temperature range that applies, unless otherwise noted.)
A
A
Characteristics
Symbol
Min
Typ
Max
Unit
PWM COMPARATOR SECTION (Test circuit Figure 11)
Input Threshold Voltage
(Zero Duty Cycle)
V
–
3.5
0.7
4.5
–
V
TH
Input Sink Current
I
0.3
mA
I
(V
[Pin 3]
= 0.7 V)
DEAD–TIME CONTROL SECTION (Test circuit Figure 11)
Input Bias Current (Pin 4)
I
–
–1.0
–10
µA
IB(DT)
(V = 0 V to 5.25 V)
in
Maximum Output Duty Cycle
DC
%
max
(V = 0 V, C = 0.01 µF, R = 12 kΩ)
90
–
96
92
100
–
in
T
T
(V = 0 V, C = 0.001 µF, R = 47 kΩ)
in
T
T
Input Threshold Voltage (Pin 4)
(Zero Duty Cycle)
(Maximum Duty Cycle)
V
TH
V
–
0
2.8
–
3.3
–
OSCILLATOR SECTION
Frequency
f
kHz
osc
(C = 0.01 µF, R = 12 kΩ, T = 25°C)
9.7
9.5
9.0
–
10.5
–
–
11.3
11.5
11.5
–
T
T
A
T
T
A
= T
= T
to T
to T
– MC34060A
– MC33060A
A
low
high
low
high
(C = 0.001 µF, R = 47 kΩ)
25
T
T
Standard Deviation of Frequency*
(C = 0.001 µF, R = 47 kΩ)
σf
–
1.5
–
%
%
%
osc
T
T
Frequency Change with Voltage
(V = 7.0 V to 40 V)
CC
∆f (∆V)
osc
–
0.5
2.0
Frequency Change with Temperature
∆f (∆T)
osc
(∆T =T
(C = 0.01 µF, R = 12 kΩ)
T
to T )
high
–
–
4.0
–
–
–
A
low
T
UNDERVOLTAGE LOCKOUT SECTION
Turn–On Threshold (V increasing, I = 1.0 mA)
V
th
4.0
50
4.7
5.5
V
CC
ref
Hysteresis
V
H
150
300
mV
TOTAL DEVICE
Standby Supply Current
(Pin 6 at V , all other inputs and outputs open)
I
mA
mA
CC
ref
(V = 15 V)
–
–
5.5
7.0
10
15
CC
(V = 40 V)
CC
Average Supply Current
I
S
–
7.0
–
(V
[Pin 4]
= 2.0 V, C = 0.001 µF, R = 47 kΩ). See Figure 11.
T T
N
2
Σ (x –x)
n – 1
N–1
n
*Standard deviation is a measure of the statistical distribution about the mean as derived from the formula; σ =
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4
MC34060A, MC33060A
6
5
Reference
Regulator
10
12
Oscillator
V
CC
R
T
Dead-Time
Comparator
Undervoltage
Lockout
C
T
-
+
Ref Out
-
+
0.12V
0.7V
4
Dead-Time
Control
V
TH
-
+
9
8
Collector
Emitter
PWM.
Comparator
Q1
≈ 0.7mA
+
-
+
2
-
1
1
2
3
13
14
7
Gnd
Error Amp
1
Feedback/PWM
Comparator Input
Error Amp
2
This device contains 46 active transistors.
Figure 1. Block Diagram
Description
Output pulse width modulation is accomplished by
comparison of the positive sawtooth waveform across
The MC34060A is a fixed–frequency pulse width
modulation control circuit, incorporating the primary
building blocks required for the control of a switching power
supply (see Figure 1). An internal–linear sawtooth oscillator
is frequency–programmable by two external components,
capacitor C to either of two control signals. The output is
T
enabled only during that portion of time when the sawtooth
voltage is greater than the control signals. Therefore, an
increase in control–signal amplitude causes a corresponding
linear decrease of output pulse width. (Refer to the Timing
Diagram shown in Figure 2.)
R
T
and C . The approximate oscillator frequency is
T
determined by:
1.2
RT • CT
fosc
^
For more information refer to Figure 3.
Capacitor C
T
Feedback/P.W.M.
Comparator
Dead-Time Control
Output Q ,
1
Emitter
Figure 2. Timing Diagram
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5
MC34060A, MC33060A
APPLICATIONS INFORMATION
The control signals are external inputs that can be fed into
pin varies from 0.5 V to 3.5 V. Both error amplifiers have a
the dead–time control, the error amplifier inputs, or the
feed–back input. The dead–time control comparator has an
effective 120 mV input offset which limits the minimum
output dead time to approximately the first 4% of the
sawtooth–cycle time. This would result in a maximum duty
cycle of 96%. Additional dead time may be imposed on the
output by setting the dead time–control input to a fixed
voltage, ranging between 0 V to 3.3 V.
The pulse width modulator comparator provides a means
for the error amplifiers to adjust the output pulse width from
the maximum percent on–time, established by the dead time
control input, down to zero, as the voltage at the feedback
common mode input range from –0.3 V to (V –2.0 V), and
CC
may be used to sense power supply output voltage and
current. The error–amplifier outputs are active high and are
ORed together at the noninverting input of the pulse–width
modulator comparator. With this configuration, the
amplifier that demands minimum output on time, dominates
control of the loop.
The MC34060A has an internal 5.0 V reference capable
of sourcing up to 10 mA of load currents for external bias
circuits. The reference has an internal accuracy of ±5% with
a typical thermal drift of less than 50 mV over an operating
temperature range of 0° to +70°C.
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6
MC34060A, MC33060A
120
110
500 k
100 k
VCC = 15 V
∆VO = 3.0 V
RL = 2.0 kΩ
V
CC
= 15 V
100
90
0.001 µF
0
80
70
60
50
40
30
20
-20
-40
-60
A
VOL
θ
10 k
C = 0.01 µF
-80
T
-100
-120
-140
1.0 µF
1.0 k
500
-160
-180
10
0
1.0
10
100
1.0 k
10 k
100 k
1.0 M
1.0 k 2.0 k
5.0 k 10 k 20 k
50 k 100 k 200 k 500 k 1.0 M
f, FREQUENCY (Hz)
R , TIMING RESISTANCE (Ω)
T
Figure 3. Oscillator Frequency
versus Timing Resistance
Figure 4. Open Loop Voltage Gain and Phase
versus Frequency
100
20
18
V
= 15 V
C = 0.001
16
14
80
60
40
20
0
CC
T
R = 47 k
T
12
C = 0.001 µF
T
10
8.0
6.0
4.0
2.0
0.01 µF
0
500 1.0 k
10 k
, OSCILLATOR FREQUENCY (Hz)
100 k
500 k
0
1.0 2.0
DEAD-TIME CONTROL VOLTAGE (V)
3.0
3.5
f
osc
Figure 5. Percent Deadtime versus
Oscillator Frequency
Figure 6. Percent Duty Cycle versus
Dead–Time Control Voltage
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0
100
200 300
I , EMITTER CURRENT (mA)
400
500
0
100
200 300
I , COLLECTOR CURRENT (mA)
400
500
E
C
Figure 7. Emitter–Follower Configuration
Output Saturation Voltage versus
Emitter Current
Figure 8. Common–Emitter Configuration
Output Saturation Voltage versus
Collector Current
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7
MC34060A, MC33060A
10
6.0
9.0
8.0
7.0
6.0
5.5
5.0
Turn On
Turn Off
5.0
4.0
3.0
2.0
4.5
4.0
1.0
0
0
5.0
10
15
20
25
30
35
40
0
5.0
10
15
20
25
30
35
40
I , REFERENCE LOAD CURRENT (mA)
L
V
CC
, SUPPLY VOLTAGE (V)
Figure 9. Standby Supply Current
versus Supply Voltage
Figure 10. Undervoltage Lockout Thresholds
versus Reference Load Current
V
CC
= 15V
150Ω
2W
V
CC
Dead-
Time
Test
Inputs
Error Amplifier
Under Test
+
-
Feedback
V
in
R
C
E
Output
T
C
T
(+)
(-)
(+)
Feedback
Terminal
(Pin 3)
Error
(-)
Ref
Out
+
50kΩ
Gnd
V
ref
-
Other Error
Amplifier
Figure 11. Error Amplifier Characteristics
Figure 12. Deadtime and Feedback Control
15V
15V
C
R
L
68Ω
Output
Transistor
V
C
C
E
V
E
C
Output
Transistor
L
E
R
68Ω
15pF
90%
C
L
15pF
L
90%
90%
90%
V
C
V
E
10%
10%
10%
10%
t
r
t
f
t
r
t
f
Figure 13. Common–Emitter Configuration
and Waveform
Figure 14. Emitter–Follower Configuration
and Waveform
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8
MC34060A, MC33060A
V
O
To Output
Voltage of
System
V
ref
R
R
1
1
2
1
2
+
-
+
-
R
R
2
3
3
V
ref
Error
Amp
Error
Amp
2
1
Positive Output Voltage
Negative Output Voltage
To Output
Voltage of
System
R
R
R
R
1
1
V
O
= V (1 +
ref
)
V
O
= -V (1 +
ref
)
V
O
2
2
Figure 15. Error Amplifier Sensing Techniques
R
1
V
ref
4
Q
D
T
Output
+
-
R
T
C
T
C
S
R
1
R
2
V
ref
6
5
4
D
T
Output
Q
160
R
2
47k
0.001
R
Max % On Time ≈ 92 -
1
1 +
R
2
Figure 16. Deadtime Control Circuit
Figure 17. Soft–Start Circuit
V
ref
6
R
C
T
Master
5
T
C
T
R
T
V
ref
6
R
C
T
(Additional
Circuits)
Slave
5
T
Figure 18. Slaving Two or More Control Circuits
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9
MC34060A, MC33060A
150µH @ 2.0A
V
V
in
= 8.0V to 40V
out
Tip 32
5.0V/1.0A
47
4.7k
10
75
V
CC
0.01
1
2
+
47k
1.0M
9
C
-
3
Comp
+
+
MC34060A
14
13
12
MR850
50/50
1000
6.3V
+
-
0.01
8
7
E
Gnd
V
4.7k
ref
D
T
C
T
R
T
4
5
6
10/16V
+
0.001
4.7k
150
4.7k
47k
390
0.1
Test
Conditions
= 8.0 V to 40 V, I = 1.0 A
Results
Line Regulation
Load Regulation
Output Ripple
V
in
V
in
V
in
V
in
V
in
25 mV
3.0 mV
0.5%
0.06%
O
= 12 V, I = 1.0 mA to 1.0 A
O
= 12 V, I = 1.0 A
75 mV p–p P.A.R.D.
O
Short Circuit Current
Efficiency
= 12 V, R = 0.1 Ω
1.6 A
73%
L
= 12 V, I = 1.0 A
O
Figure 19. Step–Down Converter with Soft–Start
and Output Current Limiting
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10
MC34060A, MC33060A
150µH @ 4.0A
20µH @ 1.0A
V
in
= 8.0V to 26V
MR850
V
out
*
28V/
0.5A
22k
10
V
CC
0.05
1
2
+
33k
2.7M
9
C
-
4.7k
3
Comp
+
+
+
+
*
MC34060A
14
50/35V
470/
35V
470/
35V
300
0.1
13
12
8
7
-
3.9k
E
Tip 111
V
ref
Gnd
D
C
T
R
T
T
6
4
5
4.7k
0.001
470
47k
390
Test
Conditions
= 8.0 V to 26 V, I = 0.5 A
Results
Line Regulation
Load Regulation
Output Ripple
Efficiency
V
in
V
in
V
in
V
in
40 mV 0.14%
5.0 mV 0.18%
O
= 12 V, I = 1.0 mA to 0.5 A
O
= 12 V, I = 0.5 A
24 mV p–p P.A.R.D.
75%
O
= 12 V, I = 0.5 A
O
*Optional circuit to minimize output ripple
Figure 20. Step–Up Converter
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11
MC34060A, MC33060A
V
in
= 8.0V to 40V
MR851
V
out
Tip 32C
20µH *
@ 1.0A
-15V/
0.25A
47
30k
10
75
V
CC
0.01
1
2
+
47k
1.0M
9
C
-
7.5k
3
+
Comp
50/50V
*
150µH
@ 2.0A
14
13
12
MC34060A
330/
16V
330/
16V
+
-
+
+
0.01
8
7
E
V
Gnd
ref
10k
D
T
C
T
R
T
4
5
6
10/16V
0.001
47k
4.7k
47k
3.3k
820
1.0
Test
Conditions
= 8.0 V to 40 V, I = 250 mA
Results
Line Regulation
Load Regulation
Output Ripple
V
in
V
in
V
in
V
in
V
in
52 mV
47 mV
0.35%
0.32%
O
= 12 V, I = 1.0 to 250 mA
O
= 12 V, I = 250 mA
10 mV p–p P.A.R.D.
330 mA
O
Short Circuit Current
Efficiency
= 12 V, R = 0.1 Ω
L
= 12 V, I = 250 mA
86%
O
*Optional circuit to minimize output ripple
Figure 21. Step–Up/Down Voltage Inverting Converter
with Soft–Start and Current Limiting
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12
L
1
1N5824
2200/10V
1N4934
5.0V/3.0A
1N4003
T
2
+
+
3 each
0.0047 UL/CSA
100/10V
3/200
Vac
L
2
1N4934
+
12/075A
Common
*
T1
+
+
+
+
*
1N4001
47/25V
10/35V
1000/25V
1000/25V
1N4934
*
22k
10
V
L
3
10/35V
-12/0.75A
+
*
CC
180/200V
1
2
3
9
+
C
1N4742
1N4937
-
1.0A
15Ω
Cold
T
2.2M
33k
0.01
Comp
MPS
A05
MC34060A
1N4687
6.8k
7.5k
115 Vac
±20%
14
13
12
+
-
10/25V
8
7
MJE
13005
E
+
MPS
A55
Gnd
V
ref
8.2k
D
C
R
T
T
T
*Optional R.F.I. Filter
4
5
6
+
200
47
0.001
10
27k
V
P
47k
out out
5.0k 25k
1.5k
11k
1.0
0.01
1N4148
2.7k
Test
Conditions
Results
T1 – Coilcraft W2961
V
= 95 Vac to 135 Vac, I = 3.0 A
O
= 95 Vac to 135 Vac, I = ±0.75 A
20 mV 0.40%
52 mV 0.26%
476 mV 9.5%
300 mV 2.5%
Line Regulation 5.0 V
Line Regulation ±12 V
Load Regulation 5.0 V
Load Regulation ±12 V
Output Ripple 5.0 V
Output Ripple ±12 V
Efficiency
T2 – Core: Coilcraft 11–464–16,
0.025″ gap in each leg.
Bobbin: Coilcraft 37–573
Windings:
Primary, 2 each, 75 turns #25 Awg Bifilar wound
Feedback: 15 turns #26 Awg
Secondary, 5.0 V, 6 turns @33 Awg Bifilar wound
Secondary, 2 each, 14 turns #24 Awg Bifilar wound
L1 – Coilcraft Z7156, 15 µH @ 5.0 A
in
V
in
O
V
V
V
V
V
= 115 Vac, I = 1.0 A to 4.0 A
O
in
in
in
in
in
= 115 Vac, I = ±0.4 A to ±0.9 A
O
= 115 Vac, I = 3.0 A
O
45 mV p–p P.A.R.D.
75 mV p–p P.A.R.D.
74%
= 115 Vac, I = ±0.75 A
O
= 115 Vac, I 5.0 V = 3.0 A
O
O
I
±12 V = ±0.75 A
L2, L3 – Coilcraft Z7157, 25 µH @ 1.0 A
Figure 22. 33 W Off–Line Flyback Converter with Soft–Start and Primary Power Limiting
MC34060A, MC33060A
ORDERING INFORMATION
Operating
Temperature Range
Device
Package
SO–14
Shipping
55 Units/Rail
MC34060AD
MC34060ADR2
MC34060AP
MC33060AD
MC33060ADR2
MC33060AP
SO–14
2500 Tape & Reel
25 Units/Rail
T = 0° to +70°C
A
PDIP–14
SO–14
55 Units/Rail
SO–14
2500 Tape & Reel
25 Units/Rail
T = –40° to +85°C
A
PDIP–14
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14
MC34060A, MC33060A
PACKAGE DIMENSIONS
PDIP–14
P SUFFIX
CASE 646–06
ISSUE M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
14
1
8
7
B
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
INCHES
DIM MIN MAX
MILLIMETERS
A
F
MIN
18.16
6.10
3.69
0.38
1.02
MAX
18.80
6.60
4.69
0.53
1.78
A
B
C
D
F
0.715
0.240
0.145
0.015
0.040
0.770
0.260
0.185
0.021
0.070
L
N
C
G
H
J
0.100 BSC
2.54 BSC
0.052
0.008
0.115
0.290
---
0.095
0.015
0.135
0.310
10
1.32
0.20
2.92
7.37
---
2.41
0.38
3.43
7.87
10
–T–
SEATING
PLANE
K
L
J
K
M
N
_
_
D 14 PL
0.015
0.039
0.38
1.01
H
G
M
M
0.13 (0.005)
SO–14
D SUFFIX
CASE 751A–03
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
–A–
14
8
7
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
–B–
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
P 7 PL
M
M
B
0.25 (0.010)
1
MILLIMETERS
DIM MIN MAX
INCHES
MIN
G
MAX
0.344
0.157
0.068
0.019
0.049
F
R X 45
_
C
A
B
C
D
F
8.55
3.80
1.35
0.35
0.40
8.75 0.337
4.00 0.150
1.75 0.054
0.49 0.014
1.25 0.016
–T–
SEATING
PLANE
J
M
G
J
1.27 BSC
0.050 BSC
K
D 14 PL
0.19
0.10
0
0.25 0.008
0.25 0.004
0.009
0.009
7
0.244
0.019
M
S
S
A
0.25 (0.010)
T
B
K
M
P
R
7
0
_
_
_
_
5.80
0.25
6.20 0.228
0.50 0.010
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15
MC34060A, MC33060A
SWITCHMODE is a trademark of Semiconductor Components Industries, LLC.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
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including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
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PUBLICATION ORDERING INFORMATION
Literature Fulfillment:
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MC34060A/D
相关型号:
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