MC33762DM-2525RG [ONSEMI]

LDO 稳压器,80 mA,1 V,双输出,高 PSRR,低噪声,带开关控制;
MC33762DM-2525RG
型号: MC33762DM-2525RG
厂家: ONSEMI    ONSEMI
描述:

LDO 稳压器,80 mA,1 V,双输出,高 PSRR,低噪声,带开关控制

开关 稳压器
文件: 总11页 (文件大小:520K)
中文:  中文翻译
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MC33762  
Voltage Regulator - Dual,  
Ultra Low-Noise, Low  
Dropout, ON/OFF Control  
1.0 V  
http://onsemi.com  
The MC33762 is a dual Low DropOut (LDO) regulator featuring  
excellent noise performances. Thanks to its innovative design, the  
circuit reaches an impressive 40 mVRMS noise level without an  
external bypass capacitor. Housed in a small m8 package, it represents  
the ideal designer’s choice when space and noise are at premium.  
The absence of external bandgap capacitor accelerates the response  
time to a wakeup signal and keeps it within 40 ms, making the  
MC33762 as a natural candidate for portable applications.  
The MC33762 also hosts a novel architecture which prevents  
excessive undershoots in the presence of fast transient bursts, as in any  
bursting systems.  
8
1
Micro8t  
DM SUFFIX  
CASE 846A  
Finally, with a static line regulation better than 75 dB, it naturally  
shields the downstream electronics from choppy lines.  
PIN CONFIGURATION AND  
MARKING DIAGRAM  
Features  
1
8
Nominal Output Current of 80 mA with a 100 mA Peak Capability  
UltraLow Noise: 150 nV/Hz @ 100 Hz, 40 mVRMS  
V
GND1  
En1  
out1  
CC1  
out2  
V
V
V
GND2  
En2  
100 Hz100 kHz Typical, I = 60 mA, Co = 1.0 mF  
out  
CC2  
Fast Response Time from OFF to ON: 40 ms Typical  
Ready for 1.0 V Platforms: ON with a 900 mV High Level  
Typical Dropout of 90 mV @ 30 mA, 160 mV @ 80 mA  
Ripple Rejection: 70 dB @ 1.0 kHz  
(Top View)  
xxxx = Device Code  
See Table Page 4  
= Assembly Location  
A
Y
W
G
= Year  
= Work Week  
1.5% Output Precision @ 25°C  
Thermal Shutdown  
= PbFree Package  
(Note: Microdot may be in either location)  
V Available at 2.5 V, 2.8 V, and 3.0 V  
out  
Separate Dice for Each Regulator Provides Maximum Isolation  
Between Regulators  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
Operating Range from 40 to +85°C  
PbFree Packages are Available  
Applications  
Noise Sensitive Circuits: VCOs RF Stages, etc.  
Bursting Systems (TDMA Phones)  
All Battery Operated Devices  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
October, 2019 Rev. 6  
MC33762/D  
MC33762  
V
CC1  
7
EN1  
On/Off  
Thermal  
Shutdown  
2
Band Gap  
Reference  
V
out  
8
5
*Current Limit  
*Antisaturation Protection  
*Load Transient Improvement  
1
4
GND1  
EN2  
V
CC2  
On/Off  
Thermal  
Shutdown  
Band Gap  
Reference  
V
out  
6
*Current Limit  
*Antisaturation Protection  
*Load Transient Improvement  
3
GND2  
Figure 1. Simplified Block Diagram  
PIN FUNCTION DESCRIPTIONS  
Pin #  
Pin Name  
GND1  
En1  
Function  
Description  
1
2
3
4
5
6
7
8
Ground of the 1st LDO  
Enables the 1st LDO  
Ground of the 2nd LDO  
Enables the 2nd LDO  
A 900 mV level on this pin is sufficient to start this LDO. A 150 mV shuts it down.  
GND2  
En2  
A 900 mV level on this pin is sufficient to start this LDO. A 150 mV shuts it down.  
This pin brings the power to the 1st LDO and requires adequate decoupling.  
This pin requires a 1.0 mF output capacitor to be stable.  
V
cc2  
2nd LDO V pin  
cc  
V
out2  
Shuts or wakesup the IC  
V
cc1  
1st LDO V pin  
This pin brings the power to the 1st LDO and requires adequate decoupling.  
This pin requires a 1.0 mF output capacitor to be stable.  
cc  
V
out1  
Delivers the output voltage  
MAXIMUM RATINGS  
Value  
Rating  
Pin #  
Symbol  
Min  
Max  
Unit  
Power Supply Voltage  
1
V
in  
12  
V
ESD Capability, HBM Model  
All Pins  
All Pins  
1.0  
200  
kV  
V
ESD Capability, Machine Model  
Maximum Power Dissipation  
NW Suffix, Plastic Package  
P
D
Internally Limited  
W
Thermal Resistance JunctiontoAir  
R
240  
°C/W  
q
JA  
Operating Ambient Temperature  
T
Jmax  
T
40 to +85  
150  
°C  
°C  
°C  
A
Maximum Junction Temperature (Note 1)  
Maximum Operating Junction Temperature (Note 2)  
T
125  
J
Storage Temperature Range  
T
stg  
60 to +150  
°C  
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the  
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect  
device reliability.  
1. Internally limited by shutdown.  
2. Specifications are guaranteed below this value.  
http://onsemi.com  
2
 
MC33762  
ELECTRICAL CHARACTERISTICS  
(For typical values T = 25°C, for min/max values T = 40°C to +85°C, max T = 125°C unless otherwise noted)  
A
A
J
Characteristics  
Pin # Symbol  
Min  
Typ  
Max  
Unit  
LOGIC CONTROL SPECIFICATIONS  
Input Voltage Range  
24  
24  
24  
V
R
V
0
V
V
ON/OFF  
ON/OFF  
ON/OFF  
in  
ON/OFF Input Resistance (all versions)  
ON/OFF Control Voltages (Note 3)  
250  
kW  
mV  
Logic Zero, OFF State, I = 50 mA  
900  
150  
O
Logic One, ON State, I = 50 mA  
O
CURRENTS PARAMETERS  
Current Consumption in OFF State (all versions)  
IQ  
0.1  
180  
800  
180  
2.0  
mA  
mA  
mA  
mA  
OFF  
OFF Mode Current: V = V + 1.0 V, I = 0, V = 150 mV  
in  
out  
O
OFF  
Current Consumption in ON State (all versions)  
ON Mode Current: V = V + 1.0 V, I = 0, V = 3.5 V  
IQ  
ON  
SAT  
in  
out  
O
ON  
Current Consumption in ON State (all versions), ON Mode  
IQ  
Saturation Current: V = V 0.5 V, No Output Load  
in  
out  
Current Limit V = Vout  
+ 1.0 V,  
nom  
I
100  
in  
nom  
MAX  
Output is brought to Vout  
0.3 V (all versions)  
OUTPUT VOLTAGES  
V
+ 1.0 V < V < 6.0 V, T = 25°C, 1.0 mA < I < 80 mA  
2.5 V  
2.8 V  
3.0 V  
3.3 V  
3.6 V  
57  
57  
57  
57  
57  
57  
57  
57  
57  
57  
57  
57  
V
out  
2.462  
2.758  
2.955  
3.250  
3.546  
1.5  
2.5  
2.8  
3.0  
3.3  
3.6  
X
2.537  
2.842  
3.045  
3.349  
3.654  
+1.5  
V
V
V
V
V
%
V
V
V
V
V
%
out  
in  
A
out  
V
out  
V
out  
V
out  
V
out  
Other Voltages up to 5.0 V Available in 50 mV Increment Steps  
+ 1.0 V < V < 6.0 V, T = 40°C to +85°C, 1.0 mA < I < 80 mA  
V
out  
V
out  
2.5 V  
2.8 V  
3.0 V  
3.3 V  
3.6 V  
V
out  
2.425  
2.716  
2.91  
2.5  
2.8  
3.0  
3.3  
3.6  
X
2.575  
2.884  
3.090  
3.399  
3.708  
+3.0  
in  
A
out  
V
out  
V
out  
V
out  
3.201  
3.492  
3.0  
V
out  
Other Voltages up to 5.0 V Available in 50 mV Increment Steps  
V
out  
LINE AND LOAD REGULATION, DROPOUT VOLTAGES  
Line Regulation (all versions)  
V
+ 1.0 V < V < 12 V, I = 80 mA  
57  
57  
Reg  
20  
40  
mV  
mV  
mV  
out  
in  
out  
line  
Load Regulation (all versions)V = V + 1.0 V, C = 1.0 mF, I = 1.0 to 80 mA  
Reg  
in  
out  
out  
out  
load  
Dropout Voltage (all versions) (Note 3)  
I
I
I
= 30 mA  
= 60 mA  
= 80 mA  
57  
57  
57  
V V  
90  
140  
160  
150  
200  
250  
out  
out  
out  
in out  
V V  
in out  
V V  
in out  
DYNAMIC PARAMETERS  
Ripple Rejection (all versions)  
57  
Ripple  
70  
dB  
V
= V + 1.0 V + 1.0 kHz 100 mVpp Sinusoidal Signal  
in  
out  
Output Noise Density @ 1.0 kHz  
57  
57  
150  
35  
nV/Hz  
mV  
RMS Output Noise Voltage (all versions)  
Noise  
C
= 1.0 mF, I = 50 mA, F = 100 Hz to 1.0 MHz  
out  
out  
Output Rise Time (all versions) C = 1.0 mF, I = 50 mA,  
57  
t
40  
ms  
°C  
out  
out  
rise  
10% of Rising ON Signal to 90% of Nominal V  
out  
THERMAL SHUTDOWN  
Thermal Shutdown (all versions)  
125  
3. Voltage slope should be greater than 2.0 mV/ms  
http://onsemi.com  
3
 
MC33762  
ORDERING INFORMATION  
Device  
Marking  
Voltage Output  
Package  
Shipping  
MC33762DM2525R2  
MC33762DM2525R2G  
Micro8  
2525  
2.5 V  
2.8 V  
3.0 V  
Micro8  
(PbFree)  
MC33762DM2828R2  
MC33762DM2828R2G  
Micro8  
4000 Units / Tape & Reel  
2528  
3030  
Micro8  
(PbFree)  
MC33762DM3030R2  
MC33762DM3030R2G  
Micro8  
Micro8  
(PbFree)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
DEFINITIONS  
Load Regulation  
Line Regulation  
The change in output voltage for a change in output  
current at a constant chip temperature.  
The change in output voltage for a change in input voltage.  
The measurement is made under conditions of low  
dissipation or by using pulse technique such that the average  
chip temperature is not significantly affected. One usually  
distinguishes static line regulation or DC line regulation (a  
DC step in the input voltage generates a corresponding step  
in the output voltage) from ripple rejection or audio  
susceptibility where the input is combined with a frequency  
generator to sweep from a few hertz up to a defined  
boundary while the output amplitude is monitored.  
Dropout Voltage  
The input/output differential at which the regulator output  
no longer maintains regulation against further reductions in  
input voltage. Measured when the output drops 100 mV  
below its nominal value (which is measured at 1.0 V  
differential value). The dropout level is affected by the chip  
temperature, load current and minimum input supply  
requirements.  
Thermal Protection  
Output Noise Voltage  
Internal thermal shutdown circuitry is provided to protect  
the integrated circuit in the event that the maximum junction  
temperature is exceeded. When activated at typically 125°C,  
the regulator turns off. This feature is provided to prevent  
catastrophic failures from accidental overheating.  
This is the integrated value of the output noise over a  
specified frequency range. Input voltage and output current  
are kept constant during the measurement. Results are  
expressed in mVRMS.  
Maximum Power Dissipation  
The maximum total dissipation for which the regulator  
will operate within its specs.  
Maximum Package Power Dissipation  
The maximum power package power dissipation is the  
power dissipation level at which the junction temperature  
reaches its maximum operating value, i.e. 125°C.  
Depending on the ambient temperature, it is possible to  
calculate the maximum power dissipation and thus the  
maximum available output current.  
Quiescent Current  
The quiescent current is the current which flows through  
the ground when the LDO operates without a load on its  
output: internal IC operation, bias etc. When the LDO  
becomes loaded, this term is called the Ground current. It is  
actually the difference between the input current (measured  
through the LDO input pin) and the output current.  
http://onsemi.com  
4
MC33762  
Characterization Curves  
Curves are Common to Both Regulators  
4.5  
4.0  
185  
40°C  
25°C  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
85°C  
180  
175  
170  
165  
0.5  
0
0
20  
40  
60  
80  
100  
60 40  
20  
0
20  
40  
60  
80  
100  
OUTPUT CURRENT (mA)  
AMBIENT TEMPERATURE (°C)  
Figure 2. Ground Current versus  
Output Current  
Figure 3. Quiescent Current versus  
Temperature  
200  
150  
100  
2.805  
2.800  
2.795  
2.790  
2.785  
85°C  
85°C  
25°C  
40°C  
40°C  
25°C  
0°C  
50  
0
20°C  
40°C  
2.780  
2.775  
0
20  
40  
60  
80  
100  
0
20  
40  
60  
80  
100  
OUTPUT CURRENT (mA)  
OUTPUT CURRENT (mA)  
Figure 4. Dropout versus Output Current  
Figure 5. Output Voltage versus  
Output Current  
180  
160  
140  
80 mA  
60 mA  
120  
100  
80  
30 mA  
60  
40  
20  
0
1.0 mA  
60  
60 40  
20  
0
20  
40  
80  
100  
TEMPERATURE (°C)  
Figure 6. Dropout versus Temperature  
http://onsemi.com  
5
MC33762  
APPLICATION HINTS  
Protections  
Input Decoupling  
As with any regulator, it is necessary to reduce the  
dynamic impedance of the supply rail that feeds the  
component. A 1.0 mF capacitor either ceramic or tantalum is  
recommended and should be connected close to the  
MC33762 package. Higher values will correspondingly  
improve the overall line transient response.  
The MC33762 hosts several protections, giving natural  
ruggedness and reliability to the products implementing the  
component. The output current is internally limited to a  
maximum value of 180 mA typical while temperature  
shutdown occurs if the die heats up beyond 125°C. These  
values let you assess the maximum differential voltage the  
device can sustain at a given output current before its  
protections come into play.  
Output Decoupling  
Thanks to a novel concept, the MC33762 is a stable  
component and does not require any specific Equivalent  
Series Resistance (ESR) neither a minimum output current.  
Capacitors exhibiting ESRs ranging from a few mW up to  
3.0 W can thus safely be used. The minimum decoupling  
value is 1.0 mF and can be augmented to fulfill stringent load  
transient requirements. The regulator accepts ceramic chip  
capacitors as well as tantalum devices.  
The maximum dissipation the package can handle is given  
by:  
T
* T  
Jmax  
R
A
P
+
max  
qJA  
If T  
is limited to 125°C, then the MC33762 can  
Jmax  
dissipate up to 395 mW @ 25°C. The power dissipated by  
the MC33762 can be calculated from the following formula:  
Noise Performances  
) ) ǒV  
Ǔ
Ptot + ǒVin  
out Ǔ  
  I  
(I  
gnd  
* V  
  I  
out  
out  
in  
Unlike other LDOs, the MC33762 is a true lownoise  
regulator. Without the need of an external bypass capacitor,  
it typically reaches the incredible level of 40 mVRMS overall  
noise between 100 Hz and 100 kHz. To give maximum  
insight on noise specifications, ON Semiconductor includes  
spectral density graphics. The classical bypass capacitor  
impacts the startup phase of standard LDOs. However,  
thanks to its lownoise architecture, the MC33762 operates  
without a bypass element and thus offers a typical 40 ms  
startup phase.  
or  
Ptot ) V  
  I  
out  
out  
Vin  
+
max  
I
) I  
out  
gnd  
If a 80 mA output current is needed, the ground current is  
extracted from the datasheet curves: 4.0 mA @ 80 mA. For  
a half 2.8 V MC33762 (2.8 V) operating at 25°C, the  
maximum input voltage will then be 7.3 V.  
Typical Applications  
The following picture portrays the typical application of  
the MC33762.  
Input  
8
7
6
5
1
2
3
4
Output 1  
Output 2  
MC33762  
+
C3  
+
C1  
+
C2  
Regulator 1  
1.0 mF  
Regulator 2  
On/Off  
1.0 mF 1.0 mF  
R1  
On/Off  
R2  
100 k  
100 k  
Figure 7. A Typical Application Schematic  
As for any low noise designs, particular care has to be  
taken when tackling Printed Circuit Board (PCB) layout.  
Connections shall be kept short and wide. Layout example  
as given in the MC33761 application hints can be used as a  
starting basis.  
http://onsemi.com  
6
MC33762  
Understanding the Load Transient Improvement  
The MC33762 features a novel architecture which allows  
During this decreasing phase, the LDO stops the PNP bias  
and one can consider the LDO asleep (Figure 8). If by  
misfortune a current shot appears, the reaction time is  
incredibly lengthened and a strong undershoot takes place.  
This reaction is clearly not acceptable for line sensitive  
devices, such as VCOs or other RadioFrequency parts.  
This problem is dramatically exacerbated when the output  
current drops to zero rather than a few mA. In this later case,  
the internal feedback network is the only discharge path,  
accordingly lengthening the output voltage decay period  
(Figure 9).  
The MC33762 cures this problem by implementing a  
clever design where the LDO detects the presence of the  
overshoot and forces the system to go back to steadystate  
as soon as possible, ready for the next shot. Figure 10 and 11  
show how it positively improves the response time and  
decreases the negative peak voltage.  
the user to easily implement the regulator in burst systems  
where the time between two current shots is kept very small.  
The quality of the transient response time is related to  
many parameters, among which the closedloop bandwidth  
with the corresponding phase margin plays an important  
role. However, other characteristics also come into play like  
the series pass transistor saturation. When a current  
perturbation suddenly appears on the output, e.g. a load  
increase, the error amplifier reacts and actively biases the  
PNP transistor. During this reaction time, the LDO is in  
openloop and the output impedance is rather high. As a  
result, the voltage brutally drops until the error amplifier  
effectively closes the loop and corrects the output error.  
When the load disappears, the opposite phenomenon takes  
place with a positive overshoot. The problem appears when  
this overshoot decays down to the LDO steadystate value.  
Figure 8. A Standard LDO Behavior when the Load  
Current Disappears  
Figure 9. A Standard LDO Behavior when the Load  
Current Appears in the Decay Zone  
Figure 10. Without Load Transient Improvement  
Figure 11. MC33762 with Load Transient Improvement  
http://onsemi.com  
7
 
MC33762  
MC33762 Has a Fast Startup Phase  
Thanks to the lack of bypass capacitor the MC33762 is  
unacceptable level. MC33762 offers the best of both worlds  
since it no longer includes a bypass capacitor and starts in  
less than 40 ms typically (Repetitive at 200 Hz). It also  
ensures an incredible lownoise level of 40 mVRMS  
100 Hz100 kHz. The following picture details the typical  
33762 startup phase.  
able to supply its downstream circuitry as soon as the OFF  
to ON signal appears. In a standard LDO, the charging time  
of the external bypass capacitor hampers the response time.  
A simple solution consists in suppressing this bypass  
element but, unfortunately, the noise rises to an  
Figure 12. Repetitive Startup Waveforms  
TYPICAL TRANSIENT RESPONSES  
Figure 13. Output is Pulsed from 2.0 mA to 80 mA  
Figure 14. Discharge Effects from 0 to 40 mA  
http://onsemi.com  
8
MC33762  
TYPICAL TRANSIENT RESPONSES  
Figure 15. Load Transient Improvement Effect  
Figure 16. Load Transient Improvement Effect  
250  
200  
150  
100  
0
V
= V + 1.0 V  
out  
RMS Noise, I = 50 mA:  
20 Hz 100 kHz: 27 mV  
20 Hz 1.0 MHz: 30 mV  
in  
O
10  
T = 25°C  
A
C
= 1.0 mF  
20  
30  
40  
50  
60  
70  
80  
out  
I
O
= 50 mA  
10 mA  
I
O
= 50 mA  
10 mA  
RMS Noise, I = 10 mA:  
20 Hz 100 kHz: 29 mV  
20 Hz 1.0 MHz: 31 mV  
O
V
in  
= V + 1.0 V  
O
50  
0
T = 25°C  
A
90  
C
= 1.0 mF  
out  
100  
100  
1,000  
10,000  
100,000 1,000,000  
100  
1,000  
10,000  
100,000  
1,000,000  
f, FREQUENCY (Hz)  
f, FREQUENCY (Hz)  
Figure 17. MC33762 Typical Noise Density Performance  
Figure 18. MC33762 Typical Ripple Rejection  
Performance  
3.5  
I
= 1.0 mA  
3.0  
2.5  
2.0  
1.5  
1.0  
O
10 mA  
80 mA  
0.5  
0
20 mA  
100  
1,000  
10,000  
100,000 1,000,000  
f, FREQUENCY (Hz)  
Figure 19. Output Impedance Plot  
C
out = 1.0 mF, Vin = Vout + 1.0 V  
Micro8 is a trademark of International Rectifier.  
http://onsemi.com  
9
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
Micro8  
CASE 846A02  
ISSUE K  
DATE 16 JUL 2020  
SCALE 2:1  
GENERIC  
MARKING DIAGRAM*  
8
XXXX  
AYWG  
G
1
XXXX = Specific Device Code  
A
Y
W
G
= Assembly Location  
= Year  
= Work Week  
= PbFree Package  
STYLE 1:  
STYLE 2:  
PIN 1. SOURCE 1  
STYLE 3:  
PIN 1. SOURCE  
PIN 1. N-SOURCE  
2. N-GATE  
(Note: Microdot may be in either location)  
2. SOURCE  
3. SOURCE  
4. GATE  
2. GATE 1  
3. SOURCE 2  
4. GATE 2  
3. P-SOURCE  
4. P-GATE  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
PbFree indicator, “G” or microdot “G”, may  
or may not be present. Some products may  
not follow the Generic Marking.  
5. DRAIN  
6. DRAIN  
7. DRAIN  
8. DRAIN  
5. DRAIN 2  
6. DRAIN 2  
7. DRAIN 1  
8. DRAIN 1  
5. P-DRAIN  
6. P-DRAIN  
7. N-DRAIN  
8. N-DRAIN  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASB14087C  
MICRO8  
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ON Semiconductor and  
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