MC14016BD [ONSEMI]
Quad Analog Switch/ Quad Multiplexer; 四路模拟开关/多路四核
| 型号： | MC14016BD |
| 厂家： | 
ONSEMI |
| 描述： | Quad Analog Switch/ Quad Multiplexer |
| 文件： | 总11页 (文件大小：179K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC14016B
Quad Analog Switch/
Quad Multiplexer
The MC14016B quad bilateral switch is constructed with MOS
P−channel and N−channel enhancement mode devices in a single
monolithic structure. Each MC14016B consists of four independent
switches capable of controlling either digital or analog signals. The
quad bilateral switch is used in signal gating, chopper, modulator,
demodulator and CMOS logic implementation.
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MARKING
DIAGRAMS
Features
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Linearized Transfer Characteristics
• Low Noise − 12 nV/√Cycle, f ≥ 1.0 kHz typical
14
1
PDIP−14
P SUFFIX
CASE 646
MC14016BCP
AWLYYWWG
• Pin−for−Pin Replacements for CD4016B, CD4066B (Note improved
transfer characteristic design causes more parasitic coupling
capacitance than CD4016)
14
SOIC−14
D SUFFIX
CASE 751A
14016BG
AWLYWW
• For Lower R , Use The HC4016 High−Speed CMOS Device or
ON
The MC14066B
1
• This Device Has Inputs and Outputs Which Do Not Have ESD
Protection. Antistatic Precautions Must Be Taken.
• Pb−Free Packages are Available
14
SOEIAJ−14
F SUFFIX
CASE 965
MC14016B
ALYWG
MAXIMUM RATINGS (Voltages Referenced to V
)
SS
Symbol
Parameter
Value
−0.5 to +18.0
Unit
V
V
DC Supply Voltage Range
1
DD
V , V
Input or Output Voltage Range
(DC or Transient)
−0.5 to V + 0.5
V
in out
DD
A
WL, L
YY, Y
= Assembly Location
= Wafer Lot
= Year
I
Input Current (DC or Transient)
per Control Pin
±10
mA
in
WW, W = Work Week
G
I
Switch Through Current
±25
mA
= Pb−Free Indicator
SW
P
Power Dissipation, per Package
(Note 1)
500
mW
D
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
T
Ambient Temperature Range
Storage Temperature Range
−55 to +125
−65 to +150
260
°C
°C
°C
A
T
stg
T
Lead Temperature
(8−Second Soldering)
L
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V and V should be constrained
in
out
to the range V v (V or V ) v V
.
SS
in
out
DD
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V or V ). Unused outputs must be left open.
SS
DD
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
October, 2006 − Rev. 7
MC14016B/D
MC14016B
PIN ASSIGNMENT
BLOCK DIAGRAM
13
IN 1
OUT 1
1
2
3
4
5
6
7
14
V
DD
CONTROL 1
2
3
13 CONTROL 1
12 CONTROL 4
11 IN 4
OUT 1
OUT 2
OUT 3
OUT 4
1
5
IN 1
OUT 2
CONTROL 2
IN 2
4
6
CONTROL 2
CONTROL 3
10 OUT 4
IN 2
9
8
OUT 3
IN 3
CONTROL 3
9
V
SS
8
IN 3
12
CONTROL 4
10
11
IN 4
LOGIC DIAGRAM
(1/4 OF DEVICE SHOWN)
V
= PIN 14
= PIN 7
DD
OUT
IN
V
SS
CONTROL
Control
Switch
Off
LOGIC DIAGRAM RESTRICTIONS
≤ V ≤ V
0 = V
SS
DD
V
SS
in
DD
1 = V
On
V
≤ V ≤ V
out DD
SS
ORDERING INFORMATION
Device
†
Package
Shipping
MC14016BCP
PDIP−14
25 / Tape & Ammo Box
55 Units / Rail
MC14016BCPG
PDIP−14
(Pb−Free)
MC14016BD
SOIC−14
MC14016BDG
SOIC−14
(Pb−Free)
MC14016BDR2
SOIC−14
2500 / Tape & Reel
2000 / Tape & Reel
MC14016BDR2G
SOIC−14
(Pb−Free)
MC14016BFEL
SOEIAJ−14
SOEIAJ−14
(Pb−Free)
MC14016BFELG
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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2
MC14016B
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
)
SS
− 55_C
25_C
125_C
V
Vdc
DD
(2)
Min
Max
Min
Typ
Max
Min
Max
Characteristic
Input Voltage
Figure Symbol
Unit
1
V
5.0
10
15
−
−
−
−
−
−
−
−
−
1.5
1.5
1.5
0.9
0.9
0.9
−
−
−
−
−
−
Vdc
IL
IH
in
Control Input
V
5.0
10
15
−
−
−
−
−
−
3.0
8.0
13
2.0
6.0
11
−
−
−
−
−
−
−
−
−
Vdc
Input Current Control
−
−
I
15
−
±0.1
−
±0.00001 ±0.1
−
± 1.0 mAdc
Input Capacitance
Control
C
in
pF
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
5.0
5.0
5.0
0.2
−
−
−
−
−
−
−
−
−
−
−
−
Switch Input
Switch Output
Feed Through
Quiescent Current
2,3
I
5.0
10
15
−
−
−
0.25
0.5
1.0
−
−
−
0.0005
0.0010
0.0015
0.25
0.5
1.0
−
−
−
7.5
15
30
mAdc
DD
(3)
(Per Package)
“ON” Resistance
4,5,6
R
ON
−
−
−
−
−
−
−
−
−
−
Ohms
(V = V , R = 10 kW)
C
DD
L
−
−
−
(V = + 5.0 Vdc)
600
600
600
300
300
280
660
660
660
840
840
840
in
(V = − 5.0 Vdc) V = − 5.0 Vdc
in
SS
(V = ± 0.25 Vdc)
in
5.0
7.5
10
(V = + 7.5 Vdc)
−
−
−
360
360
360
−
−
−
240
240
180
400
400
400
−
−
−
520
520
520
in
(V = − 7.5 Vdc) V = − 7.5 Vdc
in
SS
(V = ± 0.25 Vdc)
in
(V = + 10 Vdc)
−
−
−
600
600
600
−
−
−
260
310
310
660
660
660
−
−
−
840
840
840
in
(V = + 0.25 Vdc) V = 0 Vdc
in
SS
(V = + 5.6 Vdc)
in
(V = + 15 Vdc)
−
−
−
360
360
360
−
−
−
260
260
300
400
400
400
−
−
−
520
520
520
in
(V = + 0.25 Vdc) V = 0 Vdc
in
SS
(V = + 9.3 Vdc)
in
15
D “ON” Resistance
−
−
DR
Ohms
ON
Between any 2 circuits in a common
package
(V = V
)
DD
C
−
−
(V = ± 5.0 Vdc, V = − 5.0 Vdc)
5.0
7.5
−
−
−
−
15
10
−
−
−
−
−
−
in
SS
(V = ± 7.5 Vdc, V = − 7.5 Vdc)
in
SS
Input/Output Leakage Current
(V = V
−
mAdc
)
SS
C
7.5
7.5
±0.1
±0.1
−
−
±0.0015
±0.0015
±0.1
± 0.1
−
−
± 1.0
± 1.0
(V = + 7.5, V = − 7.5 Vdc)
−
−
in
out
(V = − 7.5, V = + 7.5 Vdc)
in
out
NOTE: All unused inputs must be returned to V or V as appropriate for the circuit application.
DD
SS
2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
3. For voltage drops across the switch (DV ) > 600 mV ( > 300 mV at high temperature), excessive V current may be drawn; i.e., the
switch
DD
current out of the switch may contain both V
and switch input components. The reliability of the device will be unaffected unless the
DD
Maximum Ratings are exceeded. (See first page of this data sheet.) Reference Figure 14.
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3
MC14016B
ELECTRICAL CHARACTERISTICS (4) (C = 50 pF, T = 25_C)
L
A
V
DD
Vdc
(5)
Characteristic
Propagation Delay Time (V = 0 Vdc)
Figure Symbol
Min
Typ
Max
Unit
7
8
t
t
,
PLH
5.0
10
15
−
−
−
15
7.0
6.0
45
15
12
ns
SS
V
in
to V
out
PHL
(V = V , R = 10 kW)
C
DD
L
t
,
ns
Control to Output
PHZ
t
,
5.0
10
15
−
−
−
34
20
15
90
45
35
(V v 10 Vdc, R = 10 kW)
PLZ
in
L
t
,
PZH
t
PZL
Crosstalk, Control to Output (V = 0 Vdc)
9
−
5.0
10
15
−
−
−
30
50
100
−
−
−
mV
dB
SS
(V = V , R = 10 kW, R = 10 kW,
C
DD
in
out
f = 1.0 kHz)
Crosstalk between any two switches (V = 0 Vdc)
−
−
−
5.0
−
– 80
−
SS
(R = 1.0 kW, f = 1.0 MHz,
L
V
out1
V
out2
crosstalk + 20log
)
10
Noise Voltage (V = 0 Vdc)
10,11
5.0
10
15
−
−
−
24
25
30
−
−
−
nV/√Cycle
SS
(V = V , f = 100 Hz)
C
DD
(V = V , f = 100 kHz)
5.0
10
15
−
−
−
12
12
15
−
−
−
C
DD
Second Harmonic Distortion (V = – 5.0 Vdc)
−
−
−
5.0
−
0.16
−
%
SS
(V = 1.77 Vdc, RMS Centered @ 0.0 Vdc,
in
R = 10 kW, f = 1.0 kHz)
L
Insertion Loss (V = V , V = 1.77 Vdc,
12
5.0
dB
C
DD
in
V
= − 5.0 Vdc, RMS centered = 0.0 Vdc, f = 1.0 MHz)
SS
V
V
out
in
I
+ 20log
)
loss
10
−
−
−
−
2.3
0.2
0.1
−
−
−
−
(R = 1.0 kW)
(R = 10 kW)
(R = 100 kW)
L
L
0.05
L
(R = 1.0 MW)
L
Bandwidth (− 3.0 dB)
(V = V , V = 1.77 Vdc, V = − 5.0 Vdc,
12,13
BW
5.0
5.0
MHz
kHz
C
DD
in
SS
RMS centered @ 0.0 Vdc)
(R = 1.0 kW)
−
−
−
−
54
40
38
37
−
−
−
−
L
(R = 10 kW)
L
(R = 100 kW)
L
(R = 1.0 MW)
L
OFF Channel Feedthrough Attenuation
(V = − 5.0 Vdc)
−
−
SS
V
V
out
in
+ –50dB)
(V = V , 20 log
C 10
SS
−
−
−
−
1250
140
18
−
−
−
−
(R = 1.0 kW)
L
(R = 10 kW)
L
(R = 100 kW)
L
2.0
(R = 1.0 MW)
L
4. The formulas given are for typical characteristics only at 25_C.
5. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
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4
MC14016B
V
C
I
S
V
in
V
out
V : V is raised from V until V = V .
IL
C
SS
C
IL
V : at V = V : I = ±10 mA with V = V , V = V or V = V , V = V
.
IL
C
IL
S
in
SS
out
DD
in
DD
out
SS
V
: When V = V to V , the switch is ON and the R
specifications are met.
ON
IH
C
IH
DD
Figure 1. Input Voltage Test Circuit
10,000
V
= 15 Vdc
10 Vdc
5.0 Vdc
DD
V
T = 25°C
A
DD
1000
100
I
D
V
V
out
DD
TO ALL
4 CIRCUITS
10 k
10
PULSE
GENERATOR
CONTROL
INPUT
f
c
V
V
in
1.0
SS
5.0ꢀk 10ꢀk
100ꢀk
1.0ꢀM
10ꢀM
50ꢀM
P = V x I
D
D
DD
f , FREQUENCY (Hz)
c
Figure 2. Quiescent Power Dissipation
Test Circuit
Figure 3. Typical Power Dissipation per Circuit
(1/4 of device shown)
TYPICAL R versus INPUT VOLTAGE
ON
700
600
700
R = 10 kW
L
V
= 0 Vdc
SS
T = 25°C
A
600
500
400
300
200
R = 10 kW
L
T = 25°C
A
500
400
300
200
V = V = 5.0 Vdc
C
DD
= −5.0 Vdc
V = V = 10 Vdc
C DD
V
SS
V = V = 15 Vdc
DD
C
V = V = 7.5 Vdc
C
DD
= −7.5 Vdc
V
SS
100
0
100
0
−10 −8.0
−4.0
0
4.0
8.0 10
0
2.0
6.0
10
14
18
20
V , INPUT VOLTAGE (Vdc)
in
V , INPUT VOLTAGE (Vdc)
in
Figure 4. VSS = − 5.0 V and − 7.5 V
Figure 5. VSS = 0 V
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5
MC14016B
V
V
out
R
C
L
L
in
V
out
20 ns
20 ns
V
R
DD
SS
L
90%
50%
V
in
V
C
10%
V
t
t
PHL
PLH
50%
V
out
V
in
Figure 6. RON Characteristics
Test Circuit
Figure 7. Propagation Delay Test Circuit
and Waveforms
V
out
V
R
C
L
C
L
V
V
in
X
20 ns
V
V
DD
SS
V
V
out
90%
50%
V
C
10%
10 k
15 pF
V
C
t
t
PHZ
PZH
V
= V
DD
V = V
in
90%
x
SS
V
V
10%
out
in
t
t
PZL
PLZ
1 k
90%
out
V
in
= V
SS
V = V
10%
x
DD
Figure 8. Turn−On Delay Time Test Circuit
Figure 9. Crosstalk Test Circuit
and Waveforms
35
30
V
= 15 Vdc
DD
25
20
15
10
5.0
10 Vdc
5.0 Vdc
OUT
IN
QUAN−TECH
MODEL
2283
V = V
C
DD
OR EQUIV
0
10
100
1.0ꢀk
f, FREQUENCY (Hz)
10 k
100 k
Figure 10. Noise Voltage Test Circuit
Figure 11. Typical Noise Characteristics
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6
MC14016B
2.0
R = 1 MW AND 100 kW
L
0
−2.0
−4.0
10 kW
1.0
k
−3.0 dB (R = 1.0 MW )
L
V
out
−3.0 dB (R = 10 kW )
L
R
−6.0
−8.0
L
V
C
−3.0 dB (R = 1.0 kW )
L
+ 2.5 Vdc
0.0 Vdc
−10
−12
V
in
− 2.5 Vdc
10 k
100 k
1.0ꢀM
10 M
100 M
f , INPUT FREQUENCY (Hz)
in
Figure 12. Typical Insertion Loss/Bandwidth
Characteristics
Figure 13. Frequency Response Test Circuit
ON SWITCH
CONTROL
SECTION
OF IC
LOAD
V
SOURCE
Figure 14. DV Across Switch
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7
MC14016B
APPLICATIONS INFORMATION
Figure A illustrates use of the Analog Switch. The 0−to−5 V
The example shows a 5 V
signal which allows no
p−p
Digital Control signal is used to directly control a 5 V
analog signal.
margin at either peak. If voltage transients above V
p−p
DD
and/or below V are anticipated on the analog channels,
SS
The digital control logic levels are determined by V
external diodes (D ) are recommended as shown in Figure
DD
x
and V . The V voltage is the logic high voltage; the V
B. These diodes should be small signal types able to absorb
the maximum anticipated current surges during clipping.
The absolute maximum potential difference between
SS
DD
SS
voltage is logic low. For the example, V = +5 V logic high
DD
at the control inputs; V = GND = 0 V logic low.
SS
The maximum analog signal level is determined by V
V
and V is 18.0 V. Most parameters are specified up to
DD SS
DD
and V . The analog voltage must not swing higher than
15 V which is the recommended maximum difference
SS
V
or lower than V
.
SS
between V and V .
DD
DD
SS
+5 V
V
V
SS
DD
+5.0 V
5 V
SWITCH
IN
p−p
+5 V
ANALOG SIGNAL
5 V
SWITCH
OUT
p−p
+2.5 V
GND
ANALOG SIGNAL
EXTERNAL
CMOS
DIGITAL
0−TO−5 V DIGITAL
CONTROL SIGNALS
MC14016B
CIRCUITRY
Figure A. Application Example
V
V
DD
DD
D
D
D
D
x
x
x
SWITCH
IN
SWITCH
OUT
x
V
V
SS
SS
Figure B. External Germanium or Schottky Clipping Diodes
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8
MC14016B
PACKAGE DIMENSIONS
PDIP−14
CASE 646−06
ISSUE P
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
14
1
8
7
B
INCHES
MILLIMETERS
A
F
DIM
A
B
C
D
F
MIN
MAX
0.770
0.260
0.185
0.021
0.070
MIN
18.16
6.10
3.69
0.38
1.02
MAX
19.56
6.60
4.69
0.53
1.78
0.715
0.240
0.145
0.015
0.040
L
N
C
G
H
J
K
L
M
N
0.100 BSC
2.54 BSC
0.052
0.008
0.115
0.290
−−−
0.095
0.015
0.135
0.310
10
1.32
0.20
2.92
7.37
−−−
0.38
2.41
0.38
3.43
7.87
10
−T−
SEATING
PLANE
J
_
_
K
0.015
0.039
1.01
D 14 PL
H
G
M
M
0.13 (0.005)
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9
MC14016B
PACKAGE DIMENSIONS
SOIC−14
CASE 751A−03
ISSUE H
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−A−
14
8
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
−B−
P 7 PL
M
M
B
0.25 (0.010)
7
1
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
F
R X 45
_
C
A
B
C
D
F
G
J
K
M
P
R
8.55
3.80
1.35
0.35
0.40
8.75 0.337 0.344
4.00 0.150 0.157
1.75 0.054 0.068
0.49 0.014 0.019
1.25 0.016 0.049
0.050 BSC
0.25 0.008 0.009
0.25 0.004 0.009
−T−
SEATING
PLANE
J
M
K
1.27 BSC
D 14 PL
0.19
0.10
0
M
S
S
0.25 (0.010)
T B
A
7
0
7
_
_
_
_
5.80
0.25
6.20 0.228 0.244
0.50 0.010 0.019
SOLDERING FOOTPRINT*
7X
7.04
14X
1.52
1
14X
0.58
1.27
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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10
MC14016B
PACKAGE DIMENSIONS
SOEIAJ−14
CASE 965−01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
L
14
8
E
Q
1
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
H
E
E
_
M
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
L
7
1
DETAIL P
Z
D
MILLIMETERS
INCHES
MIN MAX
−−− 0.081
VIEW P
DIM MIN
MAX
2.05
0.20
0.50
0.20
10.50
5.45
A
e
A
−−−
0.05
0.35
0.10
9.90
5.10
c
A
1
b
c
0.002
0.008
0.020
0.008
0.413
0.215
0.014
0.004
0.390
0.201
D
E
e
b
A
1
1.27 BSC
0.050 BSC
H
M
7.40
0.50
1.10
8.20
0.85
1.50
0.291
0.020
0.043
0.323
0.033
0.059
0.13 (0.005)
E
0.10 (0.004)
0.50
L
E
M
0
0.70
−−−
10
10
0.035
−−− 0.056
0
0.028
_
_
_
_
Q
1
0.90
1.42
Z
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