MC100E452FNR2 [ONSEMI]
5V ECL 5-Bit Differential Register; 5V ECL 5位差分注册
| 型号： | MC100E452FNR2 |
| 厂家： | 
ONSEMI |
| 描述： | 5V ECL 5-Bit Differential Register |
| 文件： | 总8页 (文件大小：136K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC10E452, MC100E452
5VꢀECL 5-Bit Differential
Register
Description
The MC10E/100E452 is a 5-bit differential register with differential
data (inputs and outputs) and clock. The registers are triggered by a
positive transition of the positive clock (CLK) input. A high on the
Master Reset (MR) asynchronously resets all registers so that the Q
outputs go LOW.
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PLCC−28
The differential input structures are clamped so that the inputs of
unused registers can be left open without upsetting the bias network of
the device. The clamping action will assert the D and the CLK sides of
the inputs. Because of the edge triggered flip-flop nature of the device
simultaneously opening both the clock and data inputs will result in an
output which reaches an unidentified but valid state. Note that the
FN SUFFIX
CASE 776
MARKING DIAGRAM*
1 28
input clamps only operate when both inputs fall to 2.5 V below V
.
CC
The fully differential design of the device makes it ideal for very
high frequency applications where a registered data path is necessary.
MCxxxE452FNG
AWLYYWW
The V pin, an internally generated voltage supply, is available to
BB
this device only. For single-ended input conditions, the unused
differential input is connected to V as a switching reference voltage.
BB
V
BB
may also rebias AC coupled inputs. When used, decouple V
BB
and V via a 0.01 mF capacitor and limit current sourcing or sinking
CC
xxx
A
WL
YY
WW
G
= 10 or 100
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
to 0.5 mA. When not used, V should be left open.
BB
The 100 Series contains temperature compensation.
Features
• Differential D, CLK and Q; V Reference Available
BB
• 1100 MHz Min. Toggle Frequency
• Asynchronous Master Reset
*For additional marking information, refer to
Application Note AND8002/D.
• PECL Mode Operating Range: V = 4.2 V to 5.7 V
CC
with V = 0 V
EE
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
• NECL Mode Operating Range: V = 0 V
CC
with V = −4.2 V to −5.7 V
EE
• Internal Input 50 kW Pulldown Resistors, Output Q will Default to
3
Low State When Inputs Are Left Open
• ESD Protection: Human Body Model; > 2 kV
Machine Model; > 200 V
Charged Device Model; > 2 kV
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level:
Pb = 1
Pb−Free = 3
For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
• Transistor Count = 315 devices
• Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
November, 2006 − Rev. 11
MC10E452/D
MC10E452, MC100E452
D
3
D
3
D
4
D
4
V
Q
Q
4
CCO
4
Table 1. PIN DESCRIPTION
25
24
23
22
21
20
19
PIN
D[0:4], D[0:4]
MR
FUNCTION
ECL Differential Data Inputs
ECL Master Reset Input
ECL Differential Clock Input
ECL Differential Data Outputs
Reference Voltage Output
Positive Supply
18
17
Q
Q
V
MR 26
3
3
CLK 27
28
CLK, CLK
Q[0:4], Q[0:4]
CLK
16
15
CC
1
V
V
Q
EE
2
2
V
V
V
BB
CC
EE
2
3
4
14
13
12
Q
BB
, V
CCO
D
2
2
Q
Q
1
1
Negative Supply
D
5
6
7
8
9
10
11
D
1
D
1
D
0
D
0
V
Q
Q
0
CCO
0
* All V and V
pins are tied together on the die.
CC
CCO
Warning: All V , V
, and V pins must be externally
CCO EE
CC
connected to Power Supply to guarantee proper operation.
Figure 1. Pinout: PLCC−28 (Top View)
D
D
0
D
D
Q
Q
Q
Q
0
0
0
R
R
D
D
1
Q
Q
1
1
1
D
D
2
Q
Q
Q
Q
Q
D
D
D
2
2
2
R
R
R
D
3
D
3
Q
Q
3
3
D
4
D
4
Q
Q
4
4
CLK
CLK
MR
V
BB
Figure 2. Logic Diagram
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2
MC10E452, MC100E452
Table 2. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
= 0 V
Condition 2
Rating
Unit
V
V
V
V
PECL Mode Power Supply
NECL Mode Power Supply
V
V
8
CC
EE
I
EE
CC
= 0 V
−8
V
PECL Mode Input Voltage
NECL Mode Input Voltage
V
V
= 0 V
= 0 V
V v V
6
−6
V
V
EE
CC
I
CC
V w V
I
EE
I
I
Output Current
Continuous
Surge
50
100
mA
mA
out
V
Sink/Source
BB
± 0.5
mA
°C
BB
T
A
Operating Temperature Range
Storage Temperature Range
0 to +85
T
stg
−65 to +150
°C
q
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
PLCC−28
PLCC−28
63.5
43.5
°C/W
°C/W
JA
q
Thermal Resistance (Junction−to−Case)
Standard Board
PLCC−28
22 to 26
°C/W
°C
JC
T
sol
Wave Solder
Pb
Pb−Free
265
265
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 3. 10E SERIES PECL DC CHARACTERISTICS V
−40°C
= 5.0 V; V = 0.0 V (Note 1)
EE
CCx
0°C
Typ
74
25°C
85°C
Typ
74
Symbol
Characteristic
Min
Typ
Max
Min
Max
Min
Typ
Max
Min
Max Unit
89 mA
I
Power Supply Current
74
89
89
74
89
EE
V
V
V
V
Output HIGH Voltage
(Note 2)
3980 4070 4160 4020 4105 4190 4090 4185 4280 mV
3050 3210 3370 3050 3210 3370 3050 3227 3405 mV
3830 3995 4160 3870 4030 4190 3940 4110 4280 mV
3050 3285 3520 3050 3285 3520 3050 3302 3555 mV
OH
OL
IH
Output LOW Voltage
(Note 2)
Input HIGH Voltage
(Single−Ended)
Input LOW Voltage (Single−
Ended)
IL
V
V
Output Voltage Reference
3.57
3.7
3.62
2.2
3.74 3.65
3.75 3.69
3.81
4.6
V
V
BB
Input HIGH Voltage Com-
mon Mode Range (Differen-
tial Configuration) (Note 3)
4.6
2.2
4.6
2.2
IHCMR
I
I
Input HIGH Current
Input LOW Current
150
150
150
150
mA
mA
IH
IL
0.5
0.3
0.5
0.25
0.3
0.2
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V . V can vary −0.46 V / +0.06 V.
CC
EE
2. Outputs are terminated through a 50 W resistor to V − 2.0 V.
CC
3. V
min varies 1:1 with V , max varies 1:1 with V
.
IHCMR
EE
CC
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3
MC10E452, MC100E452
Table 4. 10E SERIES NECL DC CHARACTERISTICS V
−40°C
= 0.0 V; V = −5.0 V (Note 4)
EE
CCx
0°C
Typ
74
25°C
Typ
74
85°C
Typ
74
Symbol
Characteristic
Min
Typ
Max
Min
Max
89
Min
Max
89
Min
Max Unit
I
EE
Power Supply Current
74
89
89
mA
mV
V
Output HIGH Voltage
(Note 5)
−1020 −930
−840
−980
−895
−810
−910
−815
−720
OH
V
Output LOW Voltage
(Note 5)
−1950 −1790 −1630 −1950 −1790 −1630 −1950 −1773 −1595
−1170 −1005 −840 −1130 −970 −810 −1060 −890 −720
−1950 −1715 −1480 −1950 −1715 −1480 −1950 −1698 −1445
mV
mV
mV
OL
V
Input HIGH Voltage
(Single−Ended)
IH
V
IL
Input LOW Voltage
(Single−Ended)
V
Output Voltage Reference
−1.43
−1.3
−1.38
−2.8
−1.27 −1.35
−1.25 −1.31
−1.19
−0.4
V
V
BB
V
Input HIGH Voltage
Common Mode Range
(Differential Configuration)
(Note 6)
−0.4
−2.8
−0.4
−2.8
IHCMR
I
Input HIGH Current
Input LOW Current
150
150
150
150
mA
mA
IH
I
IL
0.5
0.3
0.5
0.065
0.3
0.2
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
4. Input and output parameters vary 1:1 with V . V can vary −0.46 V / +0.06 V.
CC
EE
5. Outputs are terminated through a 50 W resistor to V − 2.0 V.
CC
6. V
min varies 1:1 with V , max varies 1:1 with V
.
IHCMR
EE
CC
Table 5. 100E SERIES PECL DC CHARACTERISTICS V
−40°C
= 5.0 V; V = 0.0 V (Note 7)
EE
CCx
0°C
Typ
74
25°C
Typ
74
85°C
Typ
85
Symbol
Characteristic
Min
Typ
Max
Min
Max
Min
Max
Min
Max Unit
102 mA
I
Power Supply Current
74
89
89
89
EE
V
V
V
V
Output HIGH Voltage
(Note 8)
3975 4050 4120 3975 4050 4120 3975 4050 4120 mV
3190 3295 3380 3190 3255 3380 3190 3260 3380 mV
3835 3975 4120 3835 3975 4120 3835 3975 4120 mV
3190 3355 3525 3190 3355 3525 3190 3355 3525 mV
OH
OL
IH
Output LOW Voltage
(Note 8)
Input HIGH Voltage
(Single−Ended)
Input LOW Voltage
(Single−Ended)
IL
V
V
Output Voltage Reference
3.62
3.74 3.62
2.2
3.74 3.62
3.74 3.62
3.74
4.6
V
V
BB
Input HIGH Voltage Com-
mon Mode Range (Differ-
ential Configuration)
(Note 9)
4.6
2.2
4.6
2.2
IHCMR
I
I
Input HIGH Current
Input LOW Current
150
0.5
150
150
150
mA
mA
IH
IL
0.3
0.5
0.25
0.5
0.2
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
7. Input and output parameters vary 1:1 with V . V can vary −0.46 V / +0.8 V.
CC
EE
8. Outputs are terminated through a 50 W resistor to V − 2.0 V.
CC
9. V
min varies 1:1 with V , max varies 1:1 with V
.
IHCMR
EE
CC
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4
MC10E452, MC100E452
Table 6. 100E SERIES NECL DC CHARACTERISTICS V
−40°C
= 0.0 V; V = −5.0 V (Note 10)
EE
CCx
0°C
Typ
74
25°C
Typ
74
85°C
Typ
85
Symbol
Characteristic
Min Typ Max
Min
Max
Min
Max
Min
Max Unit
I
EE
Power Supply Current
74
89
89
89
102
mA
mV
V
Output HIGH Voltage
(Note 11)
−1025 −950
−880 −1025 −950
−880 −1025 −950
−880
OH
V
Output LOW Voltage
(Note 11)
−1810 −1705 −1620 −1810 −1745 −1620 −1810 −1740 −1620
−1165 −1025 −880 −1165 −1025 −880 −1165 −1025 −880
−1810 −1645 −1475 −1810 −1645 −1475 −1810 −1645 −1475
mV
mV
mV
OL
V
Input HIGH Voltage
(Single−Ended)
IH
V
IL
Input LOW Voltage
(Single−Ended)
V
Output Voltage Reference
−1.38
−1.26 −1.38
−2.8
−1.26 −1.38
−1.26 −1.38
−1.26
−0.4
V
V
BB
V
Input HIGH Voltage Common
Mode Range
−0.4
−2.8
−0.4
−2.8
IHCMR
(Differential Configuration)
(Note 12)
I
Input HIGH Current
Input LOW Current
150
0.5
150
150
150
mA
mA
IH
I
IL
0.3
0.5
0.25
0.5
0.2
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification
limit values are applied individually under normal operating conditions and not valid simultaneously.
10.Input and output parameters vary 1:1 with V . V can vary −0.46 V / +0.8 V.
CC
EE
11. Outputs are terminated through a 50 W resistor to V − 2.0 V.
CC
12.V
min varies 1:1 with V , max varies 1:1 with V
.
IHCMR
EE
CC
Table 7. AC CHARACTERISTICS V
= 5.0 V; V = 0.0 V or V
= 0.0 V; V = −5.0 V (Note 13)
CCx
EE
CCx
EE
−40°C
25°C
85°C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
GHz
ps
f
Maximum Toggle Frequency
1.1
1.1
1.1
MAX
t
t
Propagation Delay to Output CLK (Diff)
425
375
375
600
600
625
850
900
900
475
425
425
600
600
625
800
850
900
475
425
425
600
600
625
800
850
900
PLH
PHL
CLK (SE)
MR
t
t
t
t
Setup Time
D
D
175
225
750
−50
50
150
200
700
−50
50
150
200
700
−50
50
ps
ps
S
Hold Time
H
Reset Recovery Time
Minimum Pulse Width
450
450
450
RR
PW
CLK
MR
400
400
400
400
400
400
ps
t
Within-Device Skew (Note 14)
Random Clock Jitter (RMS)
50
50
ps
ps
skew
t
< 1.0
< 1.0
< 1.0
JITTER
V
Input Voltage Swing
150
250
1000
725
150
1000
150
275
1000
675
mV
PP
(Differential Configuration)
t /t
r
Rise/Fall Times 20−80%
475
475
ps
f
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
13.10 Series: V can vary −0.46 V / +0.06 V.
EE
100 Series: V can vary −0.46 V / +0.8 V.
EE
14.Within-device skew is defined as identical transitions on similar paths through a device.
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5
MC10E452, MC100E452
Z = 50 W
Q
Q
D
D
o
Receiver
Device
Driver
Device
Z = 50 W
o
50 W
50 W
V
TT
V
= V − 2.0 V
TT
CC
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
ORDERING INFORMATION
†
Device
Package
Shipping
MC10E452FN
PLCC−28
37 Units / Rail
37 Units / Rail
MC10E452FNG
PLCC−28
(Pb−Free)
MC10E452FNR2
PLCC−28
500 / Tape & Reel
500 / Tape & Reel
MC10E452FNR2G
PLCC−28
(Pb−Free)
MC100E452FN
PLCC−28
37 Units / Rail
37 Units / Rail
MC100E452FNG
PLCC−28
(Pb−Free)
MC100E452FNR2
MC100E452FNR2G
PLCC−28
500 / Tape & Reel
500 / Tape & Reel
PLCC−28
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D
AND8002/D
AND8020/D
AND8066/D
AND8090/D
−
−
−
−
−
−
−
−
−
−
−
ECL Clock Distribution Techniques
Designing with PECL (ECL at +5.0 V)
ECLinPSt I/O SPiCE Modeling Kit
Metastability and the ECLinPS Family
Interfacing Between LVDS and ECL
The ECL Translator Guide
Odd Number Counters Design
Marking and Date Codes
Termination of ECL Logic Devices
Interfacing with ECLinPS
AC Characteristics of ECL Devices
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MC10E452, MC100E452
PACKAGE DIMENSIONS
PLCC−28
FN SUFFIX
PLASTIC PLCC PACKAGE
CASE 776−02
ISSUE E
M
S
S
0.007 (0.180)
T
L−M
N
B
Y BRK
D
−N−
M
S
S
N
0.007 (0.180)
T
L−M
U
Z
−M−
−L−
W
D
S
S
S
N
0.010 (0.250)
T
L−M
X
G1
V
28
1
VIEW D−D
M
S
S
S
A
0.007 (0.180)
0.007 (0.180)
T
L−M
L−M
N
M
S
S
N
0.007 (0.180)
T
L−M
H
Z
M
S
T
N
R
K1
C
E
0.004 (0.100)
G
K
SEATING
PLANE
−T−
J
M
S
S
N
0.007 (0.180)
T
L−M
F
VIEW S
G1
S
S
S
N
0.010 (0.250)
T
L−M
VIEW S
NOTES:
INCHES
MILLIMETERS
1. DATUMS −L−, −M−, AND −N− DETERMINED
WHERE TOP OF LEAD SHOULDER EXITS
PLASTIC BODY AT MOLD PARTING LINE.
2. DIMENSION G1, TRUE POSITION TO BE
MEASURED AT DATUM −T−, SEATING PLANE.
3. DIMENSIONS R AND U DO NOT INCLUDE
MOLD FLASH. ALLOWABLE MOLD FLASH IS
0.010 (0.250) PER SIDE.
4. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
5. CONTROLLING DIMENSION: INCH.
6. THE PACKAGE TOP MAY BE SMALLER THAN
THE PACKAGE BOTTOM BY UP TO 0.012
(0.300). DIMENSIONS R AND U ARE
DETERMINED AT THE OUTERMOST
EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR
BURRS, GATE BURRS AND INTERLEAD
FLASH, BUT INCLUDING ANY MISMATCH
BETWEEN THE TOP AND BOTTOM OF THE
PLASTIC BODY.
DIM MIN
MAX
0.495
0.495
0.180
0.110
0.019
MIN
12.32
12.32
4.20
MAX
12.57
12.57
4.57
A
B
C
E
F
0.485
0.485
0.165
0.090
0.013
2.29
0.33
2.79
0.48
G
H
J
0.050 BSC
1.27 BSC
0.026
0.020
0.025
0.450
0.450
0.042
0.042
0.042
0.032
−−−
−−−
0.66
0.51
0.64
11.43
11.43
1.07
1.07
1.07
−−−
0.81
−−−
K
R
U
V
W
X
Y
Z
−−−
0.456
0.456
0.048
0.048
0.056
11.58
11.58
1.21
1.21
1.42
0.50
10
−−− 0.020
10
2
2
_
_
_
_
G1 0.410
K1 0.040
0.430
−−−
10.42
1.02
10.92
−−−
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H
DIMENSION TO BE GREATER THAN 0.037
(0.940). THE DAMBAR INTRUSION(S) SHALL
NOT CAUSE THE H DIMENSION TO BE
SMALLER THAN 0.025 (0.635).
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7
MC10E452, MC100E452
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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Phone: 81−3−5773−3850
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MC10E452/D
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