LC898262XHTBG [ONSEMI]

New Closed Loop Auto Focus Driver;
LC898262XHTBG
型号: LC898262XHTBG
厂家: ONSEMI    ONSEMI
描述:

New Closed Loop Auto Focus Driver

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DATA SHEET  
www.onsemi.com  
New Closed Loop Auto  
Focus (AF) Driver  
LC898262XHTBG  
WLCSP10 0.77x2.27x0.33  
CASE 567YK  
Overview  
MARKING DIAGRAM  
This LSI is New Closed Loop Auto Focus control LSI. It consists of  
sensorless damping control function, temperature compensation  
function, and bidirection constant current driver.  
898262XH  
AWLYYWW  
Features  
Builtin Equalizer Circuit Using Digital Operation  
Sensorless Damping Control Function  
Any Coefficient can be Specified by 2wire Serial I/F (TWIF)  
Temperature Compensation Function  
A
= Assembly Location  
= Wafer Lot  
= Year  
WL  
YY  
WW  
= Work Week  
2wire Serial Interface (The Communication Protocol is Compatible  
2
with I C.)  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 10 of  
this data sheet.  
8 Selectable Slave Addresses  
50h (W) / 51h (R)  
74h (W) / 75h (R)  
E8h (W) / E9h (R)  
E4h (W) / E5h (R) [Factoryconfigured]  
Other 4 Addresses can be Selected  
Digital Gyro I/F (SPI Master / Slave)  
Builtin A/D Converter  
Builtin D/A Converter  
Builtin Amplifier  
Builtin EEPROM  
64 byte (16 byte/Page)  
Builtin OSC  
Builtin BiDirection Constant Current Driver  
130 mA  
150 mA (High Current Mode)  
Package  
WLCSP 10pin (2 x 5 Pin), Thickness Max 0.35 mm, with  
Backside Coat  
PbFree, Halogen Free/BFR Free and RoHS Compliant  
Supply Voltage  
VDD (2.6 V to 3.3 V)  
IOVDD (1.7 V to 3.3 V)  
© Semiconductor Components Industries, LLC, 2020  
1
Publication Order Number:  
August, 2021 Rev. 1  
LC898262XHTBG/D  
LC898262XHTBG  
PIN DESCRIPTION  
Table 1. PIN DESCRIPTION  
Symbol  
Description  
I
O
Input  
Output  
P
Power supply, GND  
Not connect  
Bidirection  
NC  
B
2wire serial interface  
SCL  
SDA  
I
B
2wire serial interface clock pin  
2wire serial interface data pin  
Digital gyro interface  
SSB  
SCLK  
SDIO  
B
B
B
Digital Gyro Data I/F Chip Select  
Digital Gyro Data I/F Clock  
Digital Gyro Data I/F Data InOut  
Driver interface  
OUT1  
OUT2  
O
O
Driver output (to Actuator)  
Driver output (to Actuator)  
Power supply pin  
VDD  
VSS  
P
P
Power Supply  
GND  
IOVDD P  
I/O Power of Digital Gyro Data I/F (1.7 V to 3.3 V)  
*Process When Pins Are Not Used  
PIN TYPE “O” – Ensure that it is set to OPEN.  
PIN TYPE “I” – OPEN is inhibited. Ensure that it is connected to the VDD or VSS even when it is unused.  
(Please contact onsemi for more information about selection of VDD or VSS)  
PIN TYPE “B” – If you are unsure about processing method on the pin description of pin layout table, please contact us  
Note that incorrect processing of unused pins may result in defects.  
www.onsemi.com  
2
LC898262XHTBG  
PIN LAYOUT  
Circuit Name  
Number of PINs  
Driver  
Power  
2
3
2
I/O (VDD)  
I/O (IOVDD)  
3
B
A
A
B
5
4
3
2
1
SCLK  
SDIO  
5
4
3
2
1
SDIO  
SCLK  
IOVDD  
SDA  
SSB  
SCL  
SSB  
SCL  
IOVDD  
SDA  
OUT2  
VSS  
OUT1  
VDD  
OUT1  
VDD  
OUT2  
VSS  
Bottom View  
Top View  
Figure 1. Pin Layout  
www.onsemi.com  
3
LC898262XHTBG  
BLOCK DIAGRAM  
VDD  
SDA  
SCL  
2Wire Serial I/F  
EEPROM  
SSB  
SCLK  
SDIO  
SPI  
(Digital Gyro I /F)  
Control Logic  
IOVDD  
OUT1  
OUT2  
Constant Current  
Driver  
Damping Control,  
Fast Settling Time Function  
And Correction Functions  
VDD  
VSS  
more than or  
equal to 0.1 mF (*)  
Temperature  
Sensor  
OSC  
POR  
LDO  
*Consider capacitance of capacitor between VDD and VSS. According to power source environment, attach an additional capacitor in camera  
module.  
Figure 2. Block Diagram  
www.onsemi.com  
4
LC898262XHTBG  
ELECTRICAL CHARACTERISTICS  
Table 2. ABSOLUTE MAXIMUM RATINGS (VSS = 0 V)  
Symbol Parameter  
max  
Condition  
Ta 25°C  
Rating  
Unit  
V
V
DD  
Supply Voltage (VDD)  
0.3 to 4.6  
V 1 max, V 1 max  
Input/Output Voltage (SCL,SDA)  
Supply Voltage (IOVDD)  
Ta 25°C  
Ta 25°C  
Ta 25°C  
0.3 to V + 0.3  
V
I
O
DD  
V
IO  
max  
0.3 to 4.6  
V
V 2 max, V 2 max  
Input/Output Voltage (SSB,SCLK,SDIO)  
Storage Ambient Temperature  
Operating Ambient Temperature  
0.3 to V + 0.3  
V
I
O
IO  
Tstg  
Topr  
55 to +125  
30 to +70  
°C  
°C  
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality  
should not be assumed, damage may occur and reliability may be affected.  
Table 3. RECOMMENDED OPERATING CONDITIONS (TA = 30 to +70°C, VSS = 0 V)  
Symbol  
Parameter  
Min  
2.6  
0
Max  
2.8  
Max  
Unit  
V
V
DD  
Supply Voltage (VDD)  
3.3  
V 1  
I
Input Voltage Range (SCL,SDA)  
Supply Voltage (IOVDD)  
V
DD  
V
V
IO  
1.7  
0
1.8  
3.3  
V
V 2  
I
Input Voltage Range (SSB,SCLK,SDIO)  
V
IO  
V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond  
the Recommended Operating Ranges limits may affect device reliability.  
Table 4. DC CHARACTERISTICS (VSS = 0 V, VDD = 2.6 V to 3.3 V, TA = 30 to +70°C)  
Symbol  
Parameter  
Condition  
Min  
Max  
Max  
Unit  
V
Applicable Pins  
V
IH  
1
Highlevel Input Voltage  
Lowlevel Input Voltage  
Lowlevel Output Voltage  
Highlevel Input Voltage  
Lowlevel Input Voltage  
Highlevel Output Voltage  
Lowlevel Output Voltage  
Pull Up Resistor  
CMOS schmitt  
1.4  
SCL, SDA  
V 1  
IL  
0.4  
V
V
OL  
1
IOL= 3 mA  
0.7 x V  
0.2  
V
SDA  
V
IH  
2
CMOS schmitt  
V
SSB, SCLK,  
SDIO  
IO  
V 2  
IL  
0.3 x V  
V
IO  
V
OH  
2
IOH= 3 mA  
V
0.2  
V
IO  
V
OL  
2
IOL= 3 mA  
0.2  
V
R
V
V
= 1.8 V  
= 1.8 V  
50  
50  
250  
250  
kW  
kW  
UP  
DN  
IO  
IO  
R
Pull Down Resistor  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
Table 5. DRIVER OUTPUT (OUT1, OUT2) (VSS = 0 V, VDD = 2.8 V, TA = 25°C)  
Symbol  
Ifull  
Parameter  
Maximum Current  
Maximum Current (High Current Mode)  
Condition  
Min  
123.5  
138  
Max  
130  
150  
Max  
136.5  
162  
Unit  
mA  
mA  
Applicable Pins  
OUT1, OUT2  
OUT1, OUT2  
IfullHC  
Table 6. NONVOLATILE MEMORY CHARACTERISICS  
Symbol  
EN  
Parameter  
Condition  
(Note 1)  
Min  
Max  
Max  
Unit  
Applicable Circuits  
Endurance  
1000  
Cycles  
Years  
ms  
EEPROM  
RT  
Data Retention  
Write Time  
10  
tWT  
20  
1. The number of write access executable times per page  
www.onsemi.com  
5
 
LC898262XHTBG  
AC CHARACTERISTICS  
VDD Supply Timing  
t2  
t3  
VDD  
Vbot  
t1  
SCL/SDA  
Figure 3. VDD Supply Timing  
It is available to use 2wire serial interface 5ms later for Power On Reset of VDD.  
Table 7. VDD SUPPLY TIMING  
Symbol  
Item  
Min  
Typ  
Max  
3
Unit  
ms  
ms  
ms  
V
t1  
t2  
VDD Turn On Time  
2wire Serial Interface Start Time from VDD On  
VDD Off Time  
5
t3  
100  
Vbot  
Bottom Voltage  
0.1  
Injection order between IOVDD and VDD is below.  
IOVDD  
tIOVD  
tVDIO  
VDD  
Figure 4. IOVDD Supply Timing  
Table 8. IOVDD SUPPLY TIMING  
Symbol  
Item  
Min  
0
Typ  
Max  
Unit  
ms  
tIOVD  
tVDIO  
IOVDD ON to VDD ON  
VDD OFF to IOVDD OFF  
0
ms  
At the time of power off, SCL, SDA, SCLK and SDIO tolerate 3.3 V input, and SSB pin needs to be low level.  
www.onsemi.com  
6
LC898262XHTBG  
AC Specification of TWIF  
Figure 5 shows interface timing definition and Table 9 shows electric characteristics  
VIH1min  
SDA  
VIL1max  
tBUF  
tHD,DAT tSU,DAT  
tSU,STA  
tHD,STA  
tf  
tLOW  
tr  
VIH1min  
SCL  
VIL1max  
tHD,STA  
tSU,STO  
Stop  
tr  
tf  
Start  
Condition  
Repeated  
Condition  
Start  
Condition Condition  
Figure 5. 2wire Serial Interface Timing Definition  
Table 9. 2WIRE SERIAL INTERFACE AC CHARACTERISTICS  
Fastmode  
Fastmode Plus  
Min Typ Max  
Pin  
Name  
Min  
Typ  
Max  
400  
Symbol  
FSCL  
Item  
SCL Clock Frequency  
Unit  
kHz  
ms  
SCL  
1000  
tHD,STA  
START Condition Hold Time  
SCL  
SDA  
0.6  
0.26  
tLOW  
tHIGH  
SCL Clock Low Period  
SCL  
SCL  
1.3  
0.6  
0.6  
0.5  
ms  
ms  
ms  
SCL Clock High Period  
0.26  
0.26  
tSU,STA  
Setup Time for Repetition START Condition  
SCL  
SDA  
tHD,DAT  
tSU,DAT  
tr  
Data Hold Time  
SCL  
SDA  
0
0.9  
0
ms  
ns  
ns  
ns  
ms  
ms  
(Note 2)  
(Note 2)  
Data Setup Time  
SCL  
SDA  
100  
50  
SDA, SCL Rising Time  
SDA, SCL Falling Time  
STOP Condition Setup Time  
Bus Free Time between STOP and START  
SCL  
SDA  
300  
300  
120  
120  
tf  
SCL  
SDA  
tSU,STO  
tBUF  
SCL  
SDA  
0.6  
1.3  
0.26  
0.5  
SCL  
SDA  
2. This LSI is designed for a condition with typ. 20ns of hold time. If SDA signal is unstable around falling point of SCL signal, please implement  
an appropriate treatment on board, such as inserting a resistor.  
www.onsemi.com  
7
 
LC898262XHTBG  
AC Specification of Digital Gyro I/F (Master)  
Figure 6 shows interface timing definition and Table 10 shows electric characteristics.  
VIH2min  
VIL2max  
SSB  
tSSBhw  
tSSBs  
tSSBh  
VIH2min  
SCLK  
VIL2max  
tSDIs  
tSDIh  
tSDOd  
tSDOz  
VIH2min  
VIL2max  
SDIO  
OUT  
IN  
OUT  
Data  
Direction  
Figure 6. Digital Gyro interface (Master) Timing Definition  
Table 10. DIGITAL GYRO INTERFACE(MASTER) AC CHARACTERISTICS  
Symbol  
FSCLK  
fSCLKdu  
tSSBhw  
tSSBs  
Item  
SCLK Clock Frequency  
Pin Name  
SCLK  
Min  
3.8  
40  
Typ  
4
Max  
Unit  
4.2  
60  
MHz  
%
SCLK Duty  
SCLK  
SSB High Period  
SSB  
1.35  
50  
ms  
Setup Time for SCLK (F) of SSB  
SSB  
SCLK  
ns  
tSSBh  
tSDIs  
tSDIh  
tSDOz  
tSDOd  
Cld  
Hold Time for SCLK (R) of SSB  
Setup Time for SCLK (R) of SDIO  
Hold Time for SCLK (R) of SDIO  
Delay Time from SCLK (F) to SDIO Invalid  
Delay Time from SSB (R) to SDIO Update  
Load Capacitance  
SCLK  
SSB  
160  
50  
50  
ns  
ns  
ns  
ns  
ns  
pF  
SCLK  
SDIO  
SCLK  
SDIO  
SCLK  
SDIO  
20  
20  
10  
SSB  
SDIO  
all  
www.onsemi.com  
8
 
LC898262XHTBG  
AC Specification of Digital Gyro I/F (Slave)  
Figure 7 shows interface timing definition and Table 11 shows electric characteristics.  
VIH2min  
VIL2max  
SSB  
tSSBhw  
tSSBs  
tSSBh  
VIH2min  
SCLK  
VIL2max  
tSDIs  
tSDIh  
tSDOz  
tSDOd  
VIH2min  
VIL2max  
SDIO  
IN  
OUT  
IN  
Data  
Direction  
Figure 7. Digital Gyro Interface (Slave) Timing Definition  
Table 11. DIGITAL GYRO INTERFACE(SLAVE) AC CHARACTERISTICS  
Symbol  
FSCLK  
fSCLKdu  
tSSBhw  
tSSBs  
Item  
SCLK Clock Frequency  
Pin Name  
SCLK  
Min  
Typ  
Max  
Unit  
MHz  
%
10  
70  
SCLK Duty  
SCLK  
30  
SSB High Period  
SSB  
100  
10  
ns  
Setup Time for SCLK (F) of SSB  
SSB  
SCLK  
ns  
tSSBh  
tSDIs  
tSDIh  
tSDOd  
tSDOz  
Cld  
Hold Time for SCLK (R) of SSB  
Setup Time for SCLK (R) of SDIO  
Hold Time for SCLK (R) of SDIO  
Delay Time from SCLK (F) to SDIO Update  
Delay Time from SSB (R) to SDIO Invalid  
Load Capacitance  
SCLK  
SSB  
10  
10  
10  
ns  
ns  
ns  
ns  
ns  
pF  
SCLK  
SDIO  
SCLK  
SDIO  
SCLK  
SDIO  
20  
20  
10  
SSB  
SDIO  
all  
www.onsemi.com  
9
 
LC898262XHTBG  
ORDERING INFORMATION  
Device  
Package Type  
Shipping  
LC898262XHTBG  
WLCSP10 0.77x2.27x0.33  
4000 / Tape & Reel  
(PbFree)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
www.onsemi.com  
10  
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
WLCSP10 0.77x2.27x0.33  
CASE 567YK  
ISSUE A  
DATE 14 SEP 2020  
GENERIC  
MARKING DIAGRAM*  
XXXXXXX  
AWLYYWW  
XXXX = Specific Device Code  
A
= Assembly Location  
WL = Wafer Lot  
YY = Year  
WW = Work Week  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
PbFree indicator, “G” or microdot “G”, may  
or may not be present. Some products may  
not follow the Generic Marking.  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON12407H  
WLCSP10 0.77x2.27x0.33  
PAGE 1 OF 1  
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