LB11696V [ONSEMI]
Direct PWM Drive Brushless Motor Predriver IC;
| 型号： | LB11696V |
| 厂家： | 
ONSEMI |
| 描述： | Direct PWM Drive Brushless Motor Predriver IC 电动机控制 光电二极管 |
| 文件： | 总17页 (文件大小：526K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LB11696V
Monolithic Digital IC
Direct PWM Drive Brushless
Motor Predriver IC
www.onsemi.com
Overview
The LB11696V is a direct PWM drive predriver IC designed for three-
phase power brushless motors. A motor driver circuit with the desired
output power (voltage and current) can be implemented by adding
discrete transistors in the output circuits. Furthermore, the LB11696V
provides a full complement of protection circuits allowing it to easily
implement high-reliability drive circuits. This device is optimal for
driving all types of large-scale motors such as those used in air
conditioners and on-demand water heaters.
SSOP30 (275mil)
Features
Three-phase bipolar drive
Direct PWM drive (controlled either by control voltage or PWM variable duty pulse input)
Built-in forward/reverse switching circuit
Start/stop mode switching circuit (stop mode power saving function)
Built-in input amplifier
5 V regulator output (VREG pin)
Current limiter circuit (Supports 0.25 V (typical) reference voltage sensing based high-precision detection)
Undervoltage protection circuit (The operating voltage can be set with a zener diode)
Automatic recovery type constraint protection circuit with protection operating state discrimination output (RD pin)
Four types of Hall signal pulse outputs
Supports thermistor based thermal protection of the output transistors
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter
Symbol
Conditions
Ratings
unit
V
Supply voltage 1
V
I
max
V
pin
CC
18
30
CC
Output current
max
UL, VL, WL, UH, VH, and WH pins
LVS pin
mA
V
O
LVS pin applied voltage
Allowable power dissipation 1
Allowable power dissipation 2
LVS max
Pd max 1
Pd max 2
18
Independent IC
0.45
1.05
W
When mounted on a 114.3 76.1 1.6 mm glass
W
epoxy board
Operating temperature
Storage temperature
Topr
Tstg
–20 to +100
–55 to +150
C
C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
ORDERING INFORMATION
See detailed ordering and shipping information on page 17 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
March 2015 - Rev. 1
1
Publication Order Number :
LB11696V/D
LB11696V
Allowable Operating Ranges at Ta = 25 C
Parameter
Supply voltage range 1-1
Supply voltage range 1-2
Output current
Symbol
Conditions
Ratings
Unit
V
V
V
1-1
CC
1-2
CC
V
V
pin
8 to 17
CC
CC
pin, when V is shorted to VREG.
4.5 to 5.5
25
V
CC
I
UL, VL, WL, UH, VH, and WH pins
mA
O
5 V constant voltage output current
HP pin applied voltage
HP pin output current
IREG
VHP
IHP
0 to 17
0 to 15
0 to 17
0 to 15
V
mA
V
RD pin applied voltage
RD pin output current
VRD
IRD
mA
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
Electrical Characteristics at Ta = 25 C, VCC = 12 V
Ratings
Parameter
Symbol
Unit
min
typ
max
Current drain 1
Current drain 2
I
I
1
2
12
16
4
mA
mA
CC
2.5
CC
[5 V Constant Voltage Output (VREG pin)]
Output voltage
VREG
ΔVREG1
ΔVREG2
Δ
4.7
5.0
40
10
0
5.3
100
30
V
Line regulation
V
I
mV
mV
Load regulation
Temperature coefficient
[Output Block]
Output voltage 1-1
Output voltage 1-2
Output voltage 2
V
V
OUT
OUT
V
OUT
Output leakage current
[Hall Amplifier Block]
Input bias current
I leak
O
IHB (HA)
VICM2
Common-mode input voltage range 2
Hall Input Sensitivity
Hysteresis
ΔVIN (HA)
VSLH (HA)
VSHL (HA)
Input voltage low → high
Input voltage high → low
[CTL Amplifier]
Input offset voltage
Input bias current
V
(CTL)
IO
I
(CTL)
B
Common-mode input voltage range
High-level output voltage
Low-level output voltage
Open-loop gain
VICM
V
OH
V
OL
[PWM Oscillator (PWM pin)]
High-level output voltage
Low-level output voltage
External capacitor charge current
Oscillator frequency
Amplitude
V
(PWM)
(PWM)
OH
V
OL
ICHG
f (PWM)
VPWM = 2.1 V
C = 2000 pF
V (PWM)
[TOC pin]
Input voltage 1
VTOC1
VTOC2
Output duty: 100%
2.68
1.2
3.0
3.34
1.5
V
V
V
V
V
V
Input voltage 2
Output duty: 0%
1.35
2.82
1.29
3.18
1.44
Input voltage 1 low
Input voltage 2 low
Input voltage 1 high
Input voltage 2 high
[HP Pin]
VTOC1L
VTOC2L
VTOC1H
VTOC2H
Design target value, when VREG = 4.7 V, 100%
Design target value, when VREG = 4.7 V, 0%
Design target value, when VREG = 5.3 V, 100%
Design target value, when VREG = 5.3 V, 0%
2.68
1.23
3.02
1.37
2.96
1.34
3.34
1.50
Output saturation voltage
Output leakage current
VHPL
I
= 10 mA
0.2
0.5
10
V
O
IHPleak
V
= 18 V
μA
O
Continued on next page.
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2
LB11696V
Continued from preceding page.
Ratings
typ
Parameter
Symbol
Conditions
Unit
min
max
[CSD Oscillator (CSD pin)]
High-level output voltage
Low-level output voltage
External capacitor charge current
External capacitor discharge current
Charge/discharge current ratio
[RD Pin]
V
OH (CSD)
V
OL (CSD)
ICHG1
ICHG2
RCSD
VCSD = 2 V
VCSD = 2 V
(Charge current)/(discharge current)
times
Low-level output voltage
Output leakage current
[Current Limiter Circuit (RF pin)]
Limiter voltage
VRDL
IO = 10 mA
IL (RD)
VO = 18 V
VRF
RF-RFGND
[Undervoltage Protection Circuit (LVS pin)]
Operating voltage
VSDL
VSDH
VSD
Release voltage
Hysteresis
[PWMIN Pin]
Input frequency
f (PI)
kHz
High-level input voltage
Low-level input voltage
Input open voltage
V
IH (PI)
V
IL (PI)
V
IO (PI)
Hysteresis
V
IS (PI)
High-level input current
Low-level input current
[S/S Pin]
I
IH (PI)
VPWMIN = VREG
VPWMIN = 0 V
I
IL (PI)
μA
High-level input voltage
Low-level input voltage
Hysteresis
V
IH (SS)
V
IL (SS)
IS (SS)
IH (SS)
IL (SS)
V
High-level input current
Low-level input current
[F/R Pin]
I
VS/S = VREG
VS/S = 0 V
I
μA
High-level input voltage
Low-level input voltage
Input open voltage
V
IH (FR)
IL (FR)
IO (FR)
IS (FR)
IH (FR)
IL (FR)
V
V
Hysteresis
V
High-level input current
Low-level input current
[N1 Pin]
I
VF/R = VREG
VF/R = 0 V
I
μA
μA
μA
High-level input voltage
Low-level input voltage
Input open voltage
V
IH (N1)
IL (N1)
IO (N1)
IH (N1)
IL (N1)
V
V
High-level input current
Low-level input current
[N2 Pin]
I
VN1 = VREG
VN1 = 0 V
I
High-level input voltage
Low-level input voltage
Input open voltage
V
IH (N2)
IL (N2)
IO (N2)
IH (N2)
IL (N2)
V
V
High-level input current
Low-level input current
I
VN2 = VREG
VN2 = 0 V
I
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
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3
LB11696V
F/R = L
F/R = H
Output
1
2
3
4
5
6
H
H
H
L
L
L
H
L
L
L
H
H
L
L
H
H
H
L
VH
WH
WH
UH
UH
VH
UL
UL
VL
H
H
H
L
L
L
L
H
H
H
L
VL
L
H
H
L
WL
WL
L
H
L
S/S Pin
PWMIN Pin
Input state
State
Input state
State
H
L
Stop
Start
High or open Output off
Output on
L
N1 and N2 Pins
Input state
HP output
N1 pin
N2 pin
L
L
Single Hall sensor period divided by 2
Single Hall sensor period
L
High or open
L
High or open
High or open
Three Hall sensor synthesized period divided by 2
Three Hall sensor synthesized period
High or open
Since the S/S pin does not have an internal pull-up resistor, an external pull-up resistor or equivalent is required to set
the IC to the stop state. If either the S/S or PWMIN pins are not used, the unused pin input must be set to the low-level
voltage.
The HP output can be selected (by the N1 and N2 settings) to be one of the following four functions: the IN1 Hall input
converted to a pulse output (one-Hall output), the one-Hall output divided by two, the three-phase output synthesized
from the Hall inputs (three-Hall synthesized output) or the three-Hall synthesized output divided by two.
1.2
114.3mm × 76.1mm × 1.6mm glass epoxy board
1.05
1
0.8
0.6
Independent
0.45
0.42
0.4
0.2
0.18
0
0
20
40
60
80
100
120
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4
LB11696V
Package Dimensions
unit : mm
SSOP30 (275mil)
CASE 565AT
ISSUE A
SOLDERING FOOTPRINT*
(Unit: mm)
GENERIC
MARKING DIAGRAM*
XXXXXXXXXX
YMDDD
XXXXX = Specific Device Code
Y = Year
M = Month
0.65
0.32
DDD = Additional Traceability Data
NOTE: The measurements are not to guarantee but for reference only.
*This information is generic. Please refer to
device data sheet for actual part marking.
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
LB11696V
Pin Assignment
V
VREG LVS N2
N1
26
HP F/R PWMIN S/S CSD RD PWM TOC EI–
EI+
16
CC
30
29
28
27
25
24
23
22
21
20
19
18
17
LB11696V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
GND RFGND RF
WH
WL
VH
VL
UH
UL IN1– IN1+ IN2– IN2+ IN3– IN3+
Top view
Pin Functions
Pin No.
1
Symbol
Pin Description
Equivalent circuit
GND
Ground
VREG
Output current detection reference
Connect the ground terminal of the external resistor RF to
this pin.
RF
GND
2
2
VREG
Output current detection
Connect a resistor with a small value between this pin and
RFGND.
3
RF
3
This sets the maximum output current IOUT to be 0.25/Rf.
VCC
4
6
8
5
7
9
WH
VH
UH
WL
VL
Outputs (External transistor drive outputs)
The duty control applies to the UH, VH, and WH pins.
4
5
6
7
8
9
UL
50 kΩ
Continued on next page.
Page. 6
LB11696V
Continued from preceding page.
Pin No. Pin Name
Pin Description
Equivalent circuit
VCC
10
11
12
13
14
15
IN1–
IN1+
IN2–
IN2+
IN3–
IN3+
Hall sensor inputs
A high-level state is recognized when IN+ > IN–, and a
low-level state is recognized under the reverse condition.
If noise on the Hall sensor signals becomes a problem,
insert capacitors between the IN+ and IN– inputs.
300 Ω
300 Ω
10 12 14
11 13 15
VREG
Control amplifier inputs
The PWMIN pin must be held at the low level for control
using this pin to function.
16
17
EI+
EI–
300 Ω
300 Ω
16
17
VREG
Control amplifier output
When the TOC pin voltage rises, the IC changes the UH,
VH, and WH output signal PWM duty to increase the
torque output.
18
TOC
18
300 Ω
40 kΩ
VREG
Shared function pin: PWM oscillator frequency setting and
initial reset pulse generation
Insert a capacitor between this pin and ground.
A capacitor of 2000 pF sets a frequency of about 22 kHz.
200 Ω
19
PWM
19
2 kΩ
VREG
20
Motor constraint detection output
20
RD
This pin output is on when the motor is turning and off
when the constraint protection circuit operates.
Continued on next page.
Page. 7
LB11696V
Continued from preceding page.
Pin No. Pin Name
Pin Description
Equivalent circuit
VREG
Constraint protection circuit operating time setting
Insert a capacitor between this pin and ground.
This pin must be connected to ground if the constraint
protection circuit is not used.
300 Ω
21
22
23
CSD
21
VREG
Start/Stop input
A low-level input sets the IC to start mode, and a high-
level input sets it to stop mode.
3.5 kΩ
S/S
22
VREG
50 kΩ
PWM pulse input
A low-level input specifies the output drive state, and a
high-level or open input specifies the output off state.
When this pin is used for control, the TOC pin voltage
must be set to a control amplifier input that results in a
100% duty.
PWM
IN
3.5 kΩ
23
VREG
50 kΩ
3.5 kΩ
24
F/R
Forward/reverse input
24
VREG
25
Hall signal output (This is an open-collector output)
One of four output types is selected by the N1 and N2 pin
settings.
25
HP
Continued on next page.
Page. 8
LB11696V
Continued from preceding page.
Pin No. Pin Name
Pin Description
Equivalent circuit
VREG
50 kΩ
300 Ω
26
N1
Hall signal output (HP signal) type selector
26
VREG
50 kΩ
300 Ω
27
N2
Hall signal output (HP signal) type selector
27
VCC
28
Undervoltage protection voltage detection
If a 5 V or higher supply voltage is to be detected, set the
detection voltage by inserting an appropriate zener diode
in series.
28
LVS
VCC
Stabilized power supply output (5 V output)
Insert a capacitor (about 0.1 µF) between this pin and
ground for stabilization.
29
29
VREG
Power supply. Insert a capacitor between this pin and
ground for stabilization.
VCC
30
Page. 9
LB11696V
Hall Sensor Signal Input/Output Timing Chart
F/R = L
IN1
IN2
IN3
UH
VH
WH
UL
VL
WL
F/R = H
IN1
IN2
IN3
UH
VH
WH
UL
VL
WL
Areas shown in gray (
) indicate PWM output.
Page. 10
LB11696V
Application Circuit Examples
Bipolar transistor drive (high side PWM) using a 5 V power supply
Page. 11
LB11696V
MOS transistor drive (low side PWM) using a 12 V power supply
Page. 12
LB11696V
NMOS transistor + PNP transistor drive (low side PWM) using a 12 V power supply with thermal protection
implemented using a thermistor
Page. 13
LB11696V
LB11696V Functional Description
1. Output Drive Circuit
The LB11696V adopts direct PWM drive to minimize power loss in the outputs. The output transistors are always
saturated when on, and the motor drive power is adjusted by changing the on duty of the output. The output PWM
switching is performed on the UH, VH, and WH outputs. Since the UL to WL and UH to WH outputs have the same
output form, applications can select either low side PWM or high side PWM drive by changing the way the external
output transistors are connected. Since the reverse recovery time of the diodes connected to the non-PWM side of
the outputs is a problem, these devices must be selected with care. (This is because through currents will flow at the
instant the PWM side transistors turn on if diodes with a short reverse recovery time are not used.)
2. Current Limiter Circuit
The current limiter circuit limits the output current peak value to a level
determined by the equation I = VFR/Rf (VRF = 0.25 V typical, Rf:
current detection resistor). This circuit suppresses the output current by
To the RF pin
Current
detection
resistor
reducing the output on duty.
High-precision detection can be implemented by connecting the lines
from the RF and RFGND pins close to the two terminal of the current
detection resistor Rf.
The current limiter circuit includes an internal filter circuit to prevent incorrect current limiter circuit operation due
to detecting the output diode reverse recovery current due to PWM operation. Although there should be no problems
with the internal filter circuit in normal applications, applications should add an external filter circuit (such as an RC
low-pass filter) if incorrect operation occurs (if the diode reverse recovery current flows for longer than
1 µs).
3. Power Saving Circuit
This IC goes to a low-power mode (power saving state) when set to the
To the VREG pin
stop state with the S/S pin. In the power saving state, the bias currents in
most of the circuits are cut off. However, the 5 V regulator output
(VREG) is still provided in the power saving state. If it is also necessary
Hall
device
to cut the Hall device bias current, this function can be provided by an
application that, for example, connects the Hall devices to 5 V through
PNP transistors.
To the S/S pin
4. Notes on the PWM Frequency
The PWM frequency is determined by the capacitor C (F) connected to the PWM pin.
f
≈ 1/(22500 × C)
PWM
If a 2000 pF capacitor is used, the circuit will oscillate at about 22 kHz. If the PWM frequency is too low, switching
noise will be audible from the motor, and if it is too high, the output power loss will increase. Thus a frequency in
the range 15 to 50 kHz must be used. The capacitor's ground terminal must be placed as close as possible to the IC’s
ground pin to minimize the influence of output noise and other noise sources.
5. Control Methods
The output duty can be controlled by either of the following methods
• Control based on comparing the TOC pin voltage to the PWM oscillator waveform
The low side output transistor duty is determined according to the result of comparing the TOC pin voltage to the
PWM oscillator waveform. When the TOC pin voltage is 1.35 V or lower, the duty will be 0%, and when it is 3.0
V or higher, the duty will be 100%.
Since the TOC pin is the output of the control amplifier (CTL), a control voltage cannot be directly input to the
TOC pin. Normally, the control amplifier is used as a full feedback amplifier (with the EI- pin connected to the
TOC pin) and a DC voltage is input to the EI+ pin (the EI+ pin voltage will become equal to the TOC pin voltage).
When the EI+ pin voltage becomes higher, the output duty increases. Since the motor will be driven when the EI+
pin is in the open state, a pull-down resistor must be connected to the EI+ pin if the motor should not operate when
EI+ is open.
When TOC pin voltage control is used, a low-level input must be applied to the PWMIN pin or that pin connected
to ground.
Page. 14
LB11696V
• Pulse Control Using the PWMIN Pin
A pulse signal can be input to the PWMIN pin, and the output can be controlled based on the duty of that signal.
Note that the output is on when a low level is input to the PWMIN pin, and off when a high level is input. When
the PWMIN pin is open it goes to the high level and the output is turned off. If inverted input logic is required,
this can be implemented with an external transistor (npn).
When controlling motor operation from the PWMIN pin, the EI– pin must be connected to ground, and the EI+
pin must be connected to the TOC pin.
Note that since the PWM oscillator is also used as the clock for internal circuits, a capacitor (about 2000 pF) must
be connected to the PWM pin even if the PWMIN pin is used for motor control.
6. Hall Input Signals
A signal input with an amplitude in excess of the hysteresis (80 mV maximum) is required for the Hall inputs.
Considering the possibility of noise and phase displacement, an even larger amplitude is desirable.
If disruptions to the output waveforms (during phase switching) or to the HP output (Hall signal output) occur due to
noise, this must be prevented by inserting capacitors across the inputs. The constraint protection circuit uses the Hall
inputs to discriminate the motor constraint state. Although the circuit is designed to tolerate a certain amount of
noise, care is required when using the constraint protection circuit.
If all three phases of the Hall input signal system go to the same input state, the outputs are all set to the off state
(the UL, VL, WL, UH, VH, and WH outputs all go to the low level).
If the outputs from a Hall IC are used, fixing one side of the inputs (either the + or – side) at a voltage within the
common-mode input voltage range allows the other input side to be used as an input over the 0 V to V range.
CC
7. Undervoltage Protection Circuit
The undervoltage protection circuit turns one side of the outputs (UH, VH, and WH) off when the LVS pin voltage
falls below the minimum operation voltage (see the Electrical Characteristics). To prevent this circuit from
repeatedly turning the outputs on and off in the vicinity of the protection
To the power
operating voltage, this circuit is designed with hysteresis. Thus the output
will not recover until the operating voltage rises 0.45 V (typical).
The protection operating voltage detection level is set up for 5 V systems.
The detected voltage level can be increased by shifting the voltage by
inserting a zener diode in series with the LVS pin to shift the detection
level. The LVS influx current during detection is about 75 µA. To
increase the diode current to stabilize the zener diode voltage rise, insert
a resistor between the LVS pin and ground.
supply detected
To the LVS pin
If the LVS pin is left open, the internal pull-down resistor will result in the IC seeing a ground level input, and the
output will be turned off. Therefore, a voltage in excess of the LVS circuit clear voltage (about 4.35 V) must be
applied to the LVS pin if the application does not use the undervoltage protection circuit. The maximum rating for
the LVS pin applied voltage is 18 V.
8. Constraint Protection Circuit
When the motor is physically constrained (held stopped), the CSD pin external capacitor is charged (to about 3.0 V)
by a constant current of about 2.5 µA and is then discharged (to about 1.0 V) by a constant current of about 0.14 µA.
This process is repeated, generating a sawtooth waveform. The constraint protection circuit turns motor drive on and
off repeatedly based on this sawtooth waveform. (The UH, VH, and WH side outputs are turned on and off.) Motor
drive is on during the period the CSD pin external capacitor is being charged from about 1.0 V to about 3.0 V, and
motor drive is off during the period the CSD pin external capacitor is being discharged from about 3.0 V to about
1.0 V. The IC and the motor are protected by this repeated drive on/off operation when the motor is physically
constrained.
The motor drive on and off times are determined by the value of the connected capacitor C (in µF).
TCSD1 (drive on period) ≈ 0.8 × C (seconds)
TCSD2 (drive off period) ≈ 14.3 × C (seconds)
When a 0.47 µF capacitor is connected externally to the CSD pin, this iterated operation will have a drive on period
of about 0.38 seconds and a drive off period of about 6.7 seconds.
Page. 15
LB11696V
While the motor is turning, the discharge pulse signal (generated once for each Hall input period) that is created by
combining the Hall inputs internally in the IC discharges the CSD pin external capacitor. Since the CSD pin voltage
does not rise, the constraint protection circuit does not operate.
When the motor is physically constrained, the Hall inputs do not change and the discharge pulses are not generated.
As a result, the CSD pin external capacitor is charged by a constant current of 2.5 µA to about 3.0 V, at which point
the constraint protection circuit operates. When the constraint on the motor is released, the constraint protection
function is released.
Connect the CSD pin to ground if the constraint protection circuit is not used.
9. Forward/Reverse Direction Switching
This IC is designed so that through currents (due to the output transistor off delay time when switching) do not flow
in the output when switching directions when the motor is turning. However, if the direction is switched when the
motor is turning, current levels in excess of the current limiter value may flow in the output transistors due to the
motor coil resistance and the motor back EMF state when switching. Therefore, designers must consider selecting
external output transistors that are not destroyed by those current levels or only switching directions after the speed
has fallen below a certain speed.
10. Handling Different Power Supply Types
When this IC is operated from an externally supplied 5 V power supply (4.5 to 5.5 V), short the V pin to the
CC
VREG pin and connect them to the external power supply.
When this IC is operated from an externally supplied 12 V power supply (8 to 17 V), connect the V pin to the
CC
power supply. (The VREG pin will generate a 5 V level to function as the control circuit power supply.)
11. Power Supply Stabilization
Since this IC uses a switching drive technique, the power supply line level can be disturbed easily. Therefore
capacitors with adequate capacitance to stabilize the power supply line must be inserted between V and ground.
CC
If diodes are inserted in the power supply lines to prevent destruction if the power supply is connected with reverse
polarity, the power supply lines are even more easily disrupted, and even larger capacitors are required.
If the power supply is turned on and off by a switch, and if there is a significant distance between that switch and the
stabilization capacitor, the supply voltage can be disrupted significantly by the line inductance and surge current into
the capacitor. As a result, the withstand voltage of the device may be exceeded. In application such as this, the surge
current must be suppressed and the voltage rise prevented by not using ceramic capacitors with a low series
impedance, and by using electrolytic capacitors instead.
12. VREG Stabilization
To stabilize the VREG voltage, which is the control circuit power supply, a 0.1 µF or larger capacitor must be
inserted between the VREG pin and ground. The ground side of this capacitor must connected to the IC ground pin
with a line that is as short as possible.
Page. 16
LB11696V
ORDERING INFORMATION
Device
Package
Shipping (Qty / Packing)
48 / Fan-Fold
SSOP30 (275mil)
(Pb-Free)
LB11696V-MPB-E
LB11696V-TLM-E
LB11696V-TRM-E
SSOP30 (275mil)
(Pb-Free)
1000 / Tape & Reel
1000 / Tape & Reel
SSOP30 (275mil)
(Pb-Free)
† For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel
Packaging Specifications Brochure, BRD8011/D. http://www.onsemi.com/pub_link/Collateral/BRD8011-D.PDF
ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States
and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of
SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without
further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitabilityof its products for any particular purpose,
nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including
without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can
and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are
not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or
sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers,
employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of,
directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was
negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all
applicable copyright laws and is not for resale in any manner.
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