LA72715NV-TLM-E [ONSEMI]

JPN MTS (Multi Channel Television Sound) Decoder IC; JPN MTS (多频道电视声音)解码器IC
LA72715NV-TLM-E
型号: LA72715NV-TLM-E
厂家: ONSEMI    ONSEMI
描述:

JPN MTS (Multi Channel Television Sound) Decoder IC
JPN MTS (多频道电视声音)解码器IC

解码器 消费电路 商用集成电路 电视 光电二极管
文件: 总13页 (文件大小:235K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Ordering number : ENA1770  
LA72715NV  
Monolithic Linear IC  
JPN MTS (Multi Channel  
http://onsemi.com  
Television Sound) Decoder IC  
Overview  
JPN MTS (Multi Channel Television Sound) Decoder IC  
Features  
With SIF circuit, alignment-free* STEREO channel separation.  
* In base band signal input mode, separation is adjusted by input level.  
Three I2C slave-addresses are prepared.  
The maximum output level is as large as 4.2dBV.  
(Frequency = 1kHz, distortion = less than 3%, V  
= 5V, TYP)  
CC  
The external clock is unnecessary.  
A couple of external input terminal is prepared.  
Functions  
Stereo & Bilingual demodulation.  
Stereo & Bilingual detection.  
Just clock out.  
Specifications  
Maximum Ratings at Ta = 25°C  
Parameter  
Symbol  
H max  
Conditions  
Ratings  
7.0  
Unit  
V
Maximum power supply voltage  
Allowable power dissipation  
Operating temperature  
Storage temperature  
V
CC  
Pd max  
Topr  
Ta 80°C, Mounted on a specified board*  
203  
mW  
°C  
-20 to +80  
-55 to +150  
Tstg  
°C  
* Mounted on a specified board: 114.3mm × 76.1mm × 1.6mm glass epoxy board  
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating  
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.  
Semiconductor Components Industries, LLC, 2013  
July, 2013  
71410 SY 20100707-S00006 No.A1770-1/13  
LA72715NV  
Operating Ranges at Ta = 25°C  
Parameter  
Symbol  
Conditions  
Ratings  
Unit  
V
Recommended operating voltage  
Allowable operating voltage  
V
V
H
5.0  
CC  
H op  
4.5 to 5.5  
V
CC  
Electrical Characteristics at Ta = 25°C, V  
[Condition of input signal at pin 5]  
BASE BAND input  
= 5V  
DD  
[Output] L-ch: pin 18, R-ch: pin 17  
Ratings  
typ  
Parameter  
Symbol  
1
Conditions  
unit  
min  
18  
max  
34  
Current dissipation  
I
No signal, Inflow current at pin 19  
26  
mA  
dBV  
mVrms  
dB  
CC  
MONO output level  
V
MN1  
fm = 1kHz, 100% Mod, Pre-emphasis OFF  
-6  
501  
-1  
-4.5  
595  
0
-3  
O
708  
1
MONO L/R level difference  
MONO distortion  
ΔV MN1  
fm = 1kHz, 100% Mod, Pre-emphasis OFF  
fm = 1kHz, 100% Mod, Pre-emphasis OFF  
O
THDM1  
FCM1  
0.2  
0.5  
%
MONO frequency characteristics  
fm = 10kHz/1kHz, 100% Mod, 15kHz LPF  
Pre-emphasis OFF  
-18  
-13.5  
dB  
MONO S/N  
SNM1  
Non Mod, 15kHz LPF  
60  
-6  
65  
-4.5  
595  
0.5  
dB  
dBV  
mVrms  
%
STEREO output level  
V
ST1  
fm = 1kHz, 100% Mod, Cue (Stereo),  
-3  
708  
1
O
15kHz LPF  
501  
STEREO distortion  
STEREO S/N  
THDS1  
SNS1  
fm = 1kHz, 100% Mod, Cue (Stereo),  
15kHz LPF  
Sub Carrier (Non Mod), Cue (Stereo),  
15kHz LPF  
50  
60  
dB  
Main output level  
V
MA1  
fm = 1kHz, 100% Mod, Cue (Bilingual),  
15kHz LPF  
-6  
-4.5  
595  
0.2  
-3  
708  
0.5  
dBV  
mVrms  
%
O
501  
Main distortion  
THDMA1  
SNMA1  
fm = 1kHz, 100% Mod, Cue (Bilingual),  
15kHz LPF  
Main S/N  
Sub Carrier (Non Mod), Cue (Bilingual), 15kHz LPF  
60  
-6  
65  
-4.5  
595  
0.7  
dB  
dBV  
mVrms  
%
SUB output level  
V
SU1  
fm = 1kHz, 100% Mod, Cue (Bilingual),  
-3  
708  
1.5  
O
15kHz LPF  
501  
SUB distortion  
THDSU1  
FCSU1  
fm = 1kHz, 100% Mod, Cue (Bilingual),  
15kHz LPF  
SUB frequency characteristics  
fm = 10kHz/1kHz, 60% Mod, Cue (Bilingual),  
15kHz LPF, Pre-emphasis OFF  
-18  
-14.5  
dB  
SUB Main S/N  
SNSU1  
SEPR1  
Sub Carrier (Non Mod), Cue (Bilingual), 15kHz LPF  
50  
35  
60  
43  
dB  
dB  
STEREO separation L R  
fm = 1kHz (L-only), 60% Mod, Cue (Stereo),  
15kHz LPF  
STERO separation R L  
Stay behind carrier level (SUB)  
Stay behind carrier level (MAIN)  
Cross-talk MAIN SUB  
SEPL1  
CLSU1  
CLMA1  
CTSUB1  
CTMA1  
fm = 1kHz (R-only), 60% Mod, Cue (Stereo),  
15kHz LPF  
35  
43  
-50  
-55  
62  
dB  
dBV  
dBV  
dB  
Main = 0%, Sub = 0% (Carrier)  
Cue (Bilingual)  
-40  
-45  
Main = 0%, Sub = 0% (Carrier)  
Cue (Bilingual)  
Main : fm = 1kHz, 100% modulation,  
Cue (Bilingual), 1kHz BPF  
Sub : fm = 1kHz, 100% modulation,  
Cue (Bilingual), 1kHz BPF  
Input = Mono Signal  
55  
55  
Cross-talk SUB MAIN  
62  
dB  
MODE output MONO  
MODMO1  
MODST1  
MODBI1  
JCH1  
1.7  
0
2
1
3
2.3  
1.3  
3.3  
V
MODE output STEREO  
MODE output BILINGUAL  
Just Clock output High voltage  
Just Clock output Low voltage  
Max Output level  
Input = Stereo Signal  
V
V
Input = Bilingual Signal  
f = 400Hz (mono), 25% Mod  
f = 400Hz (mono), 10% Mod  
f = 1kHz, distortion = 3%  
2.7  
4
V
JCL1  
1
V
MOL1  
3.3  
4.2  
dBV  
mVrms  
1462  
1622  
Continued on next page.  
No.A1770-2/13  
LA72715NV  
Continued from preceding page.  
Ratings  
typ  
Parameter  
Symbol  
EXTIN1  
Conditions  
unit  
min  
max  
V
EXTERNAL input level  
f = 1kHz, (pin 12 & pin 13 input)  
-14.5  
188.4  
dBV  
mVrms  
8pin-CONTROL “H”  
8pin-CONTROL “OPEN”  
8pin-CONTROL “L”  
MUTEH  
MUTEOP  
MUTEL  
MUTE-ON  
3.0  
V
V
V
CC  
MUTE-OFF  
0.9  
MUTE-OFF & Detection AREA CONROL  
0
0.2  
[Condition of input signal at pin 5]  
Deviation of SIF input MONO : (fm = 1kHz) 100%4.5MHz 25kHz Pre-Emphasis ON  
[Output] L-ch : pin 18, R-ch : pin 17  
Ratings  
typ  
Parameter  
Symbol  
2
Conditions  
unit  
min  
max  
Current dissipation  
I
No signal, Inflow current at pin 19  
fc = 4.5MHz  
20  
70  
28  
36  
110  
316.2  
-3  
mA  
dBμV  
mVrms  
dBV  
mVrms  
dB  
CC  
Input sensitivity level  
MONO output level  
V IN  
90  
S
3.16  
-6  
31.62  
-4.5  
595  
0
V
MN2  
fm = 1kHz, 100% Mod, Pre-emphasis OFF  
O
501  
-1  
708  
1
MONO L/R level difference  
MONO distortion  
ΔV MN2  
fm = 1kHz, 100% Mod, Pre-emphasis OFF  
fm = 1kHz, 100% Mod, Pre-emphasis OFF  
O
THDM2  
FCM2  
0.2  
0.5  
%
MONO frequency characteristics  
fm = 10kHz/1kHz, 100% Mod, 15kHz LPF  
Pre-emphasis OFF  
-18  
-13.5  
dB  
MONO S/N  
SNM2  
Non Mod, 15kHz LPF  
55  
-6  
60  
-4.5  
595  
0.5  
dB  
dBV  
mVrms  
%
STEREO output level  
V
ST2  
fm = 1kHz, 100% Mod, Cue (Stereo),  
-3  
708  
1
O
15kHz LPF  
501  
STEREO distortion  
STEREO S/N  
THDS2  
SNS2  
fm = 1kHz, 100% Mod, Cue (Stereo),  
15kHz LPF  
Sub Carrier (Non Mod), Cue (Stereo),  
15kHz LPF  
50  
57  
dB  
Main output level  
V
MA2  
fm = 1kHz, 100% Mod, Cue (Bilingual),  
15kHz LPF  
-6  
-4.5  
595  
0.2  
-3  
708  
0.5  
dBV  
mVrms  
%
O
501  
Main distortion  
THDMA2  
SNMA2  
fm = 1kHz, 100% Mod, Cue (Bilingual),  
15kHz LPF  
Main S/N  
Sub Carrier (Non Mod), Cue (Bilingual), 15kHz LPF  
55  
-6  
60  
-4.5  
595  
0.7  
dB  
dBV  
mVrms  
%
SUB output level  
V
SU2  
fm = 1kHz, 100% Mod, Cue (Bilingual),  
-3  
708  
1.5  
O
15kHz LPF  
501  
SUB distortion  
THDSU2  
FCSU2  
fm = 1kHz, 100% Mod, Cue (Bilingual),  
15kHz LPF  
SUB frequency characteristics  
fm = 10kHz/1kHz, 60% Mod, Cue (Bilingual),  
15kHz LPF, Pre-emphasis OFF  
-18  
-14.5  
dB  
SUB Main S/N  
SNSU2  
SEPR2  
Sub Carrier (Non Mod), Cue (Bilingual), 15kHz LPF  
50  
35  
58  
38  
dB  
dB  
STEREO separation L R  
fm = 1kHz (L-only), 60% Mod, Cue (Stereo),  
15kHz LPF  
STERO separation R L  
Stay behind carrier level (SUB)  
Stay behind carrier level (MAIN)  
Cross-talk MAIN SUB  
SEPL2  
CLSU2  
CLMA2  
CTSUB2  
CTMA2  
fm = 1kHz (R-only), 60% Mod, Cue (Stereo),  
15kHz LPF  
35  
38  
-50  
-55  
62  
dB  
dBV  
dBV  
dB  
Main = 0%, Sub = 0% (Carrier)  
Cue (Bilingual)  
-40  
-45  
Main = 0%, Sub = 0% (Carrier)  
Cue (Bilingual)  
Main : fm = 1kHz, 100% modulation,  
Cue (Bilingual), 1kHz BPF  
Sub : fm = 1kHz, 100% modulation,  
Cue (Bilingual), 1kHz BPF  
Input = Mono Signal  
55  
55  
Cross-talk SUB MAIN  
62  
dB  
MODE output MONO  
MODMO2  
MODST2  
MODBI2  
JCH2  
1.7  
0
2
1
3
2.3  
1.3  
3.3  
V
V
V
V
MODE output STEREO  
MODE output BILINGUAL  
Just Clock output High voltage  
Input = Stereo Signal  
Input = Bilingual Signal  
f = 400Hz (mono), 25%Mod  
2.7  
4
Continued on next page.  
No.A1770-3/13  
LA72715NV  
Continued from preceding page.  
Ratings  
typ  
Parameter  
Symbol  
JCL2  
Conditions  
unit  
min  
max  
Just Clock output Low voltage  
Max Output level  
f = 400Hz (mono), 10%Mod  
1
V
dBV  
mVrms  
dBV  
mVrms  
V
MOL2  
f = 1kHz, distortion = 3%  
3.3  
4.2  
1622  
-14.5  
188.4  
1462  
EXTERNAL input level  
EXTIN2  
f = 1kHz, (pin 12 & pin 13 input)  
8pin-CONTROL “H”  
8pin-CONTROL “OPEN”  
8pin-CONTROL “L”  
MUTEH  
MUTEOP  
MUTEL  
MUTE-ON  
3.0  
0
V
CC  
0.2  
MUTE-OFF  
0.9  
V
MUTE-OFF & Detection AREA CONROL  
V
Package Dimensions  
unit : mm (typ)  
3175C  
[LA72715NV]  
7.8  
24  
13  
12  
1
0.65  
0.15  
(0.33)  
0.22  
SSOP24(275mil)  
No.A1770-4/13  
LA72715NV  
Block Diagram and Test Circuit  
+
No.A1770-5/13  
LA72715NV  
Block Diagram and Application Circuit Example  
The value of (1*), (2*), and (3*) affects sensitivity for signal detection. It must be adjusted depending on the  
circumstances by the user.  
(1*): Recommended constant value 0.0033μF + 470kΩ (values when tested)  
(2*): Recommended matching resistor value R1=1kΩ, R2=1kΩ  
Recommended BPF Murata SFSRA4M50DF00-B0  
(3*): Recommended constant value 4.7μF to 10kΩ  
The ceramic capacitor may be used for the electrolytic capacitor.  
No.A1770-6/13  
LA72715NV  
Pin Functions  
Pin  
DC voltage  
AC level  
Pin Name  
No.  
Function  
Equivalent Circuit  
PAD  
1
AM DETECTOR  
DC : 2.3V  
Reference terminal of AM detection.  
V
CC  
10kΩ 1kΩ  
10kΩ 1kΩ  
2
DC FILTER  
OUT  
2pin  
Absorbing the DC offset of signal line by  
external capacity.  
DC : 2.6V  
14pin  
14  
DC : 2.1V  
PAD  
3
DC FILTER IN  
DC : 2.4V  
Absorbing the DC offset of signal line by  
external capacity.  
2.4V  
15  
2kΩ  
2kΩ  
100kΩ  
PAD  
1kΩ  
4
FM FILTER  
DC : 2.9V  
Filter terminal for making stable DC voltage of  
FM detection output in SIF part.  
Normally, use a condenser of 4.7μF. Increase  
the capacity value with concerning frequency  
characteristics of low level.  
1kΩ  
1kΩ  
PAD  
5
SIF INPUT  
DC : 2.4V  
Input terminal for SIF.  
The input impedance is about 5kΩ. Be care for  
about pattern layout of the input circuit,  
because of causing buzz-beat and buzz by  
leaking noise signal into the input terminal.  
(The noise signal depending on sound is  
particularly video signal and chroma signal and  
so on. VIF carrier becomes noise signal.)  
PAD  
500Ω  
500Ω  
10kΩ  
10kΩ  
6
GND  
Continued on next page.  
No.A1770-7/13  
LA72715NV  
Continued from preceding page.  
Pin  
DC voltage  
AC level  
Pin Name  
No.  
Function  
Equivalent Circuit  
7
JUST CLOCK  
OUT  
Rectangle wave output for JUST CLOCK.  
(OPEN Collector)  
5V  
100kΩ Pull-up  
PAD  
5kΩ  
0V  
8
MUTE  
DC : 0V  
3.0V to V : MUTE (CONT 1)  
CC  
control pin &  
Distinction  
control.  
OPEN (0.9V) : NORM  
0V : NORM & Detection AREA Control  
(CONT2)  
CONT2  
PAD  
Use it within the range of 0 to 0.2V when you  
operate usually.  
CONT1  
2.4V  
REG  
9
Serial data input  
pin.  
High : 2.5V to 5V  
Low : 0V to 1.5V  
30μA  
5V  
0V  
PAD  
500Ω  
10  
Serial CLK input  
pin  
High : 2.5V to 5V  
Low : 0V to 1.5V  
30μA  
5V  
0V  
PAD  
500Ω  
11  
12  
TEST1  
EXTIN_R  
DC : 2.4V  
-14.5dBV  
EXT input Rch  
V
CC  
PAD  
not used : OPEN  
50kΩ  
2.4V  
1kΩ  
13  
EXTIN_L  
DC : 2.4V  
-14.5dBV  
EXT input Lch  
V
CC  
PAD  
not used : OPEN  
50kΩ  
2.4V  
1kΩ  
Continued on next page.  
No.A1770-8/13  
LA72715NV  
Continued from preceding page.  
Pin  
DC voltage  
AC level  
Pin Name  
No.  
Function  
Equivalent Circuit  
16  
17  
18  
SLAVE ADD  
SELECT  
Line Out (R)  
terminal  
DC : 2.4V  
Line output pin.  
AC : -4.5dBV  
Line Out (L)  
terminal  
50kΩ  
PAD  
2.5pF  
2.5pF  
250Ω 300Ω  
50kΩ  
19  
20  
V
5V  
CC  
MTS MODE  
OUT  
No signal  
DC : 2.0V  
Detection output for M.T.S. signal.  
BILINGUAL :3.0V  
MONO  
:2.0V  
:1.0V  
STEREO  
10kΩ 10kΩ  
PAD  
21  
REG FILT  
DC : 2.4V  
Filter terminal of reference voltage source  
PAD  
500Ω  
500Ω  
50kΩ  
10kΩ  
10kΩ  
10kΩ  
22  
23  
24  
NC  
I2C BUS Serial Interface Specification  
(1) Data Transfer Manual  
This LSI adopts control method (I2C-BUS) with serial data, and controlled by two terminals which called SCL  
(serial clock) and SDA (serial data). At first, set up*1the condition of starting data transfer, and after that, input 8 bit  
data to SDA terminal with synchronized SCL terminal clock. The order of transferring is first, MSB (the Most Scale  
of Bit), and save the order. The 9th bit takes ACK (Acknowledge) period, during SCL terminal takes ‘H’, this LSI  
pull down the SDA terminal. After transferred the necessary data, two terminals lead to set up and of *2data transfer  
stop condition, thus the transfer comes to close.  
*1 Defined by SCL rise down SDA during ‘H’ period.  
*2 Defined by SCL rise up SDA during ‘H’ period.  
(2) Transfer Data Format  
After transfer start condition, transfers slave address (1000 000 ) to SDA terminal, control data, then, stop condition  
*
(See figure 1).  
Slave address is made up of 7bits, *38th bit shows the direction of transferring data, if it is ‘L’ takes write mode (As  
this LSI side, this is input operation mode), and in case of ‘H’ reading mode (As this LSI side, this is output  
operation mode).  
Data works with all of bit, transfer the stop condition before stop 8bit transfer, and to stop transfer, it will be  
canceled the transfer dates. At READ mode, this LSI outputs during ACK period, please must input 9 clocks.  
*3 It is called R/W bit.  
No.A1770-9/13  
LA72715NV  
Fig.1 DATA STRUCTURE “WRITE” mode  
R/W  
L
START Condition  
Slave Address  
ACK  
Control data  
ACK  
ACK  
STOP condition  
STOP condition  
Fig.2 DATA STRUCTURE “READ” mode  
R/W  
H
START condition  
Slave Address  
ACK  
Internal Data *  
The output data synchronizes with the clock of SCL pin. Then the ACK output is made after the output data.  
bit8 is result of STERO DET (H : STEREO)  
bit7 is result of BILINGUAL DET (H : BILINGUAL)  
bit6 is Initial Condition ‘H’  
bit5 to bit1 are fixed to ‘L’  
(3) Initialize  
This IC is initialized for circuit protection. Initial condition is “01h (Main-mode) ”.  
Reference  
Parameter  
Symbol  
min  
max  
unit  
V
LOW level input voltage  
HIGH level input voltage  
LOW level output current  
SCL clock frequency  
V
V
I
-0.5  
2.5  
1.5  
5.5  
3.0  
100  
IL  
V
IH  
mA  
kHz  
μs  
μs  
μs  
μs  
μs  
μs  
μs  
ns  
μs  
μs  
OL  
f
t
t
t
t
t
t
t
t
t
t
0
4.7  
4.0  
4.7  
0
SCL  
Set-up time for a repeated START condition  
Hold time START condition. After this period, the first clock pulse is generated  
LOW period of the SCL clock  
SU : STA  
HD : STA  
LOW  
Rise time of both SDA and SDL signals  
HIGH period of the SCL clock  
1.0  
1.0  
R
4.0  
0
HIGH  
Fall time of both SDA and SDL signals  
Data hold time  
F
0
HD : DAT  
SU : DAT  
SU : STO  
BUF  
Data set-up time  
250  
4.0  
4.7  
Set-up time for STOP condition  
BUS free time between a STOP and START condition  
Definition of Timing  
t
t
t
F
R
HIGH  
SCL  
SDA  
t
t
t
t
t
t
t
BUF  
HD:STA  
SU:STA  
LOW  
HD:DATA  
SU:DAT  
SU:STO  
No.A1770-10/13  
LA72715NV  
I2C Control/LA72715NV Group number is ONLY 1 (Normal Use).  
Grp-1  
D8  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
Condition  
0
0
1
1
0
1
0
1
Bilingual  
Main  
*
Sub  
(Prohibit)  
*
*
*
*
*
*
0
1
Normal  
Forced MONO  
Normal (MUTE OFF)  
MUTE  
0
1
0
1
TV Mode (SW Normal)  
EXT Mode (SW EXT)  
JUST CLOCK OFF  
JUST CLOCK ON  
SIF Mode  
0
1
0
1
BASE BAND Mode  
Fix  
0
1
Prohibit (TEST Mode)  
*: Initial condition  
Read out data  
D8  
D7  
D6  
D5  
0
D4  
0
D3  
0
D2  
0
D1  
0
Condition  
Fixed  
0
1
Normal  
Stereo det  
0
1
Normal  
Bilingual det  
Except an initial condition  
Initial condition  
0
1
Test Mode Condition  
When STOP condition transform at Grp-1 data-end, controlled NORMAL mode.  
Grp-2 (Only test condition : Normally, this group is hidden group)  
D8  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
Condition/Moniter position  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
-
TEST-01 SIF out  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
1
1
1
1
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
TEST-02 SUB FIL out  
TEST-03 CUE FIL out  
TEST-04 SUD DET out  
TEST-05 CUE DC1 out  
TEST-06 SUB DET2 out  
TEST-07 110K out  
TEST-08 28K out  
TEST-09 CUE PLS out  
TEST-10 FIL ZAP LEVEL  
SLAVE ADDRESS 80H (16pin : OPEN)  
SLAVE ADDRESS 84H (16pin : V  
)
CC  
SLAVE ADDRESS A0H (16pin : GND)  
No.A1770-11/13  
LA72715NV  
Mode Select (pin & I2C setting)  
MUTE PIN  
READ  
MODE  
I/O  
I2C  
OUTPUT MODE  
Broadcast  
setting  
signal  
MODE OUT  
8pin  
L or OPEN  
L or OPEN  
L or OPEN  
L or OPEN  
*
D5  
0
0
0
0
*
D4  
0
0
0
0
1
*
D3  
0
0
0
1
*
D2  
0
0
1
*
D1  
0
1
0
*
LCH (18pin)  
MAIN  
MAIN  
SUB  
RCH (17pin)  
SUB  
MODE  
BOTH  
MAIN  
D8  
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
D7  
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
20pin  
3V  
Bilingual  
MAIN  
SUB  
SUB  
MAIN  
MUTE  
MUTE  
EXT L  
L
MAIN  
MUTE  
MUTE  
EXT R  
R
MONO  
MUTE  
MUTE  
EXT  
*
*
H
*
*
*
*
L or OPEN  
L or OPEN  
L or OPEN  
*
1
0
0
*
0
0
0
1
*
*
*
*
STEREO  
0
1
*
*
*
STEREO  
MONO  
MUTE  
MUTE  
EXT  
1V  
2V  
*
*
L+R  
L+R  
*
*
MUTE  
MUTE  
EXT L  
L+R  
MUTE  
MUTE  
EXT R  
L+R  
H
*
*
*
*
L or OPEN  
L or OPEN  
*
1
0
*
0
0
1
*
*
*
*
MONO  
*
*
*
MONO  
MUTE  
MUTE  
EXT  
*
*
*
MUTE  
MUTE  
EXT L  
MUTE  
MUTE  
EXT R  
H
*
*
*
*
L or OPEN  
1
0
*
*
*
16pin : Slave address select. 0V to 1.5V : A0H, OPEN : 80H, 3.0V to V  
: 84H  
CC  
Serial Data Specification (I2C bus communication)  
Data bit  
MSB  
LSB  
D1  
D8  
D7  
D6  
D5  
D4  
D3  
D2  
SIF or  
JUST  
CLK  
EXT SOURCE  
SELECT  
NORMAL OUT  
MUTE  
Forced  
MONO  
TEST  
Bilingual mode select  
BASE BAND  
00:BILINGUAL  
01 : MAIN  
0 : SIF  
1 : BASE  
BAND  
0 : OFF  
1 : ON  
0 : OFF  
1 : ON  
0 : OFF(TV)  
1 : EXT  
0 : OFF  
1 : ON  
0 : OFF  
1 : ON  
10 : SUB  
11 : Unusable  
Note : Underline shows default setting  
No.A1770-12/13  
LA72715NV  
LA72715NV Reference Characteristics  
Output frequency characteristics TYP (30%MOD SIF_IN)  
De-emphasis characteristics TYP (30%MOD SIF_IN)  
6
10  
5
4
2
0
2
4
6
8
MAIN  
ST_Lch  
ST_Rch  
0
SUB  
5
10  
15  
10  
0.01  
2
3
5
7
2
3
5
7
2
3
5
7
2
3
5
7
2
3
5
7
2
3
5 7  
10  
0.1  
1
10  
0.01  
0.1  
1
Frequency, f – kHz  
Frequency, f – kHz  
Main degree of modulation  
Output level & Distortion factor TYP (1kHz SIF_IN)  
2000  
4
1500  
1000  
3
2
500  
0
1
0
0
100  
200  
300  
Main degree of modulation – %  
ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number  
of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at  
www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no  
warranty, representation or guarantee regarding the suitabilityof its products for any particular purpose, nor does SCILLC assume any liability arising out of the  
application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental  
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual  
performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical  
experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use  
as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in  
which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for  
any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors  
harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or  
death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the  
part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PS No.A1770-13/13  

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