FXLA108BQX [ONSEMI]
双电源 8 位电压转换器;
| 型号： | FXLA108BQX |
| 厂家： | 
ONSEMI |
| 描述： | 双电源 8 位电压转换器 接口集成电路 锁存器 转换器 |
| 文件： | 总17页 (文件大小：170K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
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Low-Voltage Dual-Supply
8-Bit Voltage Translator
with Configurable Voltage
Supplies and Signal Levels,
3-State Outputs, and Auto
Direction Sensing
WQFN20 4.5x2.5, 0.5P
CASE 510CD
MARKING DIAGRAM
$Y&Z&2&K
FXLA108
FXLA108
Description
The FXLA108 is a configurable dual−voltage supply translator for
both uni−directional and bi−directional voltage translation between
two logic levels. The device allows translation between voltages as
$Y
&Z
&2
&K
= Logo
= Assembly Plant Code
= 2−Digit Date Code
= 2−Digits Lot Run Traceability Code
high as 3.6 V to as low as 1.1 V. The A port tracks the V
level and
CCA
FXLA108 = Specific Device Code
the B port tracks the V
level. This allows for bi−directional voltage
CCB
translation over a variety of voltage levels: 1.2 V, 1.5 V, 1.8 V, 2.5 V,
and 3.3 V.
ORDERING INFORMATION
See detailed ordering and shipping information on page 15 of
this data sheet.
The device remains in three−state as long as either V = 0 V,
CC
allowing either V to be powered up first. Internal power−down
CC
control circuits place the device in 3−state if either V is removed.
CC
The /OE input, when HIGH, disables both the A and B ports by
placing them in a 3−state condition. The /OE input is supplied by
V
CCA
.
The FXLA108 supports bi−directional translation without the need
for a direction control pin. The two ports of the device have
auto−direction sense capability. Either port may sense an input signal
and transfer it as an output signal to the other port.
Features
• Bi−Directional Interface Between Two Levels: from 1.1 V to 3.6 V
• Fully Configurable: Inputs and Outputs Track V
CC
• Non−Preferential Power−Up; Either V May Be Powered Up First
CC
• Outputs Switch to 3−State if Either V is at GND
CC
• Power−Off Protection
• Bus−Hold on Data Inputs Eliminates the Need for Pull−Up Resistors;
Do Not Use Pull−Up Resistors on A or B Ports
• Control Input (/OE) Referenced to V
Voltage
CCA
• Packaged in 20−Terminal DQFN (2.5 mm x 4.5 mm)
• Direction Control Not Necessary
• 100 Mbps Throughput when Translating Between 1.8 V and 2.5 V
• ESD Protection Exceeds:
♦ 8 kV HBM (per JESD22−A114 &Mil Std 883e 3015.7)
♦ 2 kV CDM (per ESD STM 5.3)
• This is a Pb−Free Device
Applications
• Laptops, Notebooks
• Routers, Switches
© Semiconductor Components Industries, LLC, 2009
1
Publication Order Number:
July, 2022 − Rev. 2
FXLA108/D
FXLA108
PIN CONFIGURATION
VCCA VCCB
1
20
A0
A1
A2
A3
A4
A5
A6
A7
2
3
4
5
6
7
8
9
19 B0
18 B1
17 B2
16 B3
15 B4
14 B5
13 B6
12 B7
D
A
P
10
11
GND /OE
Figure 1. Pin Configuration (Top Through View)
PIN DEFINITIONS
Pin No.
1
Name
Description
A−Side Power Supply
V
CCA
2
A
A
A
A
A
A
A
A
A−Side Inputs or 3−State Outputs
A−Side Inputs or 3−State Outputs
A−Side Inputs or 3−State Outputs
A−Side Inputs or 3−State Outputs
A−Side Inputs or 3−State Outputs
A−Side Inputs or 3−State Outputs
A−Side Inputs or 3−State Outputs
A−Side Inputs or 3−State Outputs
Ground
0
1
2
3
4
5
6
7
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
DAP
GND
/OE
Output Enable Input
B
7
B
6
B
5
B
4
B
3
B
2
B
1
B
0
B−Side Inputs or 3−State Outputs
B−Side Inputs or 3−State Outputs
B−Side Inputs or 3−State Outputs
B−Side Inputs or 3−State Outputs
B−Side Inputs or 3−State Outputs
B−Side Inputs or 3−State Outputs
B−Side Inputs or 3−State Outputs
B−Side Inputs or 3−State Outputs
B−Side Power Supply
V
CCB
NC
No Connect
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2
FXLA108
FUNCTIONAL DIAGRAM
VccA
VccB
OE
A0 − A7
B0 − B7
Figure 2. Functional Diagram
FUNCTION TABLE
Control
/OE
Outputs
LOW Logic Level
HIGH Logic Level
Normal Operation
3−State
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3
FXLA108
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Conditions
Min
−0.5
−0.5
−0.5
−0.5
−0.5
−0.5
−0.5
−
Max
4.6
4.6
4.6
4.6
4.6
Unit
V
CC
Supply Voltage
V
V
CCA
V
CCB
V
I
DC Input Voltage
I/O Ports A and B
Control Input (/OE)
Output 3−State
V
V
V
O
Output Voltage (Note 2)
Output Active (A )
V
V
+ 0.5
n
CCA
CCB
Output Active (B )
+ 0.5
n
I
IK
DC Input Diode Current
DC Output Diode Current
V < 0 V
I
−50
mA
mA
I
V
< 0 V
−
−50
+50
+50
100
+150
35
OK
O
O
V
> V
−
CC
I
/I
DC Output Source/Sink Current
−50
−
mA
mA
°C
OH OL
I
DC V or Ground Current (Per Supply Pin)
CC
CC
T
STG
Storage Temperature Range
Power Dissipation
−65
−
P
D
mW
kV
ESD
Human Body Model, JESD22−A114
Charged Device Model, JESD22−C101
−
8
−
2
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. I absolute maximum ratings must be observed.
O
2. All unused inputs and input/outputs must be held at V
or GND.
CCi
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Conditions
Operating V or V
CCA
Min
1.1
0
Max
3.6
Unit
V
V
CC
Power Supply
Input Voltage
CCB
V
IN
Ports A and B
Control Input (/OE)
3.6
V
0
V
CCA
V
T
Operating Temperature, Free Air
Minimum Input Edge Rate
−40
−
+85
°C
A
dt/dV
V
CCA/B
= 1.1 to 3.6 V
10
50
23
ns/V
°C/W
°C/W
Q
JA
Thermal Resistance: Junction−to−Ambient
Thermal Resistance: Junction−to−Case
−
Q
JC
−
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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4
FXLA108
POWER−UP/POWER−DOWN SEQUENCE
FXL translators offer an advantage in that either V may
be powered up first. This benefit derives from the chip
The recommended power−down sequence is:
1. Drive /OE input HIGH to disable the device.
CC
design. When either V
is at 0 V, outputs are in a
2. Remove power from either V
.
CC
CC
high−impedance state. The control input (/OE) is designed
to track the V supply. A pull−up resistor tying /OE to
3. Remove power from other V
CC.
CCA
Pull−Up/Pull−Down Resistors
V
CCA
should be used to ensure that bus contention,
Do not use pull−up or pull−down resistors. This device has
bus−hold circuits: pull−up or pull−down resistors are not
recommended because they interfere with the output state.
The current through these resistors may exceed the hold
excessive currents, or oscillations do not occur during
power−up or power−down. The size of the pull−up resistor
is based upon the current−sinking capability of the device
driving the /OE pin.
drive, I
and/or I
bus−hold currents. The
I(HOLD)
I(OD)
The recommended power−up sequence is:
bus−hold feature eliminates the need for extra resistors.
1. Apply power to the first V
.
CC
2. Apply power to the second V
.
CC
3. Drive the /OE input LOW to enable the device.
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5
FXLA108
DC CHARACTERISTICS (T = −40 to 85°C)
A
Symbol
Parameter
Conditions
V
(V)
V
(V)
Min
2.00
Typ
−
Max
Unit
CCA
CCB
V
IHA
High−Level Input Voltage
Data Inputs A Control
2.70 to 3.60 1.10 to 3.60
2.30 to 2.70
−
V
n
Pin /OE
1.60
−
−
1.65 to 2.30
0.65 x V
−
−
CCA
CCA
CCA
1.40 to 1.65
0.65 x V
−
−
1.10 to 1.40
0.9 x V
−
−
V
Data Inputs B
1.10 to 3.60 2.70 to 3.60
2.30 to 2.70
2.00
1.60
−
−
V
V
V
IHB
n
−
−
1.65 to 2.30 0.65 x V
1.40 to 1.65 0.65 x V
−
−
−
CCB
CCB
CCB
−
1.10 to 1.40 0.9 x V
−
−
V
V
Low−Level Input Voltage
Data Inputs A Control
2.70 to 3.60 1.10 to 3.60
−
−
−
−
−
−
−
−
−
−
−
0.8
ILA
n
Pin /OE
2.30 to 2.70
−
0.7
1.65 to 2.30
−
0.35 x V
0.35 x V
CCA
CCA
CCA
1.40 to 1.65
−
1.10 to 1.40
−
0.1 x V
0.8
Data Inputs B
1.10 to 3.60 2.70 to 3.60
2.30 to 2.70
−
ILB
n
−
0.7
1.65 to 2.30
−
0.35 x V
CCB
CCB
CCB
1.40 to 1.65
−
0.35 x V
1.10 to 1.40
−
0.1 x V
V
V
High−Level Output Voltage
(Note 3)
I
I
I
I
= −4 mA
= −4 mA
= 4 mA
1.10 to 3.60 1.10 to 3.60
1.10 to 3.60 1.10 to 3.60
1.10 to 3.60 1.10 to 3.60
1.10 to 3.60 1.10 to 3.60
V
CCA
V
CCB
− 0.4
− 0.4
−
−
−
V
V
OHA
OH
OH
OL
OL
−
OHB
V
V
Low−Level Output Voltage
(Note 3)
−
−
0.4
0.4
−
OLA
= 4 mA
−
−
OLB
I
Bus−Hold Input Minimum
Drive Current
V
V
V
V
V
V
V
V
V
V
= 0.80 V
= 2.00 V
= 0.7 V
3.00
3.00
2.30
2.30
1.65
1.65
1.40
1.40
1.10
1.10
3.60
2.70
1.95
1.60
1.40
3.00
3.00
2.30
2.30
1.65
1.65
1.40
1.40
1.10
1.10
3.60
2.70
1.95
1.60
1.40
75.0
−
mA
I(HOLD)
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
−75.0
45.0
−
−
−
−
= 1.60 V
= 0.57 V
= 1.07 V
= 0.49 V
= 0.91 V
= 0.11 V
= 0.99 V
−45.0
25.0
−
−
−
−
−25.0
11.0
−
−
−
−
−11.0
−
−
−
4.0
−4.0
−
−
−
−
I
Bus−Hold Input Overdrive
High Current (Note 4)
Data Inputs A , B
n
450.00
300.00
200.00
120.00
80.00
−
mA
I(ODH)
n
−
−
−
−
−
−
−
−
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6
FXLA108
DC CHARACTERISTICS (T = −40 to 85°C) (continued)
A
Symbol
Parameter
Conditions
Data Inputs A , B
n
V
(V)
V
(V)
Min
Typ
−
Max
−
Unit
CCA
CCB
I
Bus−Hold Input Overdrive
Low Current (Note 5)
3.60
2.70
1.95
1.60
1.40
3.60
2.70
1.95
1.60
1.40
3.60
−450.00
−300.00
−200.00
−120.00
−80.00
−
mA
I(ODL)
n
−
−
−
−
−
−
−
−
I
I
Input Leakage Current
Control Inputs /OE,
V = V or GND
1.10 to 3.60
−
1.0
mA
mA
I
CCA
I
Power−Off Leakage
Current
A V = 0 V to 3.6 V
0
3.6
0
−
−
−
−
−
−
2.0
2.0
5.0
OFF
n
O
B V = 0 V to 3.6 V
3.60
3.6
n
O
I
3−State Output Leakage
A , B V = 0 V or 3.6 V,
3.60
mA
OZ
n
n
O
/OE = V
IH
A V = 0 V or 3.6 V,
/OE = GND
3.60
0
−
−
−
−
−
−
−
−
−
−
5.0
5.0
n
O
B V = 0 V or 3.6 V,
0
3.60
n
O
/OE = GND
I
Quiescent Supply Current
(Note 6, 7)
V = V or GND; I = 0, 1.10 to 3.60 1.10 to 3.60
10.0
10.0
−10.0
mA
mA
mA
CCA/B
I
CCI
O
/OE = GND
I
V = V or GND; I = 0, 1.10 to 3.60 1.10 to 3.60
CCZ
I
CCI
O
/OE = V
IH
I
I
Quiescent Supply Current
V = V
or GND; I = 0
0
1.10 to 3.60
CCA
I
CCB
O
B−to−A Direction,
/OE = GND
V = V
or GND; I = 0 1.10 to 3.60
0
0
−
−
−
−
10.0
I
CCA
O
A−to−B Direction
V = V or GND; I = 0, 1.10 to 3.60
−10.0
mA
CCB
I
CCA
O
A−to−B Direction,
/OE = GND
V = V
or GND; I = 0
0
1.10 to 3.60
−
−
10.0
I
CCB
O
B−to−A Direction
3. This is the output voltage for static conditions. Dynamic drive specifications are given in the Dynamic Output Electrical Characteristics table.
4. An external drive must source at least the specified current to switch LOW−to−HIGH.
5. An external drive must source at least the specified current to switch HIGH−to−LOW.
6. V
is the V associated with the input side.
CCI
CC
7. Reflects current per supply, V
or V
.
CCA
CCB
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7
FXLA108
DYNAMIC OUTPUT ELECTRICAL CHARACTERISTICS
V
CCA
= 3.0 V
V
CCA
= 2.3 V
V
CCA
= 1.65 V
V
CCA
= 1.4 V
V
CCA
= 1.1 V
to 3.6 V
to 2.7 V
to 1.95 V
to 1.6 V
to 1.3 V
Typ Max
Typ Max
Typ
Max
Typ
Max
Typ
Symbol
A PORT (A )
Parameter
Unit
n
OUTPUT LOAD: C = 15 pF, R ≥ 1 MW (C = 4 pF), T = −40 to 855C
L
L
I/O
A
t
Output Rise Time A Port
(Note 9)
−
3.0
−
3.5
3.5
−
−
4.0
4.0
−
−
5.0
5.0
−
7.5
7.5
ns
ns
rise
t
Output Fall Time A Port
(Note 10)
−
3.0
−
−
−
−
fall
I
Dynamic Output Current High −11.4
(Note 9)
−7.5
+7.5
−4.7
+4.7
−3.2
+3.2
−1.7
+1.7
mA
mA
OHD
I
Dynamic Output Current Low
(Note 10)
+11.4
−
−
−
−
OLD
B PORT (B )
n
OUTPUT LOAD: C = 15 pF, R ≥ 1 MW (C = 5 pF), T = −40 to 855C
L
L
I/O
A
t
Output Rise Time B Port
(Note 9)
−
3.0
−
3.5
3.5
−
−
4.0
4.0
−
−
5.0
5.0
−
7.5
7.5
ns
ns
rise
t
Output Fall Time B Port
(Note 10)
−
3.0
−
−
−
−
fall
I
Dynamic Output Current High −12.0
(Note 9)
−7.9
+7.9
−5.0
+5.0
−3.4
+3.4
−1.8
+1.8
mA
mA
OHD
I
Dynamic Output Current Low
(Note 10)
+12.0
−
−
−
−
OLD
8. Dynamic output characteristics are guaranteed, but not tested.
9. See Figure 7.
10.See Figure 8.
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8
FXLA108
AC CHARACTERISTICS
V
CCB
= 3.0 V
V
CCB
= 2.3 V
V
CCB
= 1.65 V
V
CCB
= 1.4 V
V
CCB
= 1.1 V
to 3.6 V
to 2.7 V
to 1.95 V
to 1.6 V
to 1.3 V
Typ
Max
Typ
Max
Typ
Max
Typ
Max
Typ
Symbol
Parameter
Unit
V
= 3.0 V to 3.6 V, T = −40 to 855C
CCA
A
t
, t
A to B
0.2
0.2
−
4.0
4.0
1.7
0.5
0.3
0.2
−
4.2
4.1
1.7
0.5
0.5
0.3
−
5.4
5.0
1.7
0.5
0.6
0.5
−
6.8
6.0
1.7
1.0
6.9
4.5
1.7
1.0
ns
ns
ms
ns
PLH PHL
B to A
t
, t
/OE to A, /OE to B
PZL PZH
t
A Port, B Port (Note 11)
−
−
−
−
SKEW
V
= 2.3 V to 2.7 V, T = −40 to 855C
CCA
A
t
, t
A to B
0.2
0.3
−
4.1
4.2
1.7
0.5
0.4
0.4
−
4.5
4.5
1.7
0.5
0.5
0.5
−
5.6
5.5
1.7
0.5
0.8
0.5
−
6.9
6.5
1.7
1.0
7.0
4.8
1.7
1.0
ns
ns
ms
ns
PLH PHL
B to A
t
, t
/OE to A, /OE to B
A Port, B Port (Note 11)
PZL PZH
t
−
−
−
−
SKEW
V
= 1.65 V to 1.95 V, T = −40 to 855C
CCA
A
t
, t
A to B
0.3
0.5
−
5.0
5.4
1.7
0.5
0.5
0.5
−
5.5
5.6
1.7
0.5
0.8
0.8
−
6.7
6.7
1.7
0.5
0.9
1.0
−
7.5
7.0
1.7
1.0
7.5
5.4
1.7
1.0
ns
ns
ms
ns
PLH PHL
B to A
t
, t
/OE to A, /OE to B
A Port, B Port (Note 11)
PZL PZH
t
−
−
−
−
SKEW
V
= 1.4 V to 1.6 V, T = −40 to 855C
CCA
A
t
, t
A to B
0.5
0.6
−
6.0
6.8
1.7
1.0
0.5
0.8
−
6.5
6.9
1.7
1.0
1.0
0.9
−
7.0
7.5
1.7
1.0
1.0
1.0
−
8.5
8.5
1.7
1.0
7.9
6.1
1.7
1.0
ns
ns
ms
ns
PLH PHL
B to A
t
, t
/OE to A, /OE to B
A Port, B Port (Note 12)
PZL PZH
t
−
−
−
−
SKEW
V
CCA
= 1.1 V to 1.3 V, T = −40 to 855C
A
Typ
4.6
6.8
1.7
1.0
Typ
4.8
7.0
1.7
1.0
Typ
5.4
7.4
1.7
1.0
Typ
6.2
7.8
1.7
1.0
Typ
9.2
9.1
1.7
1.0
t
, t
A to B
ns
ns
ms
ns
PLH PHL
B to A
t
, t
/OE to A, /OE to B
A Port, B Port (Note 12)
PZL PZH
t
SKEW
11. Skew is the variation of propagation delay between output signals and applies only to output signals on the same port (A or B ) and switching
n
n
with the same polarity (LOW−to−HIGH or HIGH−to−LOW) (see Figure 10).
Skew is guaranteed, but not tested.
12.Skew is the variation of propagation delay between output signals and applies only to output signals on the same port (A or B ) and switching
n
n
with the same polarity (LOW−to−HIGH or HIGH−to−LOW) (see Figure 10).
Skew is guaranteed, but not tested.
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9
FXLA108
MAXIMUM DATA RATE (T = −40 to 85°C)
A
V
CCB
= 3.0 V
V
CCB
= 2.3 V
V
CCB
= 1.65 V
V
CCB
= 1.4 V
V
CCB
= 1.1 V
to 3.6 V
to 2.7 V
to 1.95 V
to 1.6 V
to 1.3 V
Min
140
120
100
80
Min
120
120
100
80
Min
100
100
80
Min
80
Typ
40
V
Unit
Mbps
Mbps
Mbps
Mbps
CCA
V
CCA
V
CCA
V
CCA
V
CCA
= 3.00 V to 3.60 V
= 2.30 V to 2.70 V
= 1.65 V to 1.95 V
= 1.40 V to 1.60 V
80
40
60
40
60
60
40
Typ
40
Typ
40
Typ
40
Typ
40
Typ
40
V
CCA
= 1.10 V to 1.30 V
Mbps
13.Maximum data rate is guaranteed, but not tested.
14.Maximum data rate is specified in megabits per second (see Figure 9). It is equivalent to two times the F−toggle frequency, specified in
megahertz. For example, 100 Mbps is equivalent to 50 MHz.
CAPACITANCE
Symbol
Parameter
Conditions
= GND
T = +255C Typical
Unit
pF
A
C
IN
Input Capacitance Control Pin (/OE)
V
V
= V
= V
3
CCA
CCB
C
Input/Output Capacitance
A
n
B
n
= 3.3 V, /OE = V
CCA
4
pF
I/O
CCA
CCB
5
C
pd
Power Dissipation Capacitance
V
CCA
= V
= 3.3 V, V = 0 V or V , f = 10 MHz
25
pF
CCB
I
CC
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10
FXLA108
I/O ARCHITECTURE BENEFIT
The FXLA108 I/O architecture benefits the end user,
beyond level translation, in the following three ways:
only the bus hold drives the channel. The bus hold can be
over ridden in the event of a direction change. The strong
driver allows the FXLA108 to quickly charge and discharge
capacitive transmission lines during dynamic mode. Static
Auto Direction without an external direction pin.
Drive Capacitive Loads. Automatically shifts to a higher
current drive mode only during “Dynamic Mode” or HL /
LH transitions.
mode conserves power, where I is typically < 5 mA.
CC
Bus Hold Minimum Drive Current
Specifies the minimum amount of current the bus hold
driver can source/sink. The bus hold minimum drive current
Lower Power Consumption. Automatically shifts to
low−power mode during “Static Mode” (no transitions),
lowering power consumption.
(II
) is V
dependent and guaranteed in the DC
HOLD
CC
Electrical tables. The intent is to maintain a valid output state
in a static mode, but that can be overridden when an input
data transition occurs.
The FXLA108 does not require a direction pin. Instead,
the I/O architecture detects input transitions on both side and
automatically transfers the data to the corresponding output.
For example, for a given channel, if both A and B side are
at a static LOW, the direction has been established as A → B,
and a LH transition occurs on the B port; the FXLA108
internal I/O architecture automatically changes direction
from A → B to B → A.
During HL / LH transitions, or “Dynamic Mode,” a strong
output driver drives the output channel in parallel with a
weak output driver. After a typical delay of approximately
10 ns – 50 ns, the strong driver is turned off, leaving the weak
driver enabled for holding the logic state of the channel. This
weak driver is called the “bus hold.” “Static Mode” is when
Bus Hold Input Overdrive Drive Current
Specifies the minimum amount of current required (by an
external device) to overdrive the bus hold in the event of a
direction change. The bus hold overdrive (II , II ) is
ODH ODL
V
CC
dependent and guaranteed in the DC Electrical tables.
Dynamic Output Current
The strength of the output driver during LH / HL
transitions is referenced on page 8, Dynamic Output
Electrical Characteristics, I
, and I
.
OHD
OLD
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11
FXLA108
TEST DIAGRAMS
VCC
DUT
C1
R1
Figure 3. Test Circuit
Table 1. AC TEST CONDITIONS
Test
Input Signal
Data Pulses
0 V
Output Enable Control
0 V
t
, t
PLH PHL
t
HIGH to LOW Switch
HIGH to LOW Switch
PZL
t
V
CCI
PZH
Table 2. AC LOAD
V
CCo
C1
R1
1.2 V 0.1 V
1.5 V 0.1 V
1.8 V 0.15 V
2.5 V 0.2 V
3.3 V 0.3 V
15 pF
15 pF
15 pF
15 pF
15 pF
1 MW
1 MW
1 MW
1 MW
1 MW
VCCI
DATA
IN
Vmi
GND
tpxx
tpxx
VCCO
DATA
OUT
Vmo
NOTES:
15.Input t = t = 2.0 ns, 10% to 90%.
R
F
16.Input t = t = 2.5 ns, 10% to 90%, at V = 3.0 V to 3.6 V only.
R
F
I
Figure 4. Waveform for Inverting and Non−Inverting Functions
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12
FXLA108
VCCA
GND
OUTPUT
CONTROL
VmI
t PZL
DATA
OUT
VY
VOL
NOTES:
17.Input t = t = 2.0 ns, 10% to 90%.
R
F
18.Input t = t = 2.5 ns, 10% to 90%, at V = 3.0 V to 3.6 V only.
R
F
I
Figure 5. 3−State Output Low Enable Time for Low Voltage Logic
VCCA
OUTPUT
VmI
CONTROL
GND
tPZH
VOH
VX
DATA
OUT
NOTES:
19.Input t = t = 2.0 ns, 10% to 90%.
R
F
20.Input t = t = 2.5 ns, 10% to 90%, at V = 3.0 V to 3.6 V only.
R
F
I
Figure 6. 3−State Output High Enable Time for Low Voltage Logic
Table 3. TEST MEASURE POINTS
Symbol
V
DD
V
MI
(Note 21)
V
/ 2
/ 2
CCI
V
MO
V
CCO
V
0.9 x V
0.1 x V
X
CCO
CCO
V
Y
21.V
= V
for control pin /OE or V = (V
/ 2).
CCI
CCA
MI
CCA
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13
FXLA108
t rise
VOH
80% x VCCO
VOUT
20% x VCCO
VOL
Time
DVOUT
Dt
(20% * 80%) @ VCCO
ǒ
Ǔ
ǒ
Ǔ
IOHD [ CL ) CIńO
+ CL ) CIńO
tRISE
Figure 7. Active Output Rise Time and Dynamic Output Current High
VOH
t fall
80% x VCCO
VOUT
20% x VCCO
VOL
Time
DVOUT
(80% * 20%) @ VCCO
ǒ
Ǔ
ǒ
Ǔ
IOLD [ CL ) CIńO
+ CL ) CIńO
tFALL
Dt
Figure 8. Active Output Fall Time and Dynamic Output Current Low
tW
VCCI
DATA
VCCI / 2
VCCI / 2
IN
GND
Maximum Data Rate, f = 1 / t
W
Figure 9. Maximum Data Rate
VCCO
DATA
OUTPUT
Vmo
Vmo
GND
t skew
t skew
VCCO
GND
DATA
OUTPUT
Vmo
Vmo
NOTE:
22.t
= (t
– t
pHLmin
) or (t
– t
pLHmin
)
SKEW
pHLmax
pLHmax
Figure 10. Output Skew Time
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14
FXLA108
ORDERING INFORMATION
†
Part Number
FXLA108BQX
Operating Temperature Range
−40 to 85°C
Package
Shipping
WQFN20 4.5x2.5, 0.5P
20−Terminal DQFN 2.5mm x 4.5mm Package
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
15
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WQFN20 4.5x2.5, 0.5P
CASE 510CD
ISSUE O
DATE 31 AUG 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13645G
WQFN20 4.5X2.5, 0.5P
PAGE 1 OF 1
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