FSUSB73UMX [ONSEMI]
高速USB 2.0开关/多路复用器;型号: | FSUSB73UMX |
厂家: | ONSEMI |
描述: | 高速USB 2.0开关/多路复用器 开关 复用器 |
文件: | 总12页 (文件大小:606K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON
Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
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April 2012
FSUSB73
3:1 High-Speed USB Multiplexer and Hub Routing Switch
Description
Features
Switch Type
USB
The FSUSB73 is a bi-directional, low-power, high-speed
USB 2.0 3:1 MUX plus one isolation switch. It is optimized
for switching three high-speed (480Mbps) or full / low-speed
USB / UART sources to one USB 2.0 connector. In addition,
the FSUSB73 has an integrated routing USB switch to allow
communication between a USB hub and another processor
without re-enumeration.
3:1 MUX + Isolation Switch
USB 2.0 High-Speed &
Full-Speed Compliant
RON
6.5Ω
CON
6pF
ESD (IEC61000-4-2)
15kV (Air), 8kV (Contact)
VCC
2.5 to 4.4V
<1µA
Related Resources
ICCSLP
ICCACT
9µA
. For samples and questions, please contact:
Analog.Switch@fairchildsemi.com.
16- Lead UMLP 1.8 x 2.6 x
0.55mm, 0.40mm Pitch
Package
. FSUSB73 Demonstration Board
. FSUSB73 Evaluation Board
Ordering Information
FSUSB73UMX (UMLP)
Applications
. MP3 Portable Media Players
. Cellular Phones, Smartphones
. Netbook, Mobile Internet Device (MID)
. Enables USB Hub Switching
Typical Application
FSUSB73
USB Port
Application
µProcessor
HS-USB 0
D+
D-
HS-USB 1
4G
µProcessor
USB HUB
HS-USB 2
HS-USB 2S
3G
µProcessor
Figure 1. Mobile Phone Example
© 2010 Fairchild Semiconductor Corporation
FSUSB73 • Rev. 1.0.2
www.fairchildsemi.com
Pin Configuration
SELS /OE HSD0- HSD0+
16
15
14
13
HSD0+
HSD1+
HSD2+
HSD2S+
HSD0–
HSD1-
HSD1+
HSD2+
HSD2-
12
11
10
9
GND
D+
1
2
D+
D-
3
HSD1–
HSD2–
D–
VCC
4
Ctrl
SELS
HSD2S–
SEL1
SEL0
5
6
7
8
/OE
Control
SEL1 SEL0 HSD2S- HSD2S+
Figure 2. Pin Assignments (Top View)
Figure 3. Analog Symbol
Pin Descriptions
Pin #
1
Name
GND
Type
Ground
I/O
Description
Ground
2
D+
D+ Common Port (HS or FS USB)
D- Common Port (HS or FS USB)
3
D-
I/O
4
VCC
Power Supply Supply Voltage
5
SEL1
SEL0
HSD2S-
HSD2S+
HSD2-
HSD2+
HSD1+
HSD1-
HSD0+
HSD0-
/OE
Input
Input
I/O
Path Selection Control Input (see Truth Tables)
Path Selection Control Input (see Truth Tables)
6
7
HSD2- from Isolation Switch (HS or FS USB)
HSD2+ from Isolation Switch (HS or FS USB)
D- from Third Source Path (HS or FS USB)
D+ from Third Source Path (HS or FS USB)
D+ from Second Source Path (HS or FS USB)
D- from Second Source Path (HS or FS USB)
D+ from First Source Path (HS or FS USB)
D- from First Source Path (HS or FS USB)
Enable Control Input (see Truth Tables)
8
I/O
9
I/O
10
11
12
13
14
15
16
I/O
I/O
I/O
I/O
I/O
Input
Input
SELS
Path Selection Control Input (see Truth Table)
© 2010 Fairchild Semiconductor Corporation
FSUSB73 • Rev. 1.0.2
www.fairchildsemi.com
2
Truth Tables
Table 1. 3:1 USB Switch Control
/OE
1
SEL1
SEL0
Function
X
0
1
1
0
X
1
0
1
0
All Switch Paths Open
D+ = HSD0+, D- = HSD0-
D+ = HSD1+, D- = HSD1-
D+ = HSD2+, D- = HSD2-
All Switch Paths Open
0
0
0
0
Table 2. Isolation Switch Control
SELS
Function
0
1
HSD2S+ = Open, HSD2S- = Open
HSD2S+ = HSD2+, HSD2S- = HS2S-
Functionality
HSD0
HSD1
HSD0
HSD1
Proc. 1
Proc. 2
Proc 1
HOST
HOST
Proc 2
SEL0=0
SEL1=1
SELS=0
SEL0=1
SEL1=0
SELS=0
HSD2S
HSD2
HSD2S
HSD2
Proc. 3
Proc 3
Figure 4. Typical USB Application 1
Figure 5. Typical USB Application 2
HSD0
HSD0
Proc. 1
Proc. 1
HSD1
HSD1
HOST
HOST
HUB
Proc. 2
Proc. 2
SEL0=0
SEL1=1
SELS=1
SEL0=1
SEL1=1
SELS=0
HSD2S
HSD2
HSD2S
HSD2
Proc. 3
Proc 3
Figure 6. Typical USB Application 3
Figure 7. Loopback USB Application
© 2010 Fairchild Semiconductor Corporation
FSUSB73 • Rev. 1.0.2
www.fairchildsemi.com
3
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable
above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition,
extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute
maximum ratings are stress ratings only.
Symbol
Parameter
Min.
-0.50
-0.5
Max.
5.25
VCC
Unit
V
VCC
Supply Voltage
VCNTRL DC Input Voltage (SEL1, SEL0, /OE, SELS)(1)
V
VSW
IIK
DC Switch I/O Voltage(1)
-0.50
-50
5.25
V
DC Input Diode Current
mA
°C
TSTG
MSL
Storage Temperature
-65
+150
1
Moisture Sensitivity Level (JEDEC J-STD-020A)
Level
Air Gap
15
8
IEC61000-4-2 System on USB Connector Pins D+ & D-
Human Body Model, JEDEC: JESD22-A114
Contact
ESD
D+, D- to GND
Power to GND
All Other Pins
6
kV
12
2
Note:
1. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating
conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend
exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
Min.
2.5
0
Max.
4.4
Unit
V
VCC
Supply Voltage
VCNTRL Control Input Voltage (SEL1, SEL0, /OE, and SELS)(2)
VCC
4.4
V
VSW
TA
Switch I/O Voltage
-0.5
-40
V
Operating Temperature
+85
°C
Note:
2. The control input must be held HIGH or LOW; it must not float.
© 2010 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSUSB73 • Rev. 1.0.2
4
DC Electrical Characteristics
All typical values are for VCC=3.3V at TA=25°C unless otherwise specified.
TA=- 40ºC to +85ºC Unit
Min. Typ. Max.
Symbol
Parameter
Conditions
VCC (V)
RON
HS Switch On Resistance(3)
VSW=0.4V, ION=-8mA, Figure 8
VSW=0.4V, ION=-8mA
3.3
3.3
6.5
0.5
9.0
(4,3)
∆RON
HS Delta RON
All Combinations of /OE, SELS, SEL1,
SEL0 in Truth Tables (Table 1, Table 2)
(1=VCC, 0=0V)
IIN
Control Input Leakage
Off State Leakage
4.4
-1
1
µA
0Dn, HSD0n, HSD1n, HSD2n,
HSD3n, HSD2Sn 4.4V
IOZ
4.4
0
-1
-1
1
1
µA
µA
µA
µA
Power-Off Leakage Current
(All I/O Ports)
IOFF
VSW=0V to 4.4V, VCC=0V, Figure 9
All Disabled Conditions in Truth Tables
(Table 1, Table 2)
ICCSLP
ICCACT
Sleep Mode Supply Current
Active Mode Supply Current
4.4
4.4
1
All Active Modes in Truth Tables
(Table 1, Table 2)
9
18
VCNTRL=1.8V
4.4
4.4
2.5
3.3
4.9
4.0
6.0
µA
µA
V
Increase in ICC Current per
Control Input and VCC
ICCT
VCNTRL=1.2V
VIK
VIH
Clamp Diode Voltage
IIN=-18mA
-1.2
Control Input Voltage HIGH
Control Input Voltage LOW
SEL1, SEL0, /OE, SELS
SEL1, SEL0, /OE, SELS
2.5 to 4.4 1.0
2.5 to 4.4
V
VIL
0.35
V
Notes:
3. Measured by the voltage drop between HSDn and Dn pins at the indicated current through the switch. On resistance is
determined by the lower of the voltage on the two (HSDn or Dn ports).
4. Guaranteed by characterization.
© 2010 Fairchild Semiconductor Corporation
FSUSB73 • Rev. 1.0.2
www.fairchildsemi.com
5
AC Electrical Characteristics
All typical values are for VCC=3.3V at TA=25°C unless otherwise specified.
TA=- 40ºC to +85ºC
Min. Typ. Max.
Symbol
Parameter
Conditions
VCC (V)
Unit
Turn-On Time when Switching
from One USB Path (or
Disabled i.e. /OE=1) to
Another USB Path
RL=50Ω, CL=35pF, VSW=0.8V,
Figure 10, Figure 11
tON
2.5 to 4.4
126
400
80
µs
Turn-Off Time, Turning Off
Any of the USB Paths
RL=50Ω, CL=35pF, VSW= 0.8V,
Figure 10, Figure 11
tOFF
tPD
2.5 to 4.4
3.3
ns
ns
ns
CL=5pF, RL=50Ω, Figure 10,
Figure 12
Propagation Delay(5)
0.25
4.5
Slow Turn on/off Switch
Paths(5)
CL=5pF, Dn at 0V or 3.6V, 40.5Ω in
Series with Switch 10% to 90%
tRF
3.3
RL=50Ω, CL=35pF, VSW1=VSW2
0.8V, Figure 14
=
tBBM
OIRR
Xtalk
Break-Before-Make Time(5)
Off Isolation(5)
2.5 to 4.4
2.5 to 4.4
2.5 to 4.4
126
400
µs
dB
dB
RL=50Ω, f=240MHz, Figure 16
RL=50Ω, f=240MHz, Figure 17
-40
-40
Channel-to-Channel
Crosstalk(5)
tSK(P)
Pulse Skew(5)
VSW=0.2VdiffPP, Figure 13, CL=5pF
2.5 to 4.4
2.5 to 4.4
25
25
ps
ps
Skew Between Differential
Signals within a Pair(5)
tSK(I)
Note:
VSW=0.2VdiffPP, Figure 13, CL=5pF
5. Guaranteed by characterization.
Capacitance Characteristics
All typical values are for VCC=3.3V at TA=25°C unless otherwise specified.
TA=- 40ºC to
+85ºC
Unit
Symbol
Parameter
Conditions
VCC (V)
Typ.
CIN
Input Capacitance(6)
0
3.0
pF
pF
pF
pF
HSD0 or HSD1 path, f=1MHz,
Figure 19
CONa
CONb
CONc
D+/D- On Capacitance(6)
D+/D- On Capacitance(6)
D+/D- On Capacitance(6)
3.3
3.3
3.3
7.2
7.7
5.4
HSD2 path, f=1MHz, Figure 19
HSD2S to HSD2S path, f=1MHz,
Figure 19
HSD0n, HSD1n, HSD2Sn,
HSD3n Off Capacitance(6)
If VCC=3.3V, then /OE=3.3V,
f=1MHz, Figure 18
COFF
0 or 3.3
2.2
pF
Note:
6. Guaranteed by characterization
© 2010 Fairchild Semiconductor Corporation
FSUSB73 • Rev. 1.0.2
www.fairchildsemi.com
6
Test Diagrams
VON
IDn(OFF)
NC
A
HSD
n
V
Dn
SW
V
Select
SW
GND
ION
GND
V
Sel= 0 orVcc
Select
GND
**Each switch port is tested separately
V
Sel= 0 orVcc
R
ON = VON / ION
Figure 8. On Resistance
Figure 9. Off Leakage
HSD
n
Dn
C
V
SW
VOUT
R
R
GND
L
L
S
GND
V
Sel
GND
RL , R , and CL are functions of the application
S
environment (see AC Tables for specific values)
CL includes test fixture and stray capacitance.
Figure 10. AC Test Circuit Load
Figure 11. Turn-On / Turn-Off Waveforms
t
= 750ps
t
= 750ps
FALL
RISE
0.4V
400mV
90%
90%
50%
Input
– V
D+/D
50%
50%
-
Input
50%
0V
10%
10%
tPLH
tPHL
GND
+
VOH
VOH
Output
50%
50%
Output
- V
VOL
OUT
pLH-
50%
50%
-
V
OL
t
t
t
t
pLH+
pHL+
pHL-
Figure 12. Propagation Delay (tRtF – 500ps)
Figure 13. Skew Test Waveforms
SK(P) = | tPLH- – tPHL- | or | tPLH+ – tPHL+
tSK(I) = | tPLH- – tPHL+ | or | tPLH+ – tPHL-
t
|
|
© 2010 Fairchild Semiconductor Corporation
FSUSB73 • Rev. 1.0.2
www.fairchildsemi.com
7
Test Diagrams (Continued)
tRISE= 2.5ns
Vcc
Input - VSel
HSD
90%
Vcc/2
n
Dn
C
V
SW1
10%
0V
VOUT
GND
L
V
R
L
SW2
VOUT
GND
0.9*Vout
GND
0.9*Vout
R
S
tBBM
V
Sel
RL , R , and CL are functions of the application
S
GND
environment (see AC Tables for specific values)
CL includes test fixture and stray capacitance.
Figure 14. Break-Before-Make Interval Timing
Network Analyzer
RS
Network Analyzer
R
S
VIN
V
IN
V
GND
VS
R
T
GND
S
GND
OUT
GND
V
GND
V
Sel
Sel
V
VOUT
GND
GND
GND
R
GND
T
RT
RS and RT are functions of the application
environment (see AC Tables for specific values).
Off isolation = 20 Log (VOUT / VIN
GND
GND
RS and RT are functions of the application
)
environment (see AC Tables for specific values).
Figure 15. Bandwidth
Figure 16. Channel-Off Isolation
Network Analyzer
NC
R
S
V
IN
V
GND
S
GND
V
Sel
GND
R
T
GND
V
OUT
GND
R
T
RS and RT are functions of the application environment
(see AC Tables for specific values).
GND
Crosstalk = 20 Log (VOUT / VIN)
Figure 17. Non-Adjacent Channel-to-Channel Crosstalk
HSD
HSD
n
Capacitance
Meter
n
S
S
V
Capacitance
Meter
V
= 0 or V
cc
Sel
= 0 or V
cc
Sel
HSD
HSD
n
n
Figure 18. Channel Off Capacitance
Figure 19. Channel On Capacitance
© 2010 Fairchild Semiconductor Corporation
FSUSB73 • Rev. 1.0.2
www.fairchildsemi.com
8
Physical Dimensions
2.10
0.563(15X)
0.10
C
1.80
A
B
0.663
0.40
2X
1
2.60
2.90
PIN#1 IDENT
0.10 C
TOP VIEW
0.225
(16X)
2X
RECOMMENDED
LAND PATTERN
0.55 MAX.
0.152
0.10 C
0.08
C
TERMINAL SHAPE VARIANTS
SEATING
PLANE
C
0.05
0.00
0.40
0.60
SIDE VIEW
0.30
0.50
0.15
0.25
0.15
0.25
0.10
15X
15X
0.45
0.10
0.35
PIN 1
NON-PIN 1
5
Supplier 1
9
0.40
0.30
0.50
0.15
0.25
0.15
15X
0.25
0.30
0.50
15X
1
PIN 1
NON-PIN 1
PIN#1 IDENT
Supplier 2
13
16
0.25
0.15
0.55
0.45
0.10 C
0.05 C
A B
BOTTOM VIEW
R0.20
PACKAGE
EDGE
NOTES:
A. PACKAGE DOES NOT FULLY CONFORM TO
JEDEC STANDARD.
LEAD
OPTION 2
SCALE : 2X
LEAD
OPTION 1
SCALE : 2X
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
D. LAND PATTERN RECOMMENDATION IS
BASED ON FSC DESIGN ONLY.
E. DRAWING FILENAME: MKT-UMLP16Arev4.
F. TERMINAL SHAPE MAY VARY ACCORDING
TO PACKAGE SUPPLIER, SEE TERMINAL
SHAPE VARIANTS.
Figure 20. 16-Pin Ultrathin Molded Leadless Package (UMLP)
Operating
Temperature Range
Packing
Method
Order Number
Package Description
FSUSB73UMX
-40 to 85°C
16-Terminal Ultrathin Molded Leadless Package (UMLP)
Tape & Reel
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without
notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most
recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty
therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2010 Fairchild Semiconductor Corporation
FSUSB73 • Rev. 1.0.2
www.fairchildsemi.com
9
© 2010 Fairchild Semiconductor Corporation
FSUSB73 • Rev. 1.0.2
www.fairchildsemi.com
10
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coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
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