FST3257MX [ONSEMI]
四路 2:1 多路复用器/信号分离器总线开关;
| 型号： | FST3257MX |
| 厂家： | 
ONSEMI |
| 描述： | 四路 2:1 多路复用器/信号分离器总线开关 开关 PC 光电二极管 逻辑集成电路 复用器 |
| 文件： | 总12页 (文件大小：647K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended
or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out
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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
May 2009
FST3257
Quad 2:1 Multiplexer / Demultiplexer Bus Switch
Features
Description
The Fairchild Switch FST3257 is a quad 2:1 high-speed
CMOS TTL-compatible multiplexer / demultiplexer bus
switch. The low on resistance of the switch allows
inputs to be connected to outputs without adding
propagation delay or generating additional ground
bounce noise.
4Ω Switch Connection Between Two Ports
Minimal Propagation Delay Through the Switch
Low ICC
Zero Bounce in Flow-Through Node
Control Inputs Compatible with TTL Level
When /OE is LOW, the select pin connects the A port to
the selected B port output. When /OE is HIGH, the
switch is OPEN and a high-impedance state exists
between the two ports.
Ordering Information
Operating
Part Number Temperature
Range
Packing
Package
Method
Eco Status
FST3257M
FST3257MX
FST3257QSC
-40 to 85°C
-40 to 85°C
-40 to 85°C
Tubes
Tape and Reel
Tubes
16-Lead Small Outline Integrated Circuit
(SOIC) JEDEC MS-012,0.150 Narrow
RoHS
Green
RoHS
16-Lead Quarter Size Outline Package
(QSOP) JEDEC MO-137 0.150 Inch Wide
FST3257QSCX -40 to 85°C
FST3257MTC -40 to 85°C
FST3257MTCX -40 to 85°C
Tape and Reel
Tubes
16-Lead Thin Shrink Small Outline Package
(TSSOP) JEDEC MO-153, 4mm Wide
Tape and Reel
For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
© 1997 Fairchild Semiconductor Corporation
FST3257 • Rev. 1.0.3
www.fairchildsemi.com
Pin Assignments
Figure 1. Logic Diagram
Figure 2. Connection Diagram
Pin Descriptions
Pin #
Names
Description
1
S
Select Input
2, 3, 5, 6, 10, 11, 13, 14
1B1, 1B2 ,2B1, 2B2, 3B1, 3B2, 4B1, 4B2
Bus B
Bus A
4, 7, 9, 12
1A, 2A, 3A, 4A
GND
8
Ground
15
16
/OE
Bus Switch Enables
Supply Voltage
VCC
Truth Table
Select Inputs
S
Bus Switch Enabled
Logic Level HIGH
Logic Level LOW
Function
Disconnected
A=B1
Logic Level LOW
Logic Level HIGH
Logic Level LOW
A=B2
© 1997 Fairchild Semiconductor Corporation
FST3257 • Rev. 1.0.3
www.fairchildsemi.com
2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only.
Symbol
VCC
Parameter
Min.
-0.5
-0.5
-0.5
Max.
+7.0
+7.0
+7.0
-50
Unit
V
Supply Voltage
VS
DC Switch Voltage
DC Input Voltage(1)
V
VIN
V
IIK
DC Input Current
mA
mA
mA
°C
IOUT
DC Output Sink Current
DC VCC/GND Current
Storage Temperature Range
128
ICC/IGND
TSTG
±100
+150
-65
Note:
1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are
observed.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VCC
Parameter
Power Supply Operating
Min.
3.0
0
Max.
5.5
5.5
5.5
5
Unit
V
VIN
Input Voltage
V
VOUT
Output Voltage
0
V
Switch Control Input
Switch I/O
0
tr,tf
TA
Input Rise and Fall Time
ns/V
°C
0
DC
+85
Free Air Operating Temperature
-40
Note:
2. Unused control inputs must be held HIGH or LOW. They may not float.
© 1997 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FST3257 • Rev. 1.0.3
3
DC Electrical Characteristics
TA=-40 to +85°C
Min. Typ.(3) Max.
Symbol
Parameter
Conditions
IIN=-18mA
VCC (V)
Units
VIK
VIH
Clamp Diode Voltage
4.5
3.0 to 3.6(5)
4.0 to 5.5
3.0 to 3.6(5)
4.0 to 5.5
5.5
-1.2
V
V
1.8
High-Level Input Voltage
2.0
0.7
VIL
Low-Level Input Voltage
V
0.8
IIN
Input Leakage Current
±1.0
±1.0
µA
µA
0 ≤ VIN ≤ 5.5
IOZ
Off-state Leakage Current
5.5
3.3(5)
3.3(5)
3.3(5)
0 ≤ A, B ≤ VCC
VIN=0V, IIN=64mA
VIN=0V, IIN=30mA
VIN=2.4V, IIN=15mA
VIN=2.4V, IIN=15mA
VIN=0V, IIN=64mA
VIN=0V, IIN=30mA
VIN=2.4V, IIN=15mA
VIN=2.4V, IIN=15mA
VIN=VCC or GND,
13
28
200
210
4
20
40
230
250
7
3.0(5)
RON
Switch On Resistance(4)
Ω
4.5
4.5
4
7
4.5
8
15
20
4.0
11
ICC
Quiescent Supply Current
Increase in ICC per input
5.5
5.5
3
µA
I
OUT=0,
One Input at 3.4V, Other
inputs at VCC or GND
2.5
mA
ΔICC
Notes:
3. Typical values are at nominal VCC for the VCC range and TA=25°C.
4. Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance
is determined by the lower of the voltages on the A or B pins.
5. This parameter is guaranteed by design, but is not tested.
© 1997 Fairchild Semiconductor Corporation
FST3257 • Rev. 1.0.3
www.fairchildsemi.com
4
AC Electrical Characteristics
TA=-40 to +85°C, CL= 50pF,
RU=RD=500Ω
Units Figure
Symbol
Parameter
Conditions
VCC= 4.5
to 5.5V
VCC=3.0
VCC=4.0V
to 3.6V(7)
Min.
Max. Min.
Max.
Min.
Max.
Propagation Delay
Bus to Bus(6)
0.25
6.8
Figure 3
ns
tPHL,tPLH
V
IN=Open
0.25
0.25
Figure 4
Propagation Delay
Select to Bus A(6)
1.0
1.0
Output Enable
Time, Select to
Bus B
7.9
8.5
9.9
9.9
VIN=7V for tPZL
VIN=Open for
tPZH
Figure 3
ns
tPZH,tPZL
1.0
1.5
5.0
5.3
5.5
5.6
Figure 4
Output Enable
Time, Select to
Bus /OE
1.0
1.0
1.5
Output Disable
Time, Select to
Bus B
VIN=7V for tPLZ
VIN=Open for
tPHZ
Figure 3
ns
tPHZ,tPLZ
Figure 4
Output Disable
Time, Select to
Bus /OE
Notes:
6. This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other
than the RC delay of the typical on resistance of the switch and the 50pF load capacitance, when driven by an
ideal voltage source (zero output impedance).
7. These parameters are guaranteed by design, but not tested.
Capacitance
TA=+25°C, f=1MHz. Capacitance is characterized by not tested.
Symbol
Parameter
Conditions
VCC=5.0V
Typ.
3.0
7.0
5.0
3.0
3.5
Max.
Units
CIN
Control Pin Input Capacitance
pF
A Port
B Port
A Port
B Port
VCC /OE=5.0V
VCC /OE=3.3V
pF
pF
CI/O
Input/Output Capacitance
© 1997 Fairchild Semiconductor Corporation
FST3257 • Rev. 1.0.3
www.fairchildsemi.com
5
AC Loadings and Waveforms
Notes:
8. Input driven by 50Ω source terminated in 50Ω.
9. CL included load and stray capacitance.
10. Input PRR=1.0MHz, tw=500ns.
Figure 3. AC Test Circuit
Figure 4. AC Waveforms
© 1997 Fairchild Semiconductor Corporation
FST3257 • Rev. 1.0.3
www.fairchildsemi.com
6
Physical Dimensions
10.00
9.80
A
8.89
16
9
B
1.75
4.00
3.80
6.00
5.6
1
8
PIN ONE
NDICATOR
0.51
0.35
1.27
(0.30)
1.27
0.65
M
0.25
C B A
LAND PATTERN RECOMMENDATION
1.75 MAX
SEE DETAIL A
1.50
1.25
0.25
0.19
0.25
0.10
C
0.10
C
0.50
0.25
X 45°
NOTES: UNLESS OTHERWISE SPECIFIED
(R0.10)
(R0.10)
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AC, ISSUE C.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD
FLASH AND TIE BAR PROTRUSIONS
GAGE PLANE
0.36
8°
0°
D) CONFORMS TO ASME Y14.5M-1994
E) LANDPATTERN STANDARD: SOIC127P600X175-16AM
F) DRAWING FILE NAME: M16AREV12.
SEATING PLANE
0.90
0.50
(1.04)
DETAIL A
SCALE: 2:1
Figure 5. 16-Lead Small Outline Integrated Circuit (SOIC) JEDEC MS-012,0.150 Narrow
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 1997 Fairchild Semiconductor Corporation
FST3257 • Rev. 1.0.3
www.fairchildsemi.com
7
Physical Dimensions
LAND PATTERN
TOP VIEW
RECOMMENDATION
END VIEW
SIDE VIEW
DETAIL A
Figure 6. 16-Lead Quarter Size Outline Package (QSOP) JEDEC MO-137 0.150 Inch Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 1997 Fairchild Semiconductor Corporation
FST3257 • Rev. 1.0.3
www.fairchildsemi.com
8
Physical Dimensions
5.00±0.10
4.55
5.90
4.45 7.35
0.65
4.4±0.1
1.45
5.00
0.11
12°
MTC16rev4
Figure 7. 16-Lead Thin Shrink Small Outline Package (TSSOP) MO-153, 4.4mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 1997 Fairchild Semiconductor Corporation
FST3257 • Rev. 1.0.3
www.fairchildsemi.com
9
© 1997 Fairchild Semiconductor Corporation
FST3257 • Rev. 1.0.3
www.fairchildsemi.com
10
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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