FSB50825BS [ONSEMI]
Intelligent Power Module (IPM), 250V, 3.6A;
| 型号： | FSB50825BS |
| 厂家： | 
ONSEMI |
| 描述： | Intelligent Power Module (IPM), 250V, 3.6A 电动机控制 |
| 文件： | 总14页 (文件大小：712K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FSB50825B/FSB50825BS
Motion SPM) 5 Series
Description
The FSB50825B / FSB50825BS is an advanced Motion SPM 5 module
providing a fully−featured, high−performance inverter output for AC
Induction, BLDC and PMSM motors such as refrigerators, fans and pumps.
These modules integrate optimized gate drive of the built−in MOSFETs
(FRFET technology) to minimize EMI and losses, while also providing
multiple on−module protection features including under−voltage lockouts
and thermal monitoring. The built−in high−speed HVIC requires only a single
supply voltage and translates the incoming logic−level gate inputs to the
high−voltage, high−current drive signals required to properly drive the
module’s internal MOSFETs. Separate open−source MOSFET terminals are
available for each phase to support the widest variety of control algorithms.
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SPM5E−023 / 23LD, PDD STD
Features
CASE MODEJ
• UL Certified No. E209204 (UL1557)
• Optimized for Over 10 kHz Switching Frequency
• 250 V R
= 0.55 ꢀ(Max) FRFET MOSFET 3−Phase Inverter
with Gate Drivers and Protection
DS(ON)
• Built−In Bootstrap Diodes Simplify PCB Layout
• Separate Open−Source Pins from Low−Side MOSFETs for
Three−Phase Current−Sensing
• Active−HIGH Interface, Works with 3.3 / 5 V Logic, Schmitt−trigger
Input
SPM5H−023 / 23LD, PDD STD,
SPM23−BD
CASE MODEM
• Optimized for Low Electromagnetic Interference
MARKING DIAGRAM
• HVIC for Gate Driving and Under−Voltage Protection
• Isolation Rating: 1500 V / min
rms
$Y&Z&K&E&E&E&3
FSB50825X
• RoHS Compliant
• Moisture Sensitive Level (MSL) 3 for SMD PKG
Applications
$Y
&Z
&3
&K
= ON Semiconductor Logo
= Assembly Plant Code
= Data Code (Year & Week)
= Lot
• 3−Phase Inverter Driver for Small Power AC Motor Drives
FSB50825X
= Specific Device Code
X = B or BS
ORDERING INFORMATION
See detailed ordering and shipping information on page 3 of
this data sheet.
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
January, 2019 − Rev. 0
FSB50825B/D
FSB50825B/FSB50825BS
ABSOLUTE MAXIMUM RATINGS (T = 25°C, Unless otherwise noted)
C
Conditions
Symbol
Parameter
Rating
Unit
DC Link Input Voltage,
Drain−Source Voltage of Each MOSFET
V
PN
250
V
V
= 0V, I = 250 ꢁ A
BV
Drain−Source Voltage
250
40
V
IN
D
DSS
V
PN
V
DD
= 200V, V = 0V,
IN
ꢁ
A
I
Zero−Bias Static Leakage Current
PN
= V = 0V,
BS
T = T = 25°C for all phase
C
J
I
I
(Note 2)
(Note 2)
Each MOSFET Drain Current, Continuous
Each MOSFET Drain Current, Continuous
Each MOSFET Drain Current, Peak
T = 25°C
3.6
2.7
A
A
A
D 25
C
T = 80°C
C
D 80
T = 25°C, PW < 100 ꢁ s
C
I
I
(Note 2)
9.0
1.9
DP
(Note 2) Each FRFET Drain Current, Rms
T = 80°C, F
C
< 20 kHz
A
rms
DRMS
PWM
P
D
(Note 2)
Maximum Power Dissipation
T = 25°C, For Each MOSFET
C
14.2
W
CONTROL PART (Each HVIC Unless Otherwise Specified)
Symbol
Parameter
Control Supply Voltage
Conditions
Rating
20
Unit
V
V
DD
Applied Between V and COM
DD
V
BS
High−side Bias Voltage
Applied Between V and V
S
20
V
B
V
IN
Input Signal Voltage
Applied Between IN and COM
−0.3 ~ V +0.3
V
DD
BOOTSTRAP DIODE PART (Each Bootstrap Diode Unless Otherwise Specified)
Conditions
Symbol
Parameter
Rating
Unit
V
Maximum Repetitive Reverse Voltage
RRMB
V
A
250
0.5
I
I
(Note 2)
Forward Current
T = 25°C
C
FB
(Note 2)
Forward Current (Peak)
T = 25°C, Under 1ms Pulse Width
C
FPB
1.5
A
THERMAL RESISTANCE
Symbol
Conditions
Parameter
Rating
Unit
_C/W
Inverter MOSFET part, (Per Module)
1.7
TOTAL SYSTEM
Symbol
Conditions
Parameter
Rating
−40 ~ 150
−40 ~ 125
1500
Unit
_C
_C
T
Operating Junction Temperature
Storage Temperature
J
T
STG
60 Hz, Sinusoidal, 1 minute, Connec-
tion Pins to Heatsink
V
ISO
Isolation Voltage
V
rms
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. For the Measurement Point of Case Temperature T , Please refer to Figure 5.
C
2. Calculation Value or Design Factor.
3. Using continuously under heavy loads or excessive assembly conditions (e.g. the application of high temperature/ current/ voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e.
operating temperature/ current/ voltage, etc.) are within the absolute maximum ratings and the operating ranges.
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2
FSB50825B/FSB50825BS
PACKAGE MARKING AND ORDERING INFORMATION
Device
Device Marking
FSB50825B
Package
Packing Type
Rail
Reel Size
N/A
Quantity
15
FSB50825B
FSB50825BS
SPM5P−023
SPM5Q−023
FSB50825BS
Tape & Reel
330 mm
450
PIN DESCRIPTION
Pin No.
Pin Name
Pin Description
1
COM
IC Common Supply Ground
2
VB(U)
Bias Voltage for U Phase High Side FRFET Driving
3
4
VDD(U)
IN(UH)
Bias Voltage for U Phase IC and Low Side FRFET Driving
Signal Input for U Phase High−side
5
6
7
IN(UL)
N.C
Signal Input for U Phase Low−side
N.C
VB(V)
Bias Voltage for V Phase High Side FRFET Driving
8
VDD(V)
Bias Voltage for V Phase IC and Low Side FRFET Driving
9
IN(VH)
IN(VL)
Signal Input for V Phase High−side
Signal Input for V Phase Low−side
10
11
VTS
Output for HVIC Temperature Sensing
12
13
14
VB(W)
Bias Voltage for W Phase High Side FRFET Driving
Bias Voltage for W Phase IC and Low Side FRFET Driving
Signal Input for W Phase High−side
VDD(W)
IN(WH)
15
16
17
IN(WL)
N.C
P
Signal Input for W Phase Low−side
N.C
Positive DC–Link Input
18
19
20
U, VS(U)
NU
Output for U Phase & Bias Voltage Ground for High Side FRFET Driving
Negative DC–Link Input for U Phase
NV
Negative DC–Link Input for V Phase
21
22
23
V, VS(V)
NW
Output for V Phase & Bias Voltage Ground for High Side FRFET Driving
Negative DC–Link Input for W Phase
W, VS(W)
Output for W Phase & Bias Voltage Ground for High Side FRFET Driving
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3
FSB50825B/FSB50825BS
(1) COM
(2) VB(U)
(17) P
(3) VCC(U)
(4) IN (UH)
(5) IN (UL)
VCC
HIN
VB
HO
VS
LO
(18) U, VS(U)
LIN
COM
(6) N.C
(19) N U
(20) N V
(7) VB(V)
(8) VCC(V)
(9) IN (VH)
(10) IN (VL)
VCC
HIN
LIN
VB
HO
VS
LO
(21) V, V S(V)
COM
VTS
(11) V TS
(12) V B(W)
(13) VCC(W)
(14) IN (WH)
(15) IN (WL)
VCC
HIN
VB
HO
VS
LO
(22) N W
(23) W, V S(W)
LIN
COM
(16) N.C
Figure 1. Pin Configuration and Internal Block Diagram (Bottom View)
NOTE: 4. Source Terminal of Each Low−Side MOSFET is Not Connected to Supply Ground or Bias Voltage Ground
Inside Motion SPM 5 product. External Connections Should be Made as Indicated in Figure 4
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4
FSB50825B/FSB50825BS
ELECTRICAL CHARACTERISTICS (T = 25°C, V = V = 15 V Unless Otherwise Specified)
J
DD
BS
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
INVERTER PART (Each MOSFET Unless Otherwise Specified)
BV
Drain−Source Breakdown Voltage
Zero Gate Voltage Drain Current
Static Drain−Source On−Resistance
Drain−Source Diode Forward Voltage
V
V
V
V
= 0 V, I = 1 mA (Note 5)
250
−
−
−
−
1
V
mA
ꢀ
DSS
IN
D
I
= 0 V, V = 250 V
DS
DSS
IN
R
= VBS = 15 V, V = 5 V, I = 2 A
−
0.37
0.55
DS(on)
DD
DD
IN
D
V
t
= V = 15 V, V = 0 V, I = −2 A
−
−
−
−
1.1
−
V
SD
BS
IN
D
ns
ns
330
530
100
40
ON
V
PN
= 150 V, V = V = 15 V, I = 2
DD BS D
t
−
A ON / OFF R = 800 ꢀ / 200
ꢀ
OFF
G
V
IN
= 0 V ↔ 5 V,
Switching Times
t
−
−
−
−
−
−
ns
ꢁ J
ꢁ J
rr
Inductive Load L= 3 mH
High and Low−Side MOSFET Switch-
ing (Note 6)
E
ON
E
OFF
15
VPN = 200 V, VDD = VBS = 15 V, ID = IDP
,
RBSOA
Full Square
Reverse−Bias Safe Operating Area
VDS=BVDSS, TJ = 150_C
High− and Low−Side MOSFET
Switching (Note 7)
CONTROL PART (Each HVIC Unless Otherwise Specified)
Quiescent V Current
I
V
IN
= 15 V,
DD
Applied Between
V and COM
DD
−
−
−
−
200
100
ꢁ A
ꢁ A
QDD
DD
V
= 0 V
I
Quiescent V Current
V
BS
V
IN
= 15 V,
= 0 V
Applied Between
QBS
PDD
BS
V
V
−U
V
−V,
B(V)
B(U)
,
−W
B(W)
I
Operating V Supply Current
V
DD
− COM
VDD = 15 V, fPWM
= 20 kHz, duty
= 50%, Applied
to One PWM
Signal Input for
Low−Side
900
ꢁ A
DD
I
Operating V Supply Current
VB(U) − VS(U),
VB(V) − VS(V),
VB(W) − VS(W)
VDD = VBS = 15
V, fPWM = 20
kHz,
800
ꢁ A
PBS
BS
Duty = 50%, Ap-
plied to One
PWM Signal In-
put for High−Side
UV
UV
V
Undervoltage Protection Detec-
7.4
8.0
8.0
8.9
9.4
9.8
V
V
DDD
DD
Low−Side Undervoltage Protection
(Figure 8)
tion Level
V
DD
Undervoltage Protection Reset
DDR
Level
UV
UV
V
Undervoltage Protection Detection
7.4
8.0
8.0
8.9
9.4
9.8
V
V
BSD
BS
High−Side Undervoltage Protection
(Figure 9)
Level
V
BS
Undervoltage Protection Reset
BSR
Level
V
TS
mV
HVIC Temperature sensing voltage
output
V
DD
=15 V, THVIC= 25_C (Note 8)
600
790
980
V
ON Threshold Voltage
OFF Threshold Voltage
Logic High Level Applied between
−
−
−
2.9
V
V
IH
IN and COM
V
Logic Low Level
0.8
−
IL
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5
FSB50825B/FSB50825BS
ELECTRICAL CHARACTERISTICS (T = 25°C, V = V = 15 V Unless Otherwise Specified)
J
DD
BS
Symbol
BOOTSTRAP DIODE PART (Each Bootstrap Diode Unless Otherwise Specified)
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
t
Forward Voltage
I = 0.1 A, T = 25_C (Note 9)
−
−
2.5
80
−
−
V
FB
F
C
Reverse Recovery Time
I = 0.1 A, T = 25_C
ns
rrB
F
C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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6
FSB50825B/FSB50825BS
RECOMMENDED OPERATING CONDITION
Value
Typ.
Min.
−
Max.
200
Symbol
Parameter
Supply Voltage
Conditions
Unit
V
V
PN
V
DD
Applied Between P and N
150
15
15
−
Control Supply Voltage
Applied Between V and COM
13.5
13.5
3.0
0
16.5
16.5
V
DD
V
BS
High−Side Bias Voltage
Input ON Threshold Voltage
Input OFF Threshold Voltage
Applied Between V and V
S
V
B
V
IN(ON)
Applied Between IN and COM
V
DD
V
V
−
0.6
−
V
IN(OFF)
t
Blanking Time for Preventing Arm−Short V = V = 13.5 ∼ 16.5 V, T ≤ 150°C
1.0
−
−
ꢁ S
kHz
dead
DD
BS
J
f
PWM Switching Frequency
T ≤ 150°C
J
15
−
PWM
Built in Bootstrap Diode VF −IF Characteristic
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0
1
2
3
456
7
8
9
10 11 12 13 14 15
VF [V]
Figure 2. Built in Bootstrap Diode Characteristics (Typ.)
Tc=255C
NOTE: 5. BV
is the Absolute Maximum Voltage Rating Between Drain and Source Terminal of Each MOSFET Inside Motion SPM
DSS
5 product. V Should be Sufficiently Less Than This Value Considering the Effect of the Stray Inductance so that V Should
PN
DS
Not Exceed BV
in Any Case.
DSS
6. t and t
Include the Propagation Delay Time of the Internal Drive IC. Listed Values are Measured at the Laboratory
ON
OFF
Test Condition, and They Can be Different According to the Field Applications Due to the Effect of Different Printed Circuit
Boards and Wirings. Please see Figure 7 for the Switching Time Definition with the Switching Test Circuit of Figure 7.
7. The peak current and voltage of each MOSFET during the switching operation should be included in the Safe Operating
Area (SOA). Please see Figure 6 for the RBSOA test circuit that is same as the switching test circuit.
8. V is only for sensing temperature of module and cannot shutdown MOSFETs automatically.
TS
9. Built in bootstrap diode includes around 15 ꢀ resistance characteristic. Please refer to Figure 2.
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7
FSB50825B/FSB50825BS
These values depend on PWM control algorithm
* Example Circuit : V phase
C
1
+15 V
VDC
P
V
HIN
0
LIN
0
Output
Note
VDD
HIN
LIN
VB
HO
VS
LO
Inverter
Output
Z
Both FRFET Off
Low side FRFET On
High side FRFET On
Shoot through
R
5
0
1
0
VDC
1
0
C3
C5
COM
VTS
1
1
Forbidden
Z
R
3
N
Open Open
Same as (0,0)
C4
One Leg Diagram of Motion SPM® 5 Product
C2
10 ꢁ F
* Example of Bootstrap Param: ters
C = C = 1 ꢁ F Ceramic Capacitor
1
2
Figure 3. Recommended MCU Interface and Bootstrap Circuit with Parameters
NOTE: 10. Parameters for bootstrap circuit elements are dependent on PWM algorithm. For 15 kHz of switching frequency, typical
example of parameters is shown above.
11. RC−coupling (R and C ) and C at each input of Motion SPM 5 product and MCU (Indicated as Dotted Lines) may be
5
5
4
used to prevent improper signal due to surge−noise.
12. Bold lines should be short and thick in PCB pattern to have small stray inductance of circuit, which results in the
reduction of surge−voltage. Bypass capacitors such as C , C and C should have good high−frequency characteristics to
1
2
3
absorb high−frequency ripple−current.
Figure 4. Case Temperature Measurement
NOTE: 13. Attach the thermocouple on top of the heat−sink of SPM 5 package (between SPM 5 package and heatsink if applied) to
get the correct temperature measurement.
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8
FSB50825B/FSB50825BS
3.5
3.0
2.5
2.0
1.5
1.0
0.5
20
40
60
80
100
120
140
160
THVIC [oC]
Figure 5. Temperature Profile of VTS (Typical)
VIN
VIN
Irr
120% of I
100% of I
D
D
VDS
ID
10% of I
D
ID
VDS
tON
trr
tOFF
(a) Turn-on
(b) Turn−off
Figure 6. Switching Time Definitions
CBS
VDD
ID
VDD
HIN
LIN
VB
HO
VS
LO
L
VDC
+
VDS
−
COM
VTS
One Leg Diagram of Motion SPM ® 5 Product
Figure 7. Switching and RBSOA (Single−Pulse) Test Circuit (Low−side)
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9
FSB50825B/FSB50825BS
Input Signal
UV Protection
Status
RESET
SET
RESET
UVDDR
Low-side Supply, V
DD
UVDDD
MOSFET Current
Figure 8. Under−Voltage Protection (Low−Side)
Input Signal
UV Protection
Status
RESET
SET
RESET
UVBSR
High-side Supply, VBS
MOSFET Current
UVBSD
Figure 9. Under−Voltage Protection (High−Side)
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10
FSB50825B/FSB50825BS
C1
(1 ) COM
(2 )VB(U)
( 17 )P
(3 )VDD(U)
VDD
HIN
VB
HO
VS
LO
R5
(4 ) IN
( UH)
(18 )U ,VS(U)
(5 ) IN
( UL)
VDC
C3
LIN
C5
C2
COM
(6 )N.C
(7 )VB(V)
(8 )VDD(V)
(19 )NU
(20 )NV
VDD
HIN
LIN
VB
HO
VS
LO
(9 ) IN
( VH)
(21 )V ,VS(V)
(10 ) IN
(VL)
M
COM
VTS
(11 ) V
TS
(12 ) V
B(W)
(13 ) V
( 22 )NW
DD(W)
VDD
HIN
VB
HO
VS
LO
(14 ) IN
( WH)
(23 ) W V, S(W)
(15 ) IN
( WL)
LIN
COM
(16 ) N.C
C4
R4
For current-sensing and protection
15 V
Supply
C6
R3
Figure 10. Example of Application Circuit
NOTE: 14. About pin position, refer to Figure 1.
15. RC−coupling (R and C , R and C ) and C at each input of Motion SPM 5 product and MCU are useful to prevent
5
5
4
6
4
improper input signal caused by surge−noise.
16. The voltage−drop across R affects the low−side switching performance and the bootstrap characteristics since it is placed
3
between COM and the source terminal of the low−side MOSFET. For this reason, the voltage−drop across R should be less
3
than 1 V in the steady−state.
17. Ground−wires and output terminals, should be thick and short in order to avoid surge−voltage and malfunction of HVIC.
18. All the filter capacitors should be connected close to Motion SPM 5 product, and they should have good characteristics for
rejecting high−frequency ripple current.
SPM is a registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other
countries.
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11
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SPM5E−023 / 23LD, PDD STD, FULL PACK, DIP TYPE
CASE MODEJ
ISSUE O
DATE 31 JAN 2017
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13543G
SPM5E−023 / 23LD, PDD STD, FULL PACK, DIP TYPE
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SPM5H−023 / 23LD, PDD STD, SPM23−BD (Ver1.5) SMD TYPE
CASE MODEM
ISSUE O
DATE 31 JAN 2017
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13546G
SPM5H−023 / 23LD, PDD STD, SPM23−BD (Ver1.5) SMD TYPE
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
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onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
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