FSA8028UMX [ONSEMI]
Audio Jack Detection and Configuration Switch;型号: | FSA8028UMX |
厂家: | ONSEMI |
描述: | Audio Jack Detection and Configuration Switch 商用集成电路 |
文件: | 总12页 (文件大小:670K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON
Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON
Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
2014年9月
FSA8028
音频插孔检测和配置开关
产品特性
说明
FSA8028 是用于
极附件的音频插孔检测器和开关。
3
极或
4
附件插孔
3/4极音频插孔
按下发送/结束键
检测
除了检测之外,FSA8028同时带有集成式麦克风(MIC)开关,
允许处理器来配置音频插孔。
功能
敏感发送/结束键的降低时序
MIC
该架构的设计旨在允许常见的第三方耳机用于从手机、个人
媒体播放器和便携式外围设备听音乐。
开关类型
VDD
2.5 至 4.4V
1.6 至 VDD
. 检测3极或4极音频插孔
VIO
. 可消除 MIC 偏压造成的音频插孔 Pop-n-Click 噪声。
. 检测音频插孔附件:
THD (MIC)
ESD (空气间隙)
工作温度
0.01%(典型值)
15 kV
-40℃至85℃
- 标准耳机
- 带麦克风的耳机
- 发送/终止按键
10-Lead UMLP
1.4x1.8x0.5 mm, 0.4 mm 间距
封装
. 集成了用于4极配置的麦克风(MIC)开关
顶标
KZ
订购信息
FSA8028UMX
应用
. 3.5 mm 和 2.5 mm 音频插孔
. 手机,智能电话
. MP3 和 PMP
订购信息
器件型号
工作温度范围
顶标
封装
10 引脚 1.4 x 1.8 x 0.55 mm, 0.4 mm
间距,超薄模塑无引脚封装 (UMLP)
FSA8028UMX
-40 至 +85°C
KZ
© 2012 Fairchild Semiconductor
www.fairchildsemi.com
FSA8028 • Rev. 1.0.1
典型应用
2.5 to 4.4 V 1.6 to VDD
Baseband
Processor
VIO
VDD
Normally Open
(NO) Switch
0.5 µA
EN
JPOLE
S/E
GPIO1
J_MIC
GPIO2
GPIO3
GPIO4
L
R GND MIC
Oscillator
and Logic
1
2 3 4
Audio
RMIC
MIC Bias
S
MIC
L SPKR
R SPKR
COMP
CMIC
HIGH=>J_MIC=0 V
LOW=>J_MIC>0.620 V
GND
-
图 1. 移动电话示例
引脚布局
DET
VIO
2
1
EN
J_DET
GND
3
10
9
JPOLE
VDD
4
5
J_MIC
8
6
7
S/E MIC
图 2. 10 引脚 UMLP 引脚布局(透视图)
© 2012 Fairchild Semiconductor
www.fairchildsemi.com
FSA8028 • Rev. 1.0.2
2
引脚描述
名称 引脚号 类型
说明
功能
0 插入
1 拔出
DET
JPOLE
S/E
2
4
6
输出 检测J_DET 引脚,指示是否有附件插入音频插孔。
输出 指示是否有附件插入3 极或4 极插孔
0 4 极插孔
1 3 极插孔
0 无键按下
1 按键
输出 按下键时,指示4极附件的SEND/END(发送/结束)状态
MIC / J_MIC
开关打开
0
EN
3
输入 在J_MIC 和MIC 引脚之间控制内部麦克风切换
MIC / J_MIC
开关关闭
1
0 插入
1 拔出
J_DET
10
输入 与机械开关绑定的音频插孔插座引脚的输入,通常在音频插孔插入插座中时关闭
MIC
J_MIC
VDD
7
8
5
1
9
开关 麦克风开关路径,进入麦克风前置放大器
开关 麦克风开关路径,连接至麦克风和SEND/END 键音频插孔
供电 核心电源电压
见 EN 引脚
VIO
供电 基带I/O电源电压
GND
接地 音频插孔和 PCB 接地
注意:
1. 0 = VOL 或 VIL; 1 = VOH 或 VIH
© 2012 Fairchild Semiconductor
FSA8028 • Rev. 1.0.2
www.fairchildsemi.com
3
功能框图
上电
( POR 正常)
是否有
附件
插入
否
音频
插孔?
是
3-
引脚布局
4-
引脚布局
3-
极点
4-
极点
附件
是
3 极或 4 极吗?
•
•
•
DET = 0
JPOLE = 0
DET = 0
JPOLE = 1
•
•
•
S/E = 0
S/E = 0
配置 MIC 开关
附件
是
3 极或 4 极吗?
否
•
EN = 由处理器设置
卡住
发送/结束
重点检查(2)
是
否
是否发送/结束
按键?
是否有
附件
插入
音频
是
否
插孔?
按键
无键按下
•
•
S/E = 0
S/E = 1
是
是否有
附件
插入
否
拆卸附件
设置为默认状态
音频
插孔?
•
DET = 1
•
JPOLE = 1
是
•
S/E =0
图 3. 功能流程图
注意:
2. 仅当 EN = HIGH 时,才可提供卡住发送/结束键功能。
表 1. FSA8028 卡住发送/结束键
EN
HIGH
低
FSA8028
卡住发送/结束键有效
卡住发送/结束键无效
© 2012 Fairchild Semiconductor
FSA8028 • Rev. 1.0.2
www.fairchildsemi.com
4
表 2.
电源正常和关闭期间的状态
状态说明
有效
VDD
1
VIO
1
DET
EN
JPOLE
S/E
有效
J-DET
MIC 开关
0
0
1
(拔下)
1
(3 极)
0
(未按)
高电平
(未插电)
OFF
1
0
3 态
打开
0
1
表 3.
J_DET
FSA8028 在检测过程中的 I/O 状态(3)
S/E
JPOLE
J_MIC
EN
DET
3 极
4 极
3 极
4 极
0
0
0
0
1
1
0
1
0
x
1
0
0
1
x
0 (未按)
0 (未按)
0 (未按)
0 (未按)
0 (未按)
0 (未按)
1 (按下)
0 (未按)
1 (按下)
0 (未按)
0 (4 极)
1 (3 极)
1 (3 极)
1 (3 极)
1 (3 极)
0 (4 极)
0 (4 极)
0 (4 极)
0 (4 极)
1 (3 极)
0
0
0
0
1
注意:
3. 初始插入后检测到的状态。
© 2012 Fairchild Semiconductor
FSA8028 • Rev. 1.0.2
www.fairchildsemi.com
5
绝对最大额定值
应力超过绝对最大额定值,可能会损坏设备。
在超出推荐的工作条件的情况下,该器件可能无法正常运行或操作,且不建议让器件在这些条件下长期工作。
此外,过度暴露在高于推荐的工作条件下,会影响器件的可靠性。 绝对最大额定值仅是额定应力值。
符号
VDD 及 VIO
VSW
参数
最小值
-0.5
-0.5
-1.5
-50
最大值
6.0
单位
V
来自电池的电源电压
“S”开关的开关 I/O 电压和除 J_DET 之外的所有输入电压
J_DET输入的输入电压
VDD+0.5
VDD+0.5
V
VJD
V
IIK
ISW
TSTG
输入钳位二极管电流
mA
mA
C
C
C
开关输入/输出电流(连续)
存储温度范围
50
-65
+150
+150
+260
TJ
最大结温
TL
引脚温度(焊接 ,10 秒)
空气式
15.0
8.0
IEC 61000-4-2 系统 ESD
接触
ESD
全部引脚
7.5
kV
JEDEC JESD22-A114,人体模型
J_DET, J_MIC, VDD, VIO
全部引脚
12.0
2.0
JEDEC JESD22-C101,带电设备模型
注意:
5. 当测量输入与输出二极管电流额定值时,该输入与输出可能超出负额定值。
推荐工作条件
推荐的操作条件表定义了器件的真实工作条件。
指定推荐的工作条件,以确保设备的最佳性能达到数据表中的规格。
飞兆半导体建议不要超过推荐工作条件,也不能按照绝对最大额定值进行设计。
符号
VDD
参数
最小值
2.5
最大值
4.4
单位
电池电源电压
并联I/O电源电压
工作温度
V
V
VIO
1.6
VDD
TA
-40
+85
ºC
© 2012 Fairchild Semiconductor
www.fairchildsemi.com
FSA8028 • Rev. 1.0.2
6
直流电气特性
如无其他说明,全部典型值针对 TA = 25°C。
TA = -40 至 +85°C
符号
参数
VDD (V)
工作条件
单位
最小值 典型值 最大值
MIC 开关
2.5
2.8
3.8
0.9
0.8
0.6
2.9
2.5
2.0
IOUT = 30 mA,
VIN = 2.0 V
RON
MIC 开关导通电阻
Ω
IOUT = 30 mA,
VIN = 1.6, 2.0, 2.5 V
2.5
1.50
RFLAT(ON)
导通阻抗平坦度
2.8
3.8
0.70
0.25
IOUT = 30 mA,
VIN = 1.6, 2.0, 2.8 V
2.5 至
4.4 V
VIN
开关输入电压范围
0
VDD
V
CON
MIC 和 J_MIC 开关导通电容
MIC 和 J_MIC 开关关断电容
3.8
3.8
f = 1 MHz
f = 1 MHz
76
24
pF
pF
COFF
J_DET
2.5 至
4.4 V
J_DETAudioV J_DET引脚上的音频电压范围
J_DETAudiof J_DET 引脚上的音频频率
DET = 低电平
DET = 低电平
音频插孔插入
-1
20
0
1
V
2.5 至
4.4 V
20000
500
Hz
2.5 至
4.4 V
J_DETRGND
J_DETHYS
检测对地电阻
kΩ
J_DET的滞环
230
mV
并联I/O
VIH
输入高电平
输入低电平
输出高电平
输出低电压
0.7 x VIO
0.8 x VIO
VIO
V
V
V
V
VIL
0.3 x VIO
VOH
IOH = -100 µA
IOL = +100 µA
VOL
0.2 x VIO
比较器
VCOMP
SEND/END 感应的比较器阈值
2.5-3.8 J_DET, EN = 低电平
620
mV
电流
MIC 和 J_MIC
端口 VIN = 4.4 V
IOFF
通过开关的电源关断漏电流
输入漏电流
0
1.5
1
µA
µA
µA
0 至
IIN
输入 0 = 4.4 V
4.4V
2.5 至 睡眠模式下的静态电流
(EN = 低电平)
ICC-SLNA
无附件时的电池电源睡眠模式电流
1
3
4.4 V
有源电流
2.5 至
4.4 V
ICC-SLWA
带附件时的电池电源睡眠模式电流
(EN = 低电平和/或
DET = 高电平)
15
25
µA
© 2012 Fairchild Semiconductor
www.fairchildsemi.com
FSA8028 • Rev. 1.0.2
7
交流电气特性
若无其他说明,所有典型值都在 VCC=3.3 V at TA=25°C 下测得。
TA = -40 至 +85°C
VDD
符号
参数
工作条件
单位
(V)
最小值 典型值 最大值
MIC 开关
RT = 600 Ω, VSW =
0.5 VPP,
THD 总谐波失真度
3.8
3.8
0.01
-90
%
f = 20 Hz 至 20 kHz,
VIN = 2.0 V
f = 20 kHz, RS = 32 Ω,
CL = 0 pF, RT = 32 Ω
OIRR
并联I/O
tR, tF 输出边缘速率(DET, S/E, JPOLE)
隔离度
dB
2.5
3.8
2.5
19
15
CL = 5 pF, 20% 至 80%
Ns
ms
tPOLL 振荡器稳定时感应发送/结束按键的开关导通时间 至
4.4 V
1
2.5
至
tPER
感应 SEND/END 按钮按下的 MIC 开关时间段
10
ms
ms
µs
ms
ms
4.4 V
2.5
至
tDET-IN J-DET 从高电平变为低电平后的反跳时间
tDET_REM J_DET 从低电平变为高电平后的反跳时间
422
30
4.4 V
2.5
至
4.4 V
2.5
至
tDET
感应 3 极或 4 极音频插孔插入时的检测超时
感应SEND/END按键/松开的反跳超时
4.5
27
4.4 V
2.5
至
tKBK
4.4 V
供电
电源噪声 300 mVPP,测得
10/90%, f = 217 Hz、
PSRR 电源抑制比
3.8
-90
dB
© 2012 Fairchild Semiconductor
www.fairchildsemi.com
FSA8028 • Rev. 1.0.2
8
表 4.
包装标称值
JEDEC 符号
说明
总高度
标称值(mm)
0.5
A
A1
A3
B
封装离板高度
引脚厚度
0.072
0.152
0.4
引脚宽度
L
引脚长度
0.2
E
引脚间距
0.4
D
器件长度(Y)
器件宽度(X)
1.8
E
1.4
© 2012 Fairchild Semiconductor
www.fairchildsemi.com
FSA8028 • Rev. 1.0.2
9
A
1.40±0.10
B
PIN #1
IDENT
1.80±0.10
TOP VIEW
1.70
0.563 (9X)
2.10
0.15±0.05
0.66
0.40
0.50±0.05
1
SEATING PLANE
0.025±0.025
C
SIDE VIEW
(0.20) 4X
0.40
0.225 (10X)
3
RECOMMENDED LAND PATTERN
0.40±0.05 (9X)
DETAIL A
6
1.45
1
0.45 (9X)
0.55
(0.60) 4X
PIN #1
IDENT
10
0.20±0.05 (10X)
0.40
1.85
0.10 C A B
0.05 C
BOTTOM VIEW
0.225 (10X)
0.50±0.05
0.20±0.05
OPTIONAL MINIMAL
TOE LAND PATTERN
PACKAGE
EDGE
LEAD
LEAD
OPTION 2
45°
OPTION 1
SCALE : 2X
SCALE : 2X
DETAIL A
SCALE : 2X
NOTES:
A. PACKAGE DOES NOT CONFORM TO
ANY JEDEC STANDARD.
B. DIMENSIONS ARE IN MILLIMETERS.
C. LAND PATTERN RECOMMENDATION IS
EXISTING INDUSTRY LAND PATTERN.
D. DRAWING FILENAME: MKT-UMLP10ArevG.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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相关型号:
FSA805
USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability
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