FSA2276UMX [ONSEMI]
DPDT HiFi Audio Switch w/ Negative Swing;型号: | FSA2276UMX |
厂家: | ONSEMI |
描述: | DPDT HiFi Audio Switch w/ Negative Swing 光电二极管 |
文件: | 总11页 (文件大小:456K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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June 2016
FSA2276 — DPDT (0.5 ) HiFi Audio Switch w/ Negative
Swing
Features
Description
The FSA2276 is
a high-performance, Double-Pole
. VDD Operating Range: 1.65 to 5.5 V
Double-Throw (DPDT) analog switch with negative swing
audio capability. The FSA2276 features ultra-low audio
RON of 0.5 (typical) at 1.8 V VDD. The FSA2276
operates over a VDD range of 1.65 V to 5.5 V, is fabricated
with sub-micron CMOS technology to achieve fast
switching speeds, and is designed for break-before-make
operation. To minimize pop and click during operation,
the turn on ramp time is selectable using an external
capacitor (C_EXT).
. External Capacitor Connection for Pop and Click
Noise Suppression
. Power-Off Protection on Common Ports
. RON = 0.5 Ω (Typ.) at 1.8 V
. THD+N = -115 dB; 2 VRMS, 20 kΩ Load; f = 1 kHz
. XTALK = -122 dB at 1 VRMS, 50 Ω Load; f = 1 kHz
. Off Isolation = -115 dB at 1 VRMS, 50 Ω Load;
f = 1 kHz
The FSA2276 features THD+N specifications that target
a Hi-Fidelity audio quality into both 32 Ω headphones
and line out type loads (>600 Ω).
. 12-Lead UMLP 1.8 mm x 1.8 mm
VDD
Applications
Charge Pump,
Oscillator &
POR
. Mobile Phone, Tablet, Notebook PC, Media Player
. Docking Station, TV, Set-Top Box, LCD Monitor
SEL
Control Logic
Pop and Click
Reduction
Slew Rate Control
C_EXT
Processor
MUTE
L1
LSPKR
L2
Audio
Source 1
RSHUNT
R1
Audio
Source 2
RSPKR
R2
RSHUNT
GND
Figure 1. Application Block Diagram
Ordering Information
Part Number
Top Mark
Package Description
FSA2276UMX
EN
12-Lead, UMLP, Quad, JEDEC MO252, 1.8 mm x 1.8 mm
© 2015 Fairchild Semiconductor Corporation
FSA2276 • Rev. 1.0
www.fairchildsemi.com
Pin Configuration
1
1
12
L1
GND
L1
12
3
GND
3
LSPKR
RSPKR
L2
R1
L2
R1
LSPKR
BOTTOM
VIEW
TOP THROUGH
VIEW
RSPKR
SEL
9
6
R2
6
9
R2
SEL
Figure 2. Pin Assignment (Top Through View)
Figure 3. Pin Assignment (Bottom View)
Pin Descriptions
Pin
Name
Description
Power Supply (1.65 to 5.5 V)
1
2
VDD
C_EXT
GND
LSPKR
RSPKR
SEL
MUTE
GND
R2
Slow Turn On External Capacitor
Ground
3
4
Audio LSPPKR Common I/O Port
Audio RSPPKR Common I/O Port
Select Pin
5
6
7
Mute Enable - Active High
Ground
8
9
Audio – Right Channel Source2 I/O Port
Audio – Right Channel Source1 I/O Port
Audio – Left Channel Source2 I/O Port
Audio – Left Channel Source1 I/O Port
10
11
12
R1
L2
L1
Truth Table
Mute
SEL
Function
Resistor Terminations
RSHUNT(s) connect to L2/R2
0
0
0
1
L1 = LSPKR; R1 = RSPKR
L2 = LSPKR; R2 = RSPKR
RSHUNT(s) connect to L1/R1
RSHUNT(s) OPEN
L1 ≠ LSPKR; L2 ≠ LSPKR; R1 ≠ RSPKR
R2 ≠ RSPKR (All Paths Hi-Z)
;
;
1
1
0
1
L1 ≠ LSPKR; L2 ≠ LSPKR; R1 ≠ RSPKR
R2 ≠ RSPKR (All Paths Hi-Z)
RSHUNT(s) OPEN
© 2015 Fairchild Semiconductor Corporation
FSA2276 • Rev. 1.0
www.fairchildsemi.com
2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Min. Max. Unit
VDD
Supply/Control Voltage
Control Input Voltage
-0.3
-0.3
6.0
6.0
V
V
VCNTRL
SEL, MUTE
VSW
DC Switch I/O Voltage
L1, L2, R1, R2, LSPKR, RSPKR
-3.5
3.5
V
IIK
ESD Input Diode Current
Switch I/O Current
-50
mA
mA
ISW
700
Human Body Model, ANSI/ESDA/ JEDEC
JS-001-2012
All Pins
5
ESD
Charged Device Model, JEDEC: JESD22-C101
IEC 61000-4-2 System
2
8
kV
Contact
Air Gap
15
-40
-65
TA
Absolute Maximum Operating Temperature
Storage Temperature
+85
°C
°C
TSTG
+150
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance. Fairchild does not recommend exceeding them or
designing to Absolute Maximum Ratings.
Symbol
VDD
Parameter
Min.
1.65
-3.0
0
Typ.
Max.
5.50
3.0
Unit
Supply Voltage
1.80
V
V
VSW
DC Switch I/O Voltage
L1, L2, R1, R2, LSPKR, RSPKR
SEL, MUTE
VCNTRL Control Input Voltage
VDD
V
ISW
TA
DC Switch I/O Current
100
25
mA
°C
Ambient Operating Temperature
-40
+85
© 2015 Fairchild Semiconductor Corporation
FSA2276 • Rev. 1.0
www.fairchildsemi.com
3
DC Characteristics
VDD = 1.65 V to 5.5 V, VDD (Typ.) = 1.8 V, TA = -40°C to 85°C, and TA (Typ.) = 25°C, unless otherwise specified.(1)
TA=-40°C to
+85°C
Symbol
Parameter
Condition
VDD (V)
Unit
Min. Typ. Max.
VCNTRL Pin Input High
Voltage (SEL, MUTE)
VIH
VIL
C_EXT = FLOAT
C_EXT = FLOAT C_EXT = FLOAT
1.17
0
VDD
0.5
V
V
VCNTRL Pin Input Low
Voltage (SEL, MUTE)
L1, R1, L2, R2 = -3 V to 3 V, LSPKR
Switch-to-Gnd ON Leakage RSPKR = Float (ISW = 0 mA)
,
ION
1.65 to 5.5 -1.0
1.65 to 5.5 -1.0
0.1
0.1
0.1
0.1
1.0
1.0
1.0
0.5
µA
µA
µA
µA
Current
MUTE=LOW, SEL=0 or VDD C_EXT
= FLOAT, Figure 6
L1, R1, L2, R2 = -3 V to 3 V, LSPKR
RSPKR = Float (ISW = 0 mA)
MUTE = HIGH, SEL = 0 or VDD
C_EXT = FLOAT, Figure 5
,
Switch-to-Gnd OFF
INO_MUTE Leakage Current (when
Muted)
L1, R1, L2, R2 = -3 V to 3 V, LSPKR
RSPKR = Float (ISW = 0 mA)
MUTE = LOW, SEL = 0 or VDD,
C_EXT = FLOAT
,
IOFF
Input Leakage Current(2)
0
-1.0
L1, R1, L2, R2 = -3 V to 3 V, LSPKR
RSPKR = Float (ISW = 0 mA),
C_EXT = FLOAT
,
Control Input Leakage
Current(3) (SEL, MUTE)
IIN
1.65 to 5.5 -0.5
MUTE = LOW, SEL = 0 or VDD,
C_EXT = FLOAT
IDD
VDD Supply Current
5.5
16
30
µA
MUTE = HIGH, SEL = 0 or VDD,
C_EXT = FLOAT
IDDZ
VDD Hi-Z Supply Current
5.5
5.5
1
1
µA
µA
MUTE = LOW, SEL = 0 or 1.8 V
SEL = LOW, MUTE = 0 or
1.8 V C_EXT = FLOAT
Increase in IDD per Control
Voltage
IDDT
ISW = 100 mA, VSW = -3 V to 3 V
C_EXT = FLOAT, Figure 4
RON
Switch On Resistance
1.65 to 5.5
0.5
1.0
Ω
On Resistance Matching,
Channel to Channel
ISW = 100 mA, VSW = -3 V to 3 V
C_EXT = FLOAT
ΔRON
1.65 to 5.5
1.65 to 5.5
30
1
mΩ
mΩ
ISW = 100 mA, VSW = -3 V to 3 V
C_EXT = FLOAT
RFLAT
On Resistance Flatness
Click and Pop Resistance
VLX_RX = 3.0 V, MUTE = 0,
SEL = 0 or VDD, C_EXT = FLOAT
RSHUNT (L1, L2, R1, R2, LSPKR
RSPKR
,
6
10
14
kΩ
)
Notes:
1. Limits over the recommended temperature operating range (TA = -40°C to +85°C) are correlated by statistical
quality.
2. Only valid for VSW > 0 V.
3. VMUTE ≤ VDD + 0.3 otherwise additional input leakage current may flow.
© 2015 Fairchild Semiconductor Corporation
FSA2276 • Rev. 1.0
www.fairchildsemi.com
4
AC Characteristics
VDD = 1.65 V to 5.5 V, VDD (Typ.) = 1.8 V. TA = -40°C to 85°C. TA (Typ.) = 25°C, unless otherwise specified.
TA=- 40°C to +85°C
Symbol
Parameter
Condition
VDD (V)
Unit
Min. Typ. Max.
L1 = R1 = L2 = R2 = 1.5 V,
LSPKR , RSPKR = 50 Ω to GND
SEL= 0 or VDD; See Figure 7
and Figure 8
C_EXT = Float
1.8, 3.3
0.5
Enable Time
tMUTE_ON (MUTE to
Output)
ms
C_EXT = 0.1 µF
C_EXT = 0.1 µF
1.8
3.3
60
100
L1 = R1= L2 = R2 = 1.5 V,
LSPKR , RSPKR = 50 Ω to GND,
SEL = 0 or VDD; See Figure
7 and Figure 8
C_EXT = Float
35
Disable Time
tON_MUTE (MUTE to
Output)
1.8, 3.3
µs
C_EXT = 0.1 µF
C_EXT = Float
C_EXT = 0.1 µF
C_EXT = 0.1 µF
35
0.5
50
L1 (L2) = R1 (R2) = 1.5 V,
L2 (L1) = R2 (R1) = 0 V
LSPKR , RSPKR = 50 Ω to GND,
SEL = 0 or VDD; MUTE = 0
See Figure 7 and Figure 8
1.8, 3.3
1.8
Turn On Time
(SEL to Output)
tON_SEL
ms
3.3
100
L1 (L2) = R1 (R2) = 1.5 V,
L2 (L1) = R2 (R1) = 0 V
LSPKR , RSPKR = 50 Ω to GND,
SEL= 0 or VDD; MUTE = 0
See Figure 7 and Figure 8
C_EXT = Float
C_EXT = 0.1 µF
20
20
Turn On Time
(SEL to Output)
tOFF_SEL
1.8, 3.3
µs
L1 (L2) = R1 (R2) = 1.5 V, LSPKR
,
Break Before
Make Time (SEL
to Output)
RSPKR = 50 Ω to GND,SEL = 0 or VDD
C_EXT = FLOAT, MUTE = 0 V;
See Figure 7 and Figure 9
;
tBBM
1.8, 3.3
1.8, 3.3
500
µs
f = 1 kHz, RL = 50 Ω, CL = 0 pF,
MUTE = 0 VSW =1 VRMS Figure 11
-115
-92
OIRR
Off Isolation(4)
dB
f = 1 MHz, RL = 50 Ω, CL = 0 pF,
MUTE = 0 VSW = 1 VRMS Figure 11
f = 1 kHz, RL = 50 Ω, CL = 0 pF,
MUTE = VDD; VSW = 1 VRMS Figure 11
-113
-95
Off Isolation-
Muted(4)
OIRRM
1.8, 3.3
dB
f = 1 MHz, RL = 50 Ω, CL = 0 pF,
MUTE = VDD; VSW = 1 VRMS Figure 11
Cross Talk
f = 1 kHz, RL = 50 Ω, VSW = 1 VRMS
Figure 12
XTALK
BW
1.8, 3.3
1.8, 3.3
-122
dB
(Adjacent) (4)
-3 dB
RL = 50 Ω Figure 10
380
-119
-105
MHz
Bandwidth(4)
VPSRR = VDD + 100 mVRMS
RL = 20 kΩ or 32 Ω ( at LSPKR
RL = 32 Ω
Power Supply
Rejection
Ratio(4)
,
PSRR
1.8, 3.3
dB
RSPKR), MUTE = 0 or VDD,
f = 1 kHz, VSW = GND or Float)
RL = 20 kΩ
0.00018
-115
%
dB
%
RL = 20 kΩ, f = 1 kHz,
VSW = 2 VRMS, With A-weighted, Figure 15
Total Harmonic
THD+N Distortion +
Noise(4)
0.00018
-115
RL=600 Ω, f = 1 kHz, VSW = 2 VRMS
With A-weighted, Figure 15
dB
%
0.00018
-115
RL = 32 Ω, f = 1 kHz, VSW = 1 VRMS
With A-weighted, Figure 15
,
dB
Note:
4. Guaranteed by characterization. Not production tested.
© 2015 Fairchild Semiconductor Corporation
FSA2276 • Rev. 1.0
www.fairchildsemi.com
5
Capacitance
Unless otherwise stated, VDD = 1.65 V to 5.5 V, VDD (Typ.) = 1.8 V, TA = -40°C to 85°C, and TA (Typ.) = 25°C.(5)
TA=- 40°C to +85°C
Symbol
Parameter
Condition
VDD (V)
Unit
Min.
Typ. Max.
On Capacitance
(Common Port) (6)
f = 1 MHz, 100 mVPK-PK, 100 mV
DC bias MUTE = 0 V Figure 14
CON
1.8, 3.3
1.8, 3.3
1.8, 3.3
22
pF
pF
pF
Off Capacitance
(Common Port) (6)
f = 1 MHz, 100 mVPK-PK, 100 mV
DC bias MUTE = VDD Figure 13
COFF1
COFF2
25
14
Off Capacitance
f = 1 MHz, 100 mVPK-PK, 100 mV
(Non-Common Ports) (6) DC bias MUTE = 0 V Figure 13
Off Capacitance -
COFF_MUTE MUTED
(Non-Common Ports) (6)
f = 1 MHz, 100 mVPK-PK, 100 mV
DC bias, MUTE = VDD
1.8, 3.3
0
14
pF
pF
Control Input Pin
CCNTRL Capacitance
(MUTE, SEL) (6)
SEL
3
6
f = 1 MHz, 100 mVPP
100 mV DC bias
,
MUTE
Notes:
5. Limits over the recommended temperature operating range (TA=-40°C to +85°C) are correlated by statistical
quality control methods.
6. Guaranteed by characterization. Not production tested.
© 2015 Fairchild Semiconductor Corporation
FSA2276 • Rev. 1.0
www.fairchildsemi.com
6
Test Diagrams
VON
INO
Float
V
SW
V
SW
Select
ISW
GND
GND
Select
GND
V
SEL= 0 or VDD
**Each switch port is tested separately
V
SEL = 0 or VDD
R
ON = VON / ISW
Figure 4. On Resistance
Figure 5. Off Leakage
ION
VSW
Float
VOUT
C
L
GND
R
L
R
S
A
GND
V
SW
V
SEL
Select
R L and CL are function of application
environment (see AC/DC Tables
GND
GND
)
VSEL= 0 or VDD
CLincludes test fixture and stray capacitance
Figure 6. On Leakage
Figure 7. Test Circuit Load
80%
20%
SEL or MUTE
LSPKR, RSPKR
80%
L1 (L) =R1 (R) =1.5V
L2 (Tx) = R2 (Rx) = 0V
20%
TOFF
TON
80%
LSPKR, RSPKR
L1 (L) =R1 (R) =0V
L2 (Tx) = R2 (Rx) = 1.5V
20%
TOFF
TON
Figure 8. Turn On/Off Waveforms (SEL or MUTE to Output)
SEL
TBBM
LSPKR=L1; RSPKR=R1
LSPKR=L2; RSPKR=R2
TBBM
VOUT
L1=L2=R1=R2=1.5V
90%
Figure 9. Break Before Make Interval Timing
© 2015 Fairchild Semiconductor Corporation
FSA2276 • Rev. 1.0
www.fairchildsemi.com
7
Test Diagrams (Continued)
Network Analyzer
Network Analyzer
V
IN
VCNTRL
GND
GND
R
T
V
GND
SEL
GND
GND
GND
GND
RS and RT are function of application
environment (see AC/DC Tables)
R Land CL are function of application
environment (see AC/DC Tables)
OFF - Isolation = 20 Log (V
/ V
)
IN
CLincludes test fixture and stray capacitance
OUT
Figure 10. Bandwidth
Figure 11. Channel Off Isolation
Network Analyzer
V
IN
V
SEL
GND
= 0 or V
V
SEL
DD
GND
GND
R
T
F = 1MHz
GND
RS and RT are function of application
environment (see AC/DC Tables)
CROSSTALK = 20 Log (V
/ V
)
IN
OUT
Figure 12. Adjacent Channel Crosstalk
Figure 13. Channel Off Capacitance
Network Analyzer
V
IN
GND
V
SEL
V = 0 or VDD
SEL
F = 1MHz
GND
GND
RL and C are function of application
L
environment (see AC/DC Tables)
CL includes test fixture and stray capacitance
Figure 14. Channel On Capacitance
Figure 15. Total Harmonic Distortion (THD+N)
© 2015 Fairchild Semiconductor Corporation
FSA2276 • Rev. 1.0
www.fairchildsemi.com
8
2.10
1.80±0.10
A
B
0.588
0.40
PIN #1
IDENT
0.563 (11X)
2.10
1
1.80±0.10
TOP VIEW
0.15±0.05
(12X) 0.20
0.50±0.05
RECOMMENDED LAND PATTERN
SEATING PLANE
0.025±0.025
C
PACKAGE
EDGE
SIDE VIEW
LEAD
LEAD
(0.20) 4X
OPTION 2
SCALE 2:1
OPTION 1
SCALE 2:1
3
6
0.40±0.05 (11X)
0.42±0.05
DETAIL A
0.40
1
0.20±0.05
PIN #1
IDENT
12
9
45°
DETAIL A
0.20±0.05 (12X)
SCALE 2:1
BOTTOM VIEW
0.10 C A B
0.05 C
NOTES:
A. PACKAGE DOES NOT CONFORM TO
ANY JEDEC STANDARD.
B. DIMENSIONS ARE IN MILLIMETERS.
C. LAND PATTERN RECOMMENDATION IS
EXISTING INDUSTRY LAND PATTERN.
D. DRAWING FILENAME: MKT-UMLP12ArevF
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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