FSA2268TUMX [ONSEMI]
低电压双 SPDT (0.4Ω) 模拟开关，带 16KV ESD;
| 型号： | FSA2268TUMX |
| 厂家： | 
ONSEMI |
| 描述： | 低电压双 SPDT (0.4Ω) 模拟开关，带 16KV ESD 开关 光电二极管 输出元件 |
| 文件： | 总14页 (文件大小：1239K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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March 2013
FSA2268 / FSA2268T 低电压及拥有高达
16kV ESD 的二通道 单刀双掷 (0.4) 模拟开关
总述
特点
FSA2268 是一种高性能, 二通道单刀双掷模拟开关并拥有
超低 RON 0.4Ω (典型值) 的特点。 FSA2268 可以在 VCC
从 1.65V 到 4.3V 这么宽广的范围里工作, 并被设计成先
断后通的操作。它的选择输入端口是TTL兼容的。
.
.
.
.
.
.
.
.
0.4Ω 典型导通电阻 (+3.0V 供电电压)
0.25Ω 最大 RON 平坦度 (+3.0V 供电电压)
-3db 带宽：> 50MHz
即使在控制电压低于 VCC 情况下 FSA2268 拥有非常低的
静态电流, 这一特性可以用最小的电池消耗来实现与基带
处理器通用 I/O 之间的直接接口从而满足手机的应用。
在扩展的控制信号电平范围内拥有低漏电流
无铅 10-管脚 µMLP (1.4 x 1.8mm) 的封装
共用端口的断电保护
FSA2268T 集成了终端电阻当信号有超调或串扰藕合时可
以消除噪音, 也就是说“爆音最小化”。
宽广 的VCC 操作范围：1.65 到 4.3V
人体电流模式 JEDEC: JESD22-A114
-
-
I/O 接地: 13.5kV
电源接地 : 16.0kV
重要注解
.
在 FSA2268T 中拥有噪音消除终端电阻
欲知更多其它具体的操作信息，请联系
analogswitch@fairchildsemi.com.
应用
.
.
手机, PDA (掌上电脑), 数码相机和笔记本电脑
液晶显示器, 电视及机顶盒
订购信息
零件编号
表面标记
封装说明
10-引脚, 方型超薄 (UMLP), 1.4 x 1.8mm, 0.4mm Pitch
FSA2268UMX
FSA2268TUMX
FSA2268L10X
GF
GH
GH
10-引脚, 方型超薄 (UMLP), 1.4 x 1.8mm, 0.4mm Pitch
10-引脚, MicroPak™, 1.6mm
模拟符号
图 1.
FSA2268
图 2.
FSA2268T (含有抗扰终端电阻)
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA2268 / FSA2268T • Rev. 1.1.0
管脚分配图
V
cc
10
2B0 1B1
9
8
7
6
1
1B
1B
2B
1A
S1
S2
0
1
0
2
1
2B1
GND
2A
3
4
10 1B0
2
3
9
8
VCC
1A
5
6
7
S2 S1
2B
4
2A
1
5
GND
图 3.
10-管脚UMLP (俯视图）
图 4.
10-管脚 Micropak™
管脚描述
管脚 号 UMLP
管脚号MicroPak™
名称
描述
数据端口
数据端口
数据端口
接地
1
2
2
3
1B1
2B0
2B1
GND
2A
3
4
4
5
数据端口
开关选择脚
开关选择脚
数据端口
供电电压
数据端口
5
6
6
7
S2
7
8
S1
8
9
1A
9
10
1
VCC
1B0
10
真值表
控制输入, Sn
功能
逻辑低
逻辑高
nB0 连接nA (FSA2268/2268T); nB1 接地 (FSA2268T)
nB1 连接nA (FSA2268/2268T); nB0 接地 (FSA2268T)
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA2268 / FSA2268T • Rev. 1.1.0
2
最大绝对额定值
超出绝对最大额定值会破坏设备 ,设备会不工作或者说不建议设备在和超过建议的工作条件下被操作. 另外,
过长的暴露在超过建议工作条件下会影响设备的可靠性. 这种绝对最大额定值仅仅是极端额定值.
单位
最小值
最大值
表达符号
参数
5.5
VCC + 0.3
1.4
V
VCC
供电电压
-0.5
-0.5
0
1B0, 1B1, 2B0, 2B1, 1A, 2A 管脚
T版本, nBn 管脚断开
S1, S2
VSW
开关输入/输出电压(1)
V
VIN
IIK
控制输入电压(1)
-0.5
5.5
V
mA
mA
mA
输入钳位二极管电流
开关输入/输出电流 (连续)
-50
ISW
350
ISWPEAK
TSTG
TJ
峰值开关电流 ( 脉冲持续时间1ms, <10%占空系统)
500
+150
+150
+260
1
°C
°C
保存温度范围
最高结温
-65
°C
TL
引线温度 (焊接,10秒)
湿度敏感性
MSL
等级
I/O 接地
13.5
16.0
9.0
人体电流模式,
电源接地
JEDEC: JESD22-A114
ESD
kV
其它各管脚
2.0
充放电模式, JEDEC: JESD22-C101
注解：
1. 如输入及输出二极管电流额定值均到达时，则可能会超出输入及输出的负额定值.
建议工作条件
推荐工作条件指定用于保证实现数据表规范的最佳性能. Fairchild 建议不得超出以上值或设计至最大绝对额定值.
最小值
最大值
单位
表达符号
参数
VCC
VIN
VSW
TA
供电电压
1.65
0
4.30
VCC
VCC
+85
V
V
控制输入电压
开关I/O 电压
工作温度
0
V
-40
°C
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA2268 / FSA2268T • Rev. 1.1.0
3
DC电气特性
若无另外规定，所有数值均在25ºC下测定。
TA=+25ºC
TA=-40 to +85ºC
表达符号
参数
条件
VCC (V)
单位
最小值
最小值
典型值 最大值
最大值
3.6 to 4.3
2.7 to 3.6
2.3 to 2.7
1.65 to 1.95
3.6 to 4.3
2.7 to 3.6
2.3 to 2.7
1.65 to 1.95
1.7
1.5
1.4
0.9
VIH
输入高电平
V
0.7
0.5
0.4
0.4
V
V
VIL
输入低电平
控制输入漏电流
(S1,S2)
IIN
VIN=0 to VCC
1.65 to 4.3
-0.5
-50
0.5
µA
nA
nA=0.3V, VCC
0.3V nB0 or
nB1=VCC-0.3V,
0.3V, or Floating
图 6
–
INO(0FF),
INC(OFF)
FSA2268
nB0 和 nB1端口断开
1.95 to 4.3
-10
-10
-20
10
10
20
50
漏电流
nA=0.3V, nB0 or
nB1=0V or
Floating,
nB0 和 nB1端口断开
漏电流
(带有终端电阻)
INC(OFF)
FSA2268T
1.95 to 4.3
-50
50
µA
图 6
nA=0.3V, VCC
0.3V nB0 or
nB1=VCC-0.3V,
0.3V, or Floating,
图 7
–
IA(ON)
1.95 to 4.3
-100
100
±1
nA
µA
µA
nA导通漏电流
Common Port (1A,
2A), VIN=0V to
4.3V, VCC=0V nB0,
nB1=Floating
断开漏电流
(1A, 2A共同端口)
IOFF
FSA2268
0V
0V
Common Port (1A,
2A), VIN=0V to
4.3V, VCC=0V nB0,
nB1=0V or
断开漏电流
IOFF
FSA2268T
±40
(1A, 2A共同端口)
Floating
ION=100mA, nB0 or
nB1=0.7V, 3.6V,
图 5
4.30
3.00
0.30
0.40
0.50
0.55
ION=100mA, nB0 or
nB1=0.7V, 2.3V,
图 5
开关导通电阻(2),(5)
Ω
ION=100mA, nB0 or
nB1=0V, 0.7V,
1.6V, 2.3V,
图 5
RON
2.30
1.65
0.52
1.00
ION=100mA, nB0 or
nB1=0V, 0.7V,
1.65V,
图 5
4.30
3.00
2.30
1.65
0.04
0.06
0.12
1.00
0.13
0.13
ION=100mA, nB0 or
nB1=0.7V
Delta口导通电阻口
∆RON
Ω
(3),(5)
Continued on following page…
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA2268 / FSA2268T • Rev. 1.1.0
4
DC电气特性 (续)
若无另外规定，所有数值均在25ºC下测定。
TA=-40ºC to
+85ºC
TA=+25ºC
表达符号
参数
条件
VCC (V)
单位
最小值
最小值
典型值 最大值
最大值
4.30
3.00
2.30
1.65
0.25
0.25
导通电阻的平坦
度(4),(5)
IOUT=100mA, nB0 or
nB1=0V to VCC
Ω
RFLAT(ON)
0.5
0.6
内部终端电阻(6)
静态工作电流
200
Ω
RTERM
ICC
VIN=0 or VCC, IOUT=0
4.30
4.30
-100
100
-500
500
nA
Input at 2.6V
Input at 1.8V
3
7
7
控制输入时ICC 相
应的增加量
µA
ICCT
15
注解：
2. 导通电阻由开关指定电流下A、B管脚之间的电压降决定.
3. ∆RON=RON max – RON min在相同VCC、温度及电压下测得.
4. 平坦度定义为各种条件指定范围内ON电阻最大值与最小值之间的差值.
5. 由特性保证而非产品试验, for VCC=1.65-3.00.
6. 由特性保证而非产品试验.
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA2268 / FSA2268T • Rev. 1.1.0
5
AC电气特性
若无另外规定, 有数值均在 VCC=3.3V 和 25ºC下测定。
TA=+25ºC
TA=-40ºC to +85ºC
表达符号 参数
条件
VCC (V)
单位
图号
最小值
典型值
最大值
最小值
最大值
3.6 to 4.3
2.7 to 3.6
2.3 to 2.7
55
60
65
15
15
15
60
65
70
nB0 or
nB1=1.5V,
RL=50Ω,
CL=35pF
tON
tOFF
tBBM
开启时间
ns
1.65 to
1.95
70
40
图 8
图 9
3.6 to 4.3
2.7 to 3.6
2.3 to 2.7
30
35
40
5
5
5
35
40
45
nB0 or
nB1=1.5V,
RL=50Ω,
CL=35pF
关闭时间
ns
ns
1.65 to
1.95
3.6 to 4.3
2.7 to 3.6
2.3 to 2.7
15
15
15
2
2
2
nB0 or
先断后开
时间
nB1=1.5V,
RL=50Ω,
CL=35pF
图 10
1.65 to
1.95
16
25
2
CL=1.0nF,
电荷注入 VS=0V,
RS=0Ω
1.65 to
4.3
Q
pC
dB
图 14
图 12
f=100kHz,
断开隔离 RL=50Ω,
1.65 to
4.3
OIRR
-70
CL=0pF
f=100kHz,
非相邻通
1.65 to
4.3
Xtalk
BW
RL=50Ω,
-70
dB
图 13
图 11
道串扰
CL=0pF
RL=50Ω,
-3db 带宽
1.65 to
4.3
>50
MHz
CL=0pF
f=20Hz to
总谐波失
真
20kHz,
RL=32,
VIN=2Vpp
1.65 to
4.3
THD
.06
%
图 17
电容
TA=+25ºC
表达符号
参数
条件
VCC (V)
单位
图号
最小值 典型值
最大值
CIN
COFF
CON
f=1MHz
f=1MHz
f=1MHz
控制端输入电容
B 端断开电容
A 端导通电容
0
1.5
30
pF
pF
pF
图 15
图 15
图 16
3.3
3.3
120
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA2268 / FSA2268T • Rev. 1.1.0
6
测试框图
VON
IA(OFF)
NC
A
nB
n
nA
V
IN
V
IN
Select
GND
ION
GND
Select
V = 0 orV
cc
Sel
GND
V
= 0 or V
cc
**Each switch port is tested separately.
Sel
RON = VON / ION
图 5.
导通电阻
图 6.
断开漏电流(端口分开测试)
nB
n
nA
IA(ON)
V
NC
IN
VOUT
A
C
R
L
R
GND
L
S
V
IN
GND
Select
GND
V
Sel
V
V
cc
Sel= 0 or
GND
图 7.
导通漏电流
图 8.
测试电路负载
tRISE= 2.5ns
tFALL = 2.5ns
V
CC
90%
CC /2
90%
CC /2
Input- VSel
V
V
10%
10%
90%
GND
VOH
90%
Output-VOUT
VOL
tON
tOFF
图 9.
开启/关闭波形
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA2268 / FSA2268T • Rev. 1.1.0
7
测试框图 (续)
tRISE= 2.5ns
nB
n
nA
C
V
cc
V
IN
90%
VOUT
Input- VSel
V
/2
cc
GND
L
R
V
IN
L
10%
0V
GND
GND
VOUT
R
S
0.9*V
out
0.9*V
out
tD
V
Sel
RL and CL are functions of the application
environment (50, 75, or 100 ).
GND
CL includes test fixture and stray capacitance.
图 10. 先关后开间隔时间
Network Analyzer
R
S
V
IN
V
GND
S
GND
V
Sel
V
OUT
GND
GND
R
T
RL and CL are functions of the application
environment (50, 75, or 100 ).
GND
L
CL includes test fixture and stray capacitance.
图 11. 带宽
Network Analyzer
R
S
V
S
GND
R
T
GND
V
GND
Sel
V
OUT
GND
GND
R
T
RS and RT are functions of the application
environment (50, 75, or 100 ).
GND
Off-Isolation = 20 Log (VOUT / VIN
)
图 12. 线路断开Off 隔离
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA2268 / FSA2268T • Rev. 1.1.0
8
测试框图 (续)
Network Analyzer
R
S
V
IN
V
GND
S
GND
V
Sel
V
GND
OUT
GND
R
T
R
T
GND
GND
RS and RT are functions of the application
environment (50, 75, or 100 ).
CROSSTALK = 20 Log (VOUT/ VIN
)
图 13. 相邻通道间的串扰
图 14. 电荷注入测试
nB
nB
Capacitance
n
n
Meter
nS
n
nS
n
Capacitance
Meter
V
Sel= 0 orVcc
f = 1MHz
VSel = 0 or Vcc
nB
n
f = 1MHz
nB
n
图 15. 通道断开电容
图 16. 通道导通电容
Audio Analyzer
R
S
V
IN
V
GND
S
GND
VCNTRL
V
OUT
GND
GND
R
T
VSel = 0 or Vcc
GND
RS and RT are functions of the application
environment (see AC Tables for specific values).
图 17. 总谐波失真
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA2268 / FSA2268T • Rev. 1.1.0
9
物理尺寸
0.15
C
1.40
A
2X
1.700
9X
0.563
B
0.663
1
1.80
2.100
PIN #1 QUADRANT
0.400
0.15
C
2X
10X
0.225
TOP VIEW
RECOMMENDED LAND PATTERN
0.55 MAX.
1.450
9X
0.10
0.08
C
0.550
0.400
0.450
0.152
SEATING
PLANE
C
0.050
C
1.850
SIDE VIEW
10X
0.225
3
OPTIONAL MINIMIAL TOE LAND PATTERN
0.40
10X
6
0.35
0.45
9X
1
10
0.45
0.55
0.500
0.100
0.15
0.25
0.10
0.05
C
C
A B
0.100
0.100
BOTTOM VIEW
DETAIL A
PIN #1 TERMINAL
SCALE: 2X
A. DIMENSIONS ARE IN MILLIMETERS.
B. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994
C. DRAWING FILENAME: UMLP10Arev2
图 18. 10-引脚方形超薄
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:
http://www.fairchildsemi.com/products/analog/pdf/UMLP10_TNR.pdf.
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA2268 / FSA2268T • Rev. 1.1.0
10
Physical Dimensions (Continued)
0.10 C
2.10
A
2X
1.62
B
KEEPOUT ZONE, NO TRACES
OR VIAS ALLOWED
(0.11)
0.56
1.12
1.60
PIN1 IDENT IS
2X LONGER THAN
OTHER LINES
0.10 C
10X
(0.35)
(0.25)
2X
10X
0.50
TOP VIEW
RECOMMENDED LAND PATTERN
0.55 MAX
0.05 C
0.05 C
0.05
0.00
(0.20)
C
0.35
0.25
SIDE VIEW
(0.15)
D
DETAIL A
(0.36)
0.35
0.25
0.65
0.55
0.35
0.25
DETAIL A 2X SCALE
1
4
0.56
NOTES:
10
5
A. PACKAGE CONFORMS TO JEDEC
REGISTRATION MO-255, VARIATION UABD .
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
D. PRESENCE OF CENTER PAD IS PACKAGE
SUPPLIER DEPENDENT. IF PRESENT IT
IS NOT INTENDED TO BE SOLDERED AND
HAS A BLACK OXIDE FINISH.
(0.29)
0.35
6
9
9X
0.25
0.50
0.25
0.15
9X
1.62
0.10
0.05
C
C
A B
ALL FEATURES
E. DRAWING FILENAME: MKT-MAC10Arev5.
BOTTOM VIEW
图 19. 10-引脚, MicroPak™, 1.6mm宽
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
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warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:
http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf.
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA2268 / FSA2268T • Rev. 1.1.0
11
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA2268 / FSA2268T • Rev. 1.1.0
12
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