FNB34060T6 [ONSEMI]
Intelligent Power Module, 600 V, 40A;
| 型号： | FNB34060T6 |
| 厂家： | 
ONSEMI |
| 描述： | Intelligent Power Module, 600 V, 40A |
| 文件： | 总16页 (文件大小：727K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FNB34060T6
Motion SPM) 3 Series
Description
FNB34060T6 is an advanced Motion SPM 3 module providing a
fully−featured, high−performance inverter output stage for AC
Induction, BLDC, and PMSM motors. These modules integrate
optimized gate drive of the built−in IGBTs to minimize EMI and
losses, while also providing multiple on−module protection features
including under−voltage lockouts, over−current shutdown, thermal
monitoring of drive IC, and fault reporting. The built−in, high−speed
HVIC requires only a single supply voltage and translates the
incoming logic−level gate inputs to the high−voltage, high−current
drive signals required to properly drive the module’s internal IGBTs.
Separate negative IGBT terminals are available for each phase to
support the widest variety of control algorithms.
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3D Package Drawing
(Click to Activate 3D Content)
Features
SPM27−CF,
CASE MODFL
• 600 V − 40 A 3−Phase IGBT Inverter with Integral Gate Drivers and
Protection
• Low−Loss, Short−Circuit Rated IGBTs
MARKING DIAGRAM
• Very Low Thermal Resistance using Al O DBC Substrate
2
3
• Built−In Bootstrap Diodes and Dedicated Vs Pins Simplify PCB
Layout
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• Separate Open−Emitter Pins from Low−Side IGBTs for Three−Phase
Current Sensing
FNB34060T6
&Z&K&E&E&E&3
EK&Z&K&3
• Single−Grounded Power Supply
• LVIC Temperature−Sensing Built−In for Temperature Monitoring
• Isolation Rating: 2500 V / 1 min.
rms
$Y
&Z
&3
&K
= ON Semiconductor Logo
• This Device is Pb−Free and is RoHS Compliant
= Assembly Plant Code
= Data Code (Year & Week)
= Lot
Applications
FNB34060T6
= Specific Device Code
• Motion Control − Home Appliance / Industrial Motor
Related Resources
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
• AN−9088 − Motion SPM3 V6 Series Users Guide
• AN−9086 − SPM 3 Package Mounting Guide
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
April, 2019 − Rev. 2
FNB34060T6/D
FNB34060T6
PACKAGE MARKING AND ORDERING INFORMATION
Device
Device Marking
Package
Packing
Quantity
FNB34060T6
FNB34060T6
SPM27−CF
Rail
10
Integrated Power Functions
• For Inverter Low−side IGBTs:
• 600 V − 40 A IGBT inverter for three−phase DC / AC
Gate drive circuit, Short−Circuit Protection (SCP)
control supply circuit Under−Voltage Lock−Out
Protection (UVLO)
power conversion (Please refer to Figure 3)
Integrated Drive, Protection and System Control
Functions
• Fault Signaling:
corresponding to UVLO (low−side supply) and SC
• For Inverter High−side IGBTs:
faults
Gate drive circuit, high−voltage isolated high−speed
level shiftingcontrol circuit Under−Voltage Lock−Out
Protection (UVLO)
• Input Interface:
Active−HIGH interface, works with 3.3 / 5 V logic,
Schmitt−trigger input
NOTE: Available bootstrap circuit example is given in
Figures 4 and 14
Pin Configuration
Figure 1. Top View
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2
FNB34060T6
PIN DESCRIPTIONS
Pin No.
Pin Name
Pin Description
1
2
V
Low−Side Common Bias Voltage for IC and IGBTs Driving
DD(L)
COM
Common Supply Ground
3
4
5
IN
IN
Signal Input for Low−Side U−Phase
Signal Input for Low−Side V−Phase
Signal Input for Low−Side W−Phase
(UL)
(VL)
IN
(WL)
6
7
V
Fault Output
FO
V
Output for LVIC Temperature Sensing Voltage Output
TS
SC
8
C
Shut Down Input for Short−Circuit Current Detection Input
9
IN
(UH)
Signal Input for High−Side U−Phase
10
V
DD(H)
High−Side Common Bias Voltage for IC and IGBTs Driving
11
V
High−Side Bias Voltage for U−Phase IGBT Driving
B(U)
S(U)
12
13
14
V
High−Side Bias Voltage Ground for U−Phase IGBT Driving
Signal Input for High−Side V−Phase
IN
(VH)
V
DD(H)
High−Side Common Bias Voltage for IC and IGBTs Driving
15
16
V
High−Side Bias Voltage for V−Phase IGBT Driving
B(V)
V
S(V)
High−Side Bias Voltage Ground for V Phase IGBT Driving
17
IN
(WH)
Signal Input for High−Side W−Phase
18
19
V
High−Side Common Bias Voltage for IC and IGBTs Driving
High−Side Bias Voltage for W−Phase IGBT Driving
DD(H)
V
B(W)
S(W)
20
21
22
23
24
25
26
27
V
High−Side Bias Voltage Ground for W−Phase IGBT Driving
Negative DC−Link Input for U−Phase
Negative DC−Link Input for V−Phase
Negative DC−Link Input for W−Phase
Output for U−Phase
N
N
U
V
N
W
U
V
W
P
Output for V−Phase
Output for W−Phase
Positive DC−Link Input
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3
FNB34060T6
Internal Equivalent Circuit and Input/Output Pins
P (27)
(19) V
(18) V
V
V
COM
IN
B(W)
B
DD
DD(H)
OUT
(17) IN
V
S
(WH)
W (26)
(20) V
S(W)
(15) V
B(V)
V
V
B
(14) V
DD(H)
DD
OUT
COM
IN
(13) IN
(16) V
V
S
(VH)
V (25)
U (24)
S(V)
(11) V
(10) V
B(U)
V
V
COM
IN
B
DD
DD(H)
OUT
V
S
(9) IN
S(UH)
(12) V
S(U)
OUT
OUT
C
(8) C
SC
SC
(7) V
V
TS
TS
N
N
N
(23)
(22)
(21)
W
(6) V
V
FO
FO
(5) IN
IN
IN
IN
(WL)
(4) IN
(VL)
(UL)
V
(3) IN
(2) COM
(1) V
COM
OUT
DD(L)
V
DD
U
Figure 2. Internal Block Diagram
1. Inverter low−side is composed of three IGBTs, freewheeling diodes for each IGBT, and one control IC. It has gate drive and protection
functions.
2. Inverter power side is composed of four inverter DC−link input terminals and three inverter output terminals.
3. Inverter high−side is composed of three IGBTs, freewheeling diodes, and three drive ICs for each IGBT.
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4
FNB34060T6
ABSOLUTE MAXIMUM RATINGS (T = 25°C, Unless Otherwise Specified)
J
Conditions
Symbol
Parameter
Rating
Unit
INVERTER PART
V
Supply Voltage
Applied between P − N , N , N
450
500
V
V
PN
U
V
W
VP
Supply Voltage (Surge)
Applied between P − N , N , N
U V
N(Surge)
W
V
CES
Collector − Emitter Voltage
600
V
T
= 25°C, T ≤ 150°C (Note 4)
J
I
Each IGBT Collector Current
40
80
A
A
C
C
I
Each IGBT Collector Current (Peak)
T = 25°C, T ≤ 150°C, Under 1 ms Pulse Width
C J
(Note 4)
CP
P
C
Collector Dissipation
T
C
= 25°C per One Chip (Note 4)
105
W
T
J
Operating Junction Temperature
−40~150
°C
CONTROL PART
V
Control Supply Voltage
Applied between V
, V − COM
20
20
V
V
DD
DD(H) DD(L)
−
V
High−Side Control Bias Voltage
Applied between V
− V , V
S(U) B(V)
− V , V
S(V) B(W)
BS
B(U)
V
S(W)
V
IN
Input Signal Voltage
Applied between IN
(WL)
, IN
, IN
, IN
, IN
,
−0.3~V +0.3
V
(UH)
(VH)
(WH)
(UL)
(VL)
DD
IN
− COM
V
Fault Output Supply Voltage
Fault Output Current
Applied between V − COM
−0.3~V +0.3
V
mA
V
FO
FO
DD
I
Sink Current at V pin
2
FO
FO
V
SC
Current Sensing Input Voltage
Applied between C − COM
−0.3~V +0.3
SC
DD
BOOTSTRAP DIODE PART
V
RRM
Maximum Repetitive Reverse Voltage
600
V
T
= 25°C, T ≤ 150°C (Note 4)
J
I
Forward Current
0.5
2.0
A
A
C
F
I
Forward Current (Peak)
T = 25°C, T ≤ 150°C, Under 1 ms Pulse Width
C J
(Note 4)
FP
T
J
Operating Junction Temperature
−40~150
°C
TOTAL SYSTEM
V
Self Protection Supply Voltage Limit
(Short Circuit Protection Capability)
V
= V = 13.5~16.5 V, T = 150°C,
400
V
PN(PROT)
DD
BS
J
Non−repetitive, < 2 ms
T
Module Case Operation Temperature
Storage Temperature
See Figure 1
−40~125
−40~125
2500
°C
°C
C
T
STG
V
ISO
Isolation Voltage
60 Hz, Sinusoidal, AC 1 minute, Connection Pins to
Heat Sink Plate
V
rms
THERMAL RESISTANCE
Symbol
Parameter
Conditions
Min.
−
Typ.
−
Max.
1.19
1.96
Unit
°C/W
°C/W
R
Junction to Case Thermal Resistance Inverter IGBT part (per 1 / 6 module)
(Note 5)
th(j−c)Q
R
Inverter FWD part (per 1 / 6 module)
−
−
th(j−c)F
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
4. These values had been made an acquisition by the calculation considered to design factor.
5. For the measurement point of case temperature (T ), please refer to Figure 1.
C
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5
FNB34060T6
ELECTRICAL CHARACTERISTICS (T = 25°C, Unless Otherwise Specified)
J
Symbol
Parameter
Test Conditions
Min. Typ. Max. Unit
INVERTER PART
V
Collector − Emitter Saturation Voltage
V
V
= V = 15 V
I
= 40 A, T = 25°C
−
−
1.50 2.05
1.75 2.35
V
CE(SAT)
DD
IN
BS
C
J
= 5 V
V
F
FWDi Forward Voltage
Switching Times
V
IN
= 0 V
I = 40 A, T = 25°C
F
V
J
HS
t
V
V
= 300 V, V = 15 V, I = 40 A,T = 25°C
0.75 1.15 1.75
ms
ms
ON
PN
IN
DD
C
J
= 0 V ↔ 5 V, Inductive Load
t
−
−
−
−
0.25 0.75
1.20 1.70
0.15 0.50
See Figure 4
(Note 6)
C(ON)
ms
ms
ms
ms
ms
ms
ms
ms
mA
t
OFF
t
C(OFF)
t
rr
0.14
−
LS
t
V
V
= 300 V, V = 15 V, I = 40 A,T = 25°C
0.60 1.09 1.60
ON
PN
IN
DD
C
J
= 0 V ↔ 5 V, Inductive Load
t
−
−
−
0.25 0.70
1.25 1.75
0.20 0.55
See Figure 4
(Note 6)
C(ON)
t
OFF
t
C(OFF)
t
rr
−
−
0.14
−
I
Collector − Emitter Leakage Current
V
CE
= V
CES
−
5
CES
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. t and t
include the propagation delay time of the internal drive IC. t
and t
are the switching time of IGBT itself under the given
ON
OFF
C(ON)
C(OFF)
gate driving condition internally. For the detailed information, please see Figure 3.
100% I 100% I
C
C
t
rr
I
C
I
C
V
CE
V
CE
V
IN
V
IN
t
t
(OFF)
ON
t
C(ON)
t
C(OFF)
10% I
C
V
10% V
IN(OFF)
CE
10% I
C
V
IN(ON)
90% I
10% V
C
CE
(b) turn−off
(a) turn−on
Figure 3. Switching Time Definition
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FNB34060T6
One−Leg Diagram of SPM 3
IC
P
CBS
VB
COM(H) OUT(H)
V
(H)
DD
LS Switching
VS
IN(H)
VPN
HS Switching
U,V,W
V
Inductor
300V
LS Switching
IN(L)
V
(L)
DD
VFO
VTS
CSC
VIN
HS Switching
OUT(L)
5V
0V
VDD
V
4.7kΩ
COM(L)
NU,V,W
+15V
V
+5V
Figure 4. Example Circuit for Switching Test
Inductive Load, V = 300 V, V = 15 V, T = 25°C
Inductive Load, V = 300 V, V = 15 V, T = 150°C
PN DD J
PN
DD
J
4000
3500
3000
2500
2000
1500
1000
500
4000
3500
3000
2500
2000
1500
1000
500
IGBT Turn−on, Eon
IGBT Turn−off, Eoff
FRD Turn−off, Erec
IGBT Turn−on, Eon
IGBT Turn−off, Eoff
FRD Turn−off, Erec
0
0
0
10
20
30
40
0
10
20
30
40
COLLECTOR CURRENT, I [AMPERES]
COLLECTOR CURRENT, I [AMPERES]
C
C
Figure 5. Switching Loss Characterstics
Figure 6. Temperature Profile of VTS (Typical)
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FNB34060T6
BOOTSTRAP DIODE PART
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
V
F
Forward Voltage
I = 0.1 A, T = 25°C
−
2.5
−
V
F
J
I = 0.1 A, dI / dt = 50 A / ms, T = 25°C
t
rr
Reverse Recovery Time
−
80
−
ns
F
F
J
CONTROL PART
Symbol
Parameter
Min
V = 15 V,
DD(H)
Conditions
Min.
Typ.
Max.
Unit
I
Quiescent V Supply Current
VDD(H) − COM
−
−
0.50
mA
QDDH
DD
IN
= 0 V
(UH,VH,WH)
I
V
= 15 V,
(UL,VL, WL)
VDD(L) − COM
−
−
−
−
6.00
0.60
mA
mA
QDDL
DD(L)
IN
= 0 V
I
Operating V Supply Current
V
DD(H)
= 15 V, f
= 20 kHz,
V
DD(H)
− COM
PDDH
DD
PWM
duty = 50%, applied to one
PWM signal input for
High−Side
I
V
= 15 V, f = 20 kHz,
PWM
V
DD(L)
− COM
−
−
11.0
mA
PDDL
DD(L)
duty = 50%, applied to one
PWM signal input for
Low−Side
I
Quiescent V Supply Current
V = 15 V,
BS
(UH, VH, WH)
VB(U) − VS(U),
VB(V) − VS(V),
VB(W) − VS(W)
−
−
−
−
0.30
5.50
mA
mA
QBS
BS
IN
= 0 V
I
Operating V Supply Current
V
f
= V = 15 V,
PWM
applied to one PWM signal
VB(U) − VS(U),
VB(V) − VS(V),
VB(W) − VS(W)
PBS
BS
DD
BS
= 20 kHz, duty = 50%,
input for High−Side
V
Fault Output Voltage
V
V
= 15 V, V = 0 V,
4.5
−
−
−
V
V
FOH
DD
FO
SC
Circuit: 4.7 kΩ to 5 V
Pull−up
V
V
DD
V
FO
= 15 V, V = 1 V,
−
0.5
FOL
SC
Circuit: 4.7 kΩ to 5 V
Pull−up
V
Short Circuit Trip Level
V
= 15 V (Note 7)
C
− COM
(L)
0.45
9.8
0.50
−
0.55
13.3
13.8
12.5
13.0
−
V
V
SC(ref)
DD
SC
UV
Supply Circuit Under
− Voltage Protection
Detection Level
Reset Level
DDD
DDR
BSD
BSR
UV
UV
UV
10.3
9.0
−
V
Detection Level
Reset Level
−
V
9.5
−
V
t
Fault−Out Pulse Width
50
−
ms
mV
FOD
V
TS
LVIC Temperature Sensing
Voltage Output
V
DD(L)
= 15 V, T
LVIC
= 25°C (Note 8)
540
640
740
See Figure 6
V
ON Threshold Voltage
OFF Threshold Voltage
Applied between IN
(UL, VL, WL)
− COM,
(UH, VH, WH)
−
−
−
2.6
V
V
IN(ON)
IN
− COM
V
0.8
−
IN(OFF)
7. Short−circuit current protection is functioning only at the low−sides.
8. T
is the temperature of LVIC itself. V is only for sensing temperature of LVIC and can not shutdown IGBTs automatically.
LVIC
TS
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FNB34060T6
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Supply Voltage
Conditions
Min.
−
Typ.
300
15
Max.
400
Unit
V
V
Applied between P − N , N , N
PN
DD
U
V
W
V
Control Supply Voltage
High−Side Bias Voltage
Control Supply Variation
Applied between V
− COM,
14.0
16.5
V
DD(H)
V
− COM
DD(L)
V
BS
Applied between V
− V
,
13.0
− 1
15
−
18.5
1
V
V/ms
ms
B(U)
S(U)
− V
S(V) B(W) S(W)
V
B(V)
− V
, V
dV / dt,
DD
dV / dt
BS
t
Blanking Time for Preventing Arm −
Short
For Each Input Signal
2.0
−
−
dead
f
PWM Input Signal
−40_C ≤ T ≤ 125°C, −40_C ≤ T ≤ 150°C
−
−
20
5
kHz
V
PWM
C
J
V
Voltage for Current Sensing
Applied between N , N , N − COM
−5
SEN
U
V
W
(Including Surge Voltage)
PW
PW
Minimum Input Pulse Width
Junction Temperature
V
= V = 15 V, I ≤ 100 A,
2.5
2.5
−
−
−
−
ms
ms
°C
IN(ON)
DD
BS
C
Wiring Inductance between N
DC Link N < 10 nH (Note 9)
and
U, V, W
IN(OFF)
T
−40
−
150
J
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
9. This product might not make response if input pulse width is less than the recommanded value.
50
40
30
20
10
0
f
= 5 KHz
SW
V
= 300 V, V = V = 15 V
DD BS
DC
f
= 15 KHz
100
SW
T = 150°C , T = 125°C
J
C
M.I. = 0.9, P.F. = 0.8
Sinusoidal PWM
0
20
40
60
80
120
140
Case Temperature, T [°C]
C
Figure 7. Allowable Maximum Output Current
10.This allowable output current value is the reference data for the safe operation of this product. This may be different from the actual application
and operating condition.
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FNB34060T6
MECHANICAL CHARACTERISTISC AND RATINGS
Limits
Typ.
Min.
Max.
Parameter
Conditions
Unit
mm
Device Flatness
Mounting Torque
See Figure 8
0
−
0.7
7.1
−
+150
0.8
8.1
−
Mounting Screw: M3
See Figure 9
Recommended 0.7 N/m
Recommended 7.1 kg/cm
0.6
6.2
10
2
N/m
kg/cm
s
Terminal Pulling Strength
Terminal Bending Strength
Load 19.6 N
Load 9.8 N, 90 deg. bend
−
−
times
Weight
−
15
−
g
( + )
( + )
Figure 8. Flatness Measurement Position
Pre−Screwing : 1"2
Final Screwing : 2"1
2
1
Figure 9. Mounting Screws Torque Order
11. Do not make over torque when mounting screws. Much mounting torque may cause DBC cracks, as well as bolts and Al heat−sink
destruction.
12.Avoid one−sided tightening stress. Figure 9 shows the recommended torque order for mounting screws. Uneven mounting can cause the
DBC substrate of package to be damaged. The pre−screwing torque is set to 20 ~ 30% of maximum torque rating.
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FNB34060T6
Time Charts of SPMs Protective Function
Input Signal
RESET
a1
SET
RESET
UV
DDR
a6
UV
a3
a4
DDD
a2
a7
Output Current
a5
Fault Output Signal
Figure 10. Under−Voltage Protection (Low−Side)
a1 : Control supply voltage rises: After the voltage rises UV
a2 : Normal operation: IGBT ON and carrying current.
, the circuits start to operate when next input is applied.
DDR
a3 : Under voltage detection (UV
).
DDD
a4 : IGBT OFF in spite of control input condition.
a5 : Fault output operation starts with a fixed pulse width.
a6 : Under voltage reset (UV
).
DDR
a7 : Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH.
Input Signal
RESET
b1
SET
RESET
UV
BSR
b5
UV
b2
BSD
b3
b4
b6
Output Current
High−level (no fault output)
Fault Output Signal
Figure 11. Under−Voltage Protection (High−Side)
b1 : Control supply voltage rises: After the voltage reaches UVBSR, the circuits start to operate when next input is applied.
b2 : Normal operation: IGBT ON and carrying current.
b3 : Under voltage detection (UV
).
BSD
b4 : IGBT OFF in spite of control input condition, but there is no fault output signal.
b5 : Under voltage reset (UV ).
BSR
b6 : Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH.
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FNB34060T6
c6
c7
SET
RESET
c4
Internal delay
at protection circuit
SC current trip level
c8
c1
Output Current
SC Reference Voltage
RC Filter circuit
time constant
delay
Fault Output Signal
c5
Figure 12. Under−Voltage Protection (Low−Side)
(with the external sense resistance and RC filter connection)
c1 : Normal operation: IGBT ON and carrying current.
c2 : Short circuit current detection (SC trigger).
c3 : All low−side IGBT’s gate are hard interrupted.
c4 : All low−side IGBTs turn OFF.
c5 : Fault output operation starts with a fixed pulse width.
c6 : Input HIGH: IGBT ON state, but during the active period of fault output the IGBT doesn’t turn ON.
c7 : Fault output operation finishes, but IGBT doesn’t turn on until triggering next signal from LOW to HIGH.
c8 : Normal operation: IGBT ON and carrying current.
Input/Output Interface Circuit
+5 V (MCU or Control power)
4.7 kΩ
SPM
IN
IN
, IN
, IN
(UH)
(VH)
(WH)
, IN
, IN
(UL)
(VL)
(WL)
MCU
V
FO
COM
Figure 13. Recommended CPU I/O Interface Circuit
13.RC coupling at each input might change depending on the PWM control scheme used in the application and the wiring impedance of the
application’s printed circuit board. The input signal section of the Motion SPM 3 product integrates 5 kΩ (typ.) pull−down resistor. Therefore,
when using an external filtering resistor, please pay attention to the signal voltage drop at input terminal.
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12
FNB34060T6
P (27)
W (26)
R1
(17) IN(WH)
(18) VDD(H)
Gating WH
Gating VH
Gating UH
IN
VDD
OUT
VS
C4
COM
(19) VB(W)
C3 C4
VB
(20) VS(W)
D2
D2
D2
R1
(13) IN (VH)
IN
VDD
(14) VDD(H)
OUT
VS
C4
COM
(15) VB(V)
(16) VS(V)
C3 C4
V (25)
VB
M
R1
(9) IN
(UH)
IN
M
C
U
(10) VDD(H)
VDD
COM
C7
VDC
OUT
VS
C4
C1 C1 C1
(11) VB(U)
(12) VS(U)
C3 C4
U (24)
VB
5 V line
R3
VTS
R6
D
C6
C5
(8) CSC
(7) VTS
B
OUT
OUT
OUT
C
CSC
VTS
R4
A
NW (23)
NV (22)
NU (21)
R1
R1
(6) VFO
VFO
Fault
(5) IN(WL)
(4) IN(VL)
(3) IN(UL)
Gating WL
Gating VL
Gating UL
IN
IN
IN
R1
R1
R4
R4
E
Power
(2) COM
(1) VDD(L)
15 V line
COM
VDD
C1
C1
C1 C1 C1
GND Line
C4
C2
D2
R5
R5
R5
Control
GND Line
W−Phase Current
Input Signal for
Short−Circuit Protection
C5
C5
C5
Figure 14. Recommended CPU I/O Interface Circuit
14.To avoid malfunction, the wiring of each input should be as short as possible. (less than 2−3 cm)
15.V output is open−drain type. This signal line should be pulled up to the positive side of the MCU or control power supply with a resistor
FO
that makes I up to 2 mA. Please refer to Figure 13.
FO
16.Input signal is active−HIGH type. There is a 5 kW resistor inside the IC to pull−down each input signal line to GND. RC coupling circuits should
be adopted for the prevention of input signal oscillation. R C time constant should be selected in the range 50 ~ 150 ns. (Recommended
1
1
R = 100 W, C = 1 nF)
1
1
17.Each wiring pattern inductance of A point should be minimized (Recommend less than 10 nH). Use the shunt resistor R of surface mounted
4
(SMD) type to reduce wiring inductance. To prevent malfunction, wiring of point E should be connected to the terminal of the shunt resistor
R as close as possible.
4
18.To prevent errors of the protection function, the wiring of B, C, and D point should be as short as possible.
19.In the short−circuit protection circuit, please select the R C time constant in the range 1.5 ~ 2 ms. Do enough evaluaiton on the real system
6
6
because short−circuit protection time may vary wiring pattern layout and value of the R C time constant.
6
6
20.Each capacitor should be mounted as close to the pins of the Motion SPM 3 product as possible.
21.To prevent surge destruction, the wiring between the smoothing capacitor C and the P & GND pins should be as short as possible. The use
7
of a high−frequency non−inductive capacitor of around 0.1 ~ 0.22 mF between the P & GND pins is recommended.
22.Relays are used at almost every systems of electrical equipments at industrial application. In these cases, there should be sufficient distance
between the CPU and the relays.
23.The zener diode or transient voltage suppressor should be adopted for the protection of ICs from the surge destruction between each pair
of control supply terminals (Recommanded zener diode is 22 V / 1 W, which has the lower zener impedance characteristic than about 15ꢀΩ).
24.C of around 7 times larger than bootstrap capacitor C is recommended.
2
3
25.Please choose the electrolytic capacitor with good temperature characteristic in C . Also, choose 0.1 ~ 0.2 mF R−category ceramic capacitors
3
with good temperature and frequency characteristics in C .
4
SPM is a registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other
countries.
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13
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SPMCF−027 / PDD, STD, SPM27−CF, SHORT LEAD (Special) CUSTOMER SPECIFIC OPTION
CASE MODFL
ISSUE O
DATE 31 JAN 2017
98AON13570G
ON SEMICONDUCTOR STANDARD
DOCUMENT NUMBER:
STATUS:
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NEW STANDARD:
DESCRIPTION: SPMCF−027 / PDD, STD, SPM27−CF, SHORT LEAD (Special)
PAGE 1 OF2
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REVISION
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RELEASED FOR PRODUCTION FROM FAIRCHILD MKT−MOD27BD TO ON SEMI-
CONDUCTOR. REQ. BY I. HYLAND.
31 JAN 2017
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© Semiconductor Components Industries, LLC, 2017
Case Outline Number:
January, 2017 − Rev. O
MODFL
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