FMS6406CSX [ONSEMI]
精密 S 视频滤波器,带累加合成输出、声阱和群延时补偿;型号: | FMS6406CSX |
厂家: | ONSEMI |
描述: | 精密 S 视频滤波器,带累加合成输出、声阱和群延时补偿 放大器 光电二极管 商用集成电路 |
文件: | 总14页 (文件大小:701K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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August 2006
FMS6406
Precision S-Video Filter with Summed Composite
Output, Sound Trap, and Group Delay Compensation
Features
Description
■ 7.6MHz 5th-order Y,C filters with composite summer
The FMS6406 is a dualY/C 5th-order Butterworth lowpass
video filter optimized for minimum overshoot and flat
group delay. The device also contains a summing circuit
to generate filtered composite video, an audio trap and
group delay compensation circuit. The audio trap removes
videoinformationinthespectrallocationofthesubsequent
RF audio carrier. The group delay circuit predistorts the
signal to compensate for the inherent receiver IF filter’s
group delay distortion.
■ 14dB notch at 4.425MHz to 4.6MHz for sound trap
capable of handling stereo
■ 50dB stopband attenuation at 27MHz on Y, C,
and CV outputs
■ Better than 0.5dB flatness to 4.2MHz on Y, C,
and CV outputs
■ Equalizer and notch filter for driving RF modulator with
group delay of -180ns
■ No external frequency selection components or clocks
■ < 5ns group delay on Y, C, and CV outputs
■ AC coupled inputs
In a typical application, the Y and C input signals from
DACs are AC-coupled into the filters. Both channels have
DC-restore circuitry to clamp the DC-input levels during
video sync. The Y and C channels use separate feedback
clamps. The clamp pulse is derived from the Y channel.
■ AC or DC coupled outputs
■ Capable of PAL frequency for Y, C, CV
■ Continuous Time Low Pass Filters
All outputs are capable of driving 2Vpp,AC or DC-coupled,
into either a single or dual video load. A single video load
consists of a series 75W impedance matching resistor
connected to a terminated 75W line, this presents a total
of 150W of loading to the part. Adual load would be two of
these in parallel which would present a total of 75W to the
part. The gain of the Y, C and CV signals is 6dB with 1Vpp
input levels. All video channels are clamped during sync
to establish the appropriate output voltage reference levels.
■ <1.4% differential gain with 0.7° differential phase
on Y, C, and CV channels
■ Integrated DC restore circuitry with low tilt
Applications
■ Cable set-top boxes
■ Satellite set-top boxes
■ DVD players
Block Diagram
VCC
7
Sync Strip
Reference
and Timing
YIN
1
6dB
8
YOUT
gM
+
+
250mV
250mV
6
2
CVOUT
Σ
Notch
Group
Delay
EQ_NOTCH
gM
CIN
4
6dB
5
COUT
3
GND
Ordering Information
Operating Temp
Range
Packaging
Method
Part Number
Package
Pb-Free
SOIC-8
SOIC-8
Yes
Yes
0°C to +70°C
0°C to +70°C
Tube
FMS6406CS
FMS6406CSX
Tape and Reel
© 2006 Fairchild Semiconductor Corporation
FMS6406 Rev. 4.0.4
ꢀ
www.fairchildsemi.com
FMS6406 Pin Configuration
Pin Assignments
Pin#
Pin
Type
Description
Y
1
2
3
4
8
7
6
5
Y
OUT
CC
IN
1
YIN
Input
Luminance (Luma) Input: In a typical
system, this pin is connected to the
Luma or composite video output pin
from the external video encoder.
FMS6406
8-pin
SOIC
V
EQ_NOTCH
GND
CV
C
OUT
2
EQ_NOTCH Output
Composite video output to RF
modulator/driver.
C
IN
OUT
3
4
GND
CIN
Input
Input
Ground
Chrominance (Chroma) Input: In a
typical system, this pin is connected
to the Chroma output pin from the
external video encoder.
5
6
COUT
Output
Output
Filtered Chrominance Video Output
from the CIN channel.
CVOUT
Composite Video Output: This pin is
the sum of YOUT and COUT
.
7
8
VCC
Input
+5V supply.
YOUT
Output
Filtered Luminance Video Output
from the YIN channel.
© 2006 Fairchild Semiconductor Corporation
FMS6406 Rev. 4.0.4
ꢁ
www.fairchildsemi.com
Absolute Maximum Ratings
The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The
device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are
not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table defines the conditi-
ons for actual device operation.
Parameter
Min.
-0.3
-0.3
Max.
6
Unit
V
VCC
Analog and Digital I/O
VCC + 0.3
100
V
Output Channel - Any One Channel (Do Not Exceed)
mA
Notes:
Functional operation under any of these conditions is NOT implied. Performance and reliability are guaranteed only if operating conditions are not exceeded.
Reliability Information
Parameter
Min.
Typ.
115
Max.
150
Unit
Junction Temperature
°C
°C
°C
Storage Temperature Range
-65
+150
300
Lead Temperature (Soldering, 10s)
Thermal Resistance (qJA), JEDEC Standard Multi-layer
°C/W
Test Boards, Still Air
Recommended Operating Conditions
Parameter
Operating Temperature Range
VCC Range
Min
0
Typ
Max
70
Unit
°C
V
+4.75
+5.0
0
+5.25
GND
V
© 2006 Fairchild Semiconductor Corporation
FMS6406 Rev. 4.0.4
ꢂ
www.fairchildsemi.com
Electrical Characteristics
Tc = 25°C, Vi = 1Vpp, VCC = 5V, all inputs AC-coupled with 0.1μF, all outputs are AC-coupled with 220μF into
150Ω, referenced to 400kHz; unless otherwise noted.
Symbol Parameter
Conditions
Min Typ Max Units
ICC
Supply Current1
VCC no load
50
5.8
5.7
1.0
80
6.0
6.0
1.1
0.35
0.35
0.35
5
110
6.2
6.4
1.3
0.5
0.5
0.5
mA
dB
dB
V
1
AVYCCV
AVEQ
Csync
Low Frequency Gain (YOUT, COUT, CVOUT
Low Frequency Gain (EQ_NOTCH)1
COUT Output Level (during Sync)1
YOUT Output Level (during Sync)1
CVOUT Output Level (during Sync)1
)
at 400kHz
at 400kHz
Sync present on YIN (after 6dB gain)
Sync present on YIN (after 6dB gain)
Sync present on YIN (after 6dB gain)
Sync present on YIN (after 6dB gain)
Settled to within 10mV
Ysync
V
CVsync
EQsync
TCLAMP
fFLAT
V
EQ_NOTCH Output Level (during Sync)1
Clamp Response Time (Y Channel)
Gain Flatness to 4.2MHz2
V
ms
dB
-0.5
0
0.5
(YOUT, COUT, CVOUT
)
fC
-3dB Bandwidth1
Y, C, CV Channels
at 27MHz
6.7
40
7.6
50
MHz
dB
fSB
Stopband Attenuation1
(YOUT, COUT, CVOUT
)
Vi
Input Signal Dynamic Range
All Channels/AC coupled
1.4
85
Vpp
ISC
Output Short Circuit Current4
(Any One Channel)
Y, C, CV, EQ_NOTCH to GND
mA
dG
Differential Gain2
Y, C, CV
1.4
0.7
0.3
-50
50
75
75
70
112
0
3
%
°
Differential Phase2
Y, C, CV
1.5
dq
THD
XTALK
PSRR
SNR
Output Distortion (All Channels)
Crosstalk (Channel-to-Channel)
PSRR (All Channels)
VOUT = 1.8Vpp at 3.58MHz
at 3.58MHz
%
dB
dB
dB
dB
dB
ns
ns
ns
%
DC
SNR Y, C Channel2
NTC-7 weighting 4.2MHz lowpass
NTC-7 weighting 4.2MHz lowpass
NTC-7 weighting 4.2MHz lowpass
at 400kHz
70
70
65
SNR CV Channel2
SNR EQ_NOTCH Channel2
Propagation Delay (Y, C, CV)
Group Delay (Y, C, CV)2
tpd
GD
at 3.58MHz (NTSC)
-5
-2
5
2
2
tSKEW
tCLGCV
tCLDCV
GDEQ
tCLGEQ
tCLDEQ
dGEQ
dqEQ
Skew Between YOUT and COUT
at 1MHz
0
1
Chroma-Luma Gain CVOUT
f = 3.58MHz (ref to YIN at 400kHz)
f = 3.58MHz (ref to YIN at 400kHz)
f = 3.58MHz (ref to YIN at 400kHz)
f = 3.58MHz (ref to YIN at 400kHz)
f = 3.58MHz (ref to YIN at 400kHz)
EQ_NOTCH Channel
98
-10
100
0
102
10
1
Chroma-Luma Delay CVOUT
ns
ns
%
Group Delay EQ_NOTCH1
Chroma-Luma Gain EQ_NOTCH1
Chroma-Luma Delay EQ_NOTCH1
Differential Gain2
-195 -180 -165
95 100 105
-195 -180 -165
ns
%
0.3
0.3
0
1
Differential Phase2
EQ_NOTCH Channel
0.75
0.5
0.5
%
MCF
AVPK
Atten1
Atten2
Atten3
tPASS
Modulator Channel Flatness1,3
Gain Peaking1
EQ_NOTCH from 400kHz to 3.75MHz
EQ_NOTCH from >3.75MHz to 4.2MHz
EQ_NOTCH at 4.425MHz
EQ_NOTCH at 4.5MHz
EQ_NOTCH at 4.6MHz
f = 400kHz to f = 3MHz
-0.5
-0.5
14
dB
dB
dB
dB
dB
ns
0
Notch Attenuation 11
Notch Attenuation 21
20
Notch Attenuation 31
14
Passband Group Delay, EQ_NOTCH1
-35
35
Notes:
1. 100% tested at 25°C.
2. Guaranteed by characterization.
3. Tested down to 400kHz, but guaranteed by design to 200kHz.
4. Sustained short circuit protection limited to 10 seconds.
© 2006 Fairchild Semiconductor Corporation
FMS6406 Rev. 4.0.4
4
www.fairchildsemi.com
Typical Performance Characteristics
Tc = 25°C, Vi = 1Vpp, VCC = 5V, all inputs AC-coupled with 0.1μF, all outputs are AC-coupled with 220μF into
150Ω, referenced to 400kHz; unless otherwise noted.
10
0
140
120
100
1
2
1
-10
-20
-30
-40
-50
-60
80
60
Mkr Frequency
Gain
Ref 400kHz
6dB
3
1
2
3
6.53MHz
7.87MHz
27MHz
-1dB BW
-3dB BW
-44.66dB
40
20
0
fSB = Gain(ref) – Gain(3) = 50.66dB
1 = 8.2MHz (111.35ns)
400kHz
5
10
15
20
25
30
400kHz
5
10
15
20
25
30
Frequency (MHz)
Figure ꢀ. Frequency Response Y
Frequency (MHz)
Figure ꢁ. Group Delay vs. Frequency Y
OUT
OUT
10
140
120
0
1
2
1
100
-10
-20
80
60
Mkr Frequency
Gain
-30
-40
-50
-60
Ref 400kHz
6dB
3
1
2
3
6.68MHz
7.87MHz
27MHz
-1dB BW
-3dB BW
-44.41dB
40
20
fSB = Gain(ref) – Gain(3) = 50.41dB
1 = 8.2MHz (111.16ns)
0
400kHz
5
10
15
20
25
30
400kHz
5
10
15
20
25
30
Frequency (MHz)
Frequency (MHz)
Figure ꢂ. Frequency Response C
Figure 4. Group Delay vs. Frequency C
OUT
OUT
10
140
120
0
1
2
1
100
-10
-20
80
60
Mkr Frequency
Gain
-30
-40
-50
-60
Ref 400kHz
6dB
3
1
2
3
6.53MHz
7.72MHz
27MHz
-1dB BW
-3dB BW
-43.49dB
40
20
fSB = Gain(ref) – Gain(3) = 49.49dB
1 = 8.2MHz (112.84ns)
0
400kHz
5
10
15
20
25
30
400kHz
5
10
15
20
25
30
Frequency (MHz)
Frequency (MHz)
Figure ꢃ. Frequency Response CV
Figure 6. Group Delay vs. Frequency CV
OUT
OUT
© 2006 Fairchild Semiconductor Corporation
ꢃ
www.fairchildsemi.com
FMS6406 Rev. 4.0.4
Typical Performance Characteristics
Tc = 25°C, Vi = 1Vpp, VCC = 5V, HD/N_SD = 0, RSOURCE = 37.5Ω, all inputs AC-coupled with 0.1μF, all outputs
are AC-coupled with 220μF into 150Ω, referenced to 400kHz; unless otherwise noted.
1500
1000
500
10
5
0
1
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
0
1
-500
-1000
-1500
-2000
-2500
1 = 4.425MHz (-16.00dB)
1 = 4.425MHz (198.47ns)
400kHz
5
10
15
20
25
30
400kHz
5
10
15
20
25
30
Frequency (MHz)
Frequency (MHz)
Figure 7. Modulator vs. Frequency Response
Figure 8. Delay Modulator Output
0.2
0.2
NTSC
NTSC
0.1
0
0.1
0
-0.1
-0.1
-0.2
-0.3
-0.2
Min = -0.19
Min = -0.17
Max = 0.07
ppMax = 0.25
Max = 0.16
ppMax = 0.34
-0.3
1st
2nd
3rd
4th
5th
6th
1st
2nd
3rd
4th
5th
6th
Figure 9. Differential Gain, MOD
Figure ꢀ0. Differential Phase, MOD
OUT
OUT
-60
-65
-70
-75
-80
-85
-90
-95
-100
200
Group Delay @ 3.58MHz = -178ns
150
100
50
0
-50
-100
-150
-200
0
1
2
3
4
5
0
1.0
2.0
3.0
4.0
4.6
Frequency (MHz)
Frequency (MHz)
Figure ꢀꢀ. Noise vs. Freq. Modulator Channel
Figure ꢀꢁ. Group Delay vs. Frequency
© 2006 Fairchild Semiconductor Corporation
FMS6406 Rev. 4.0.4
6
www.fairchildsemi.com
Typical Performance Characteristics
Tc = 25°C, Vi = 1Vpp, VCC = 5V, HD/N_SD = 0, RSOURCE = 37.5Ω, all inputs AC-coupled with 0.1μF, all outputs
are AC-coupled with 220μF into 150Ω, referenced to 400kHz; unless otherwise noted.
2.0
1.5
1.0
0.5
0
0.8
0.6
0.4
0.2
0
Min = -0.00
Max = 1.17
ppMax = 1.16
Min = -0.01
Max = 0.59
ppMax = 0.60
NTSC
NTSC
-0.5
-0.2
1st
2nd
3rd
4th
5th
6th
1st
2nd
3rd
4th
5th
6th
Figure ꢀꢂ. Differential Gain, V
Figure ꢀ4. Differential Phase, V
OUT
OUT
1.2
0.25
NTSC
NTSC
1.0
0.8
0.4
0.2
0.20
0.15
0.10
0.05
0
0
Min = -0.00
Max = 0.88
ppMax = 0.87
Min = -0.04
Max = 0.21
ppMax = 0.25
-0.2
-0.05
-0.10
-0.4
1st
2nd
3rd
4th
5th
6th
1st
2nd
3rd
4th
5th
6th
Figure ꢀꢃ. Differential Gain, C
Figure ꢀ6. Differential Phase, C
OUT
OUT
2.0
0.5
Min = -0.00
Max = 1.42
ppMax = 1.40
NTSC
NTSC
0.4
0.3
0.2
0.1
0
1.5
1.0
0.5
0
Min = -0.00
Max = 0.46
ppMax = 0.46
-0.5
-0.1
1st
2nd
3rd
4th
5th
6th
1st
2nd
3rd
4th
5th
6th
Figure ꢀ7. Differential Gain, CV
Figure ꢀ8. Differential Phase, CV
OUT
OUT
© 2006 Fairchild Semiconductor Corporation
7
www.fairchildsemi.com
FMS6406 Rev. 4.0.4
Typical Performance Characteristics
Tc = 25°C, Vi = 1Vpp, VCC = 5V, HD/N_SD = 0, RSOURCE = 37.5Ω, all inputs AC-coupled with 0.1μF, all outputs
are AC-coupled with 220μF into 150Ω, referenced to 400kHz; unless otherwise noted.
-60
-65
-70
-75
-50
-55
-60
-65
-70
-75
-80
-85
-80
-90
-85
-95
-90
-100
-95
-100
-105
-105
-110
0
1.0
2.0
3.0
4.0
5.0
0
1.0
2.0
3.0
4.0
5.0
Frequency (MHz)
Frequency (MHz)
Figure ꢀ9. Noise vs. Frequency Y
Figure ꢁ0. Noise vs. Frequency C
OUT
OUT
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
-105
-110
0
1.0
2.0
3.0
4.0
5.0
Frequency (MHz)
Figureꢁꢀ. Noise vs. Frequency CV
OUT
© 2006 Fairchild Semiconductor Corporation
8
www.fairchildsemi.com
FMS6406 Rev. 4.0.4
Typical Application Diagrams
4.5MHz FM Sound
FMS6406
+
Notch and
Group
Delay
2
Video
Modulator
To Channel 3 or 4
1
4
8
6
5th-Order
Filter
Y
Y
OUT
IN
+
+
To TV
CV
5
5th-Order
Filter
to VCR
C
OUT
IN
7
3
5V
C
OUT
Figure ꢁꢁ. AC-Coupled Application Diagram
4.5MHz FM Sound
FMS6406
+
Notch and
Group
Delay
2
Video
Modulator
To Channel 3 or 4
1
4
8
6
5th-Order
Filter
Y
Y
OUT
IN
+
+
To TV
CV
5
5th-Order
Filter
to VCR
C
OUT
IN
7
3
5V
C
OUT
Figure ꢁꢂ. DC-Coupled Application Diagram
© 2006 Fairchild Semiconductor Corporation
FMS6406 Rev. 4.0.4
9
www.fairchildsemi.com
Chrominance (C) I/O
Functional Description
The chrominance input can be driven in the same manner
as the luminance input but is typically only a 0.7Vpp signal.
Introduction
This product is a two channel monolithic continuous time
video filter designed for reconstructing the luminance and
chrominance signals from an S-Video D/A source.
Composite video output is generated by summing the Y
and C outputs. The chip is designed to have AC coupled
inputs and will work equally well with either AC or DC
coupled outputs.
Since the chrominance signal doesn’t contain any DC
content, the output signal can be AC coupled using as
small as a 0.1μF capacitor if DC-coupling is not desired.
Composite Video (CV) Output
The composite video output driver is same as the other
outputs. When driving a dual load either output will still
function if the other output connection is inadvertently
shorted providing these loads are AC-coupled.
The reconstruction filters provide a 5th-order Butterworth
response with group delay equalization. This provides a
maximally flat response in terms of delay and amplitude.
Each of the four outputs is capable of driving 2Vpp into a
75Ω load.
Equalizer/Notch (EQ_NOTCH) Output
This output is designed to drive a 600Ω load to 2Vpp,
which will meet its primary intention of driving a modulator
load.
All channels are clamped during the sync interval to set the
appropriate minimum output DC level. With this operation
the effective input time constant is greatly reduced, which
allows for the use of small low cost coupling capacitors.
The net effect is that the input will settle to 10mV in 5ms
for any DC shifts present in the input video signal.
Layout Considerations
General layout and supply bypassing play major roles in
high-frequency performance and thermal characteristics.
The FMS6406DEMO is a 4-layer board with a full power
and ground plane. Following this layout configuration will
provide the optimum performance and thermal characte-
ristics. For optimum results, follow the steps below as a
basis for high frequency layout:
In most applications the input coupling capacitors are
0.1μF. The Y and C inputs typically sink 1μA of current
during active video, which normally tilts a horizontal line
by 2mV at the Y output. During sync, the clamp restores
this leakage current by sourcing an average of 20μA over
the clamp interval. Any change in the coupling capacitor
values will affect the amount of tilt per line. Any reduction
in tilt will come with an increase in settling time.
■ Include 1μF and 0.1μF ceramic bypass capacitors
■ Place the 1μF capacitor within 0.75 inches of the
power pin
Luminance (Y) I/O
■ Place the 0.1μF capacitor within 0.1 inches of the
power pin
The typical luma input is driven by either a low impedance
source of 1Vpp or the output of a 75Ω terminated line
driven by the output of a current DAC. In either case, the
input must be capacitively coupled to allow the sync-
detect and DC restore circuitry to operate properly.
■ For multi-layer boards, use a large ground plane to
help dissipate heat
■ For 2-layer boards, use a ground plane that extends
beyond the device by at least 0.5”
All outputs are capable of driving 2Vpp,AC or DC-coupled,
into either a single or dual video load. A single video load
consists of a series 75Ω impedance matching resistor
connected to a terminated 75Ω line, this presents a total
of 150Ω of loading to the part. A dual load would be two of
these in parallel which would present a total of 75Ω to the
part. The gain of the Y, C and CV signals is 6dB with 1Vpp
input levels. Even when two loads are present the driver
will produce a full 2Vpp signal at its output pin.
■ Minimize all trace lengths to reduce series inductances
© 2006 Fairchild Semiconductor Corporation
FMS6406 Rev. 4.0.4
ꢀ0
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Mechanical Dimensions
8-Lead Outline Package (SOIC)
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FMS6406 Rev. 4.0.4
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