FMS6143ACSX [ONSEMI]

VoltagePlus™ 三通道六阶SD视频滤波驱动器;
FMS6143ACSX
型号: FMS6143ACSX
厂家: ONSEMI    ONSEMI
描述:

VoltagePlus™ 三通道六阶SD视频滤波驱动器

驱动 光电二极管 商用集成电路 驱动器
文件: 总15页 (文件大小:523K)
中文:  中文翻译
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August 2011  
FMS6143A  
Three-Channel 6th-Order Standard-Definition  
VoltagePlus™ Video Filter Driver  
Features  
Description  
The FMS6143A VoltagePlus™ video filter is intended to  
replace passive LC filters and drivers with a cost-  
effective integrated device. Three 6th-order filters  
provide improved image quality compared to typical 2nd-  
and 3rd-order passive solutions.  
.
.
Three 6th-Order 8MHz (SD) Filter  
Drives Single AC- or DC-Coupled Video  
Loads (150)  
.
.
.
.
Transparent Input Clamping  
Single Supply: 3.3V  
The FMS6143A may be directly driven by a DC-coupled  
DAC output or an AC-coupled signal. Internal diode  
clamps and bias circuitry may be used if AC-coupled  
inputs are required (see Applications section for details).  
AC- or DC-Coupled Inputs and Outputs  
DC-Coupled Output Eliminates AC-Coupling  
Capacitor  
.
.
.
Robust 8.5kV ESD Protection  
Supply Voltage Range: 3.3V to 5.0V  
Lead-Free SOIC-8 Package  
The outputs can drive AC- or DC-coupled single (150)  
or dual (75) video loads. DC coupling the outputs  
removes the need for large output coupling capacitors.  
The input DC levels are offset approximately +280mV at  
the output (see Applications section for details).  
Applications  
.
.
.
.
.
.
Cable Set-Top Boxes  
Satellite Set-Top Boxes  
DVD Players  
Related Applications Notes  
AN-6024 – FMS6xxx Product Series Understanding  
Analog Video Signal Clamps, Bias, DC Restore, and  
AC or DC coupling Methods  
HDTV  
Personal Video Recorders (PVR)  
Video On Demand (VOD)  
AN-6041 – PCB Layout Considerations for Video  
Filter / Drivers  
6dB  
Transparent Clamp  
IN1  
IN2  
IN3  
OUT1  
6dB  
Transparent Clamp  
Transparent Clamp  
OUT2  
6dB  
OUT3  
Figure 1.  
Block Diagram  
Ordering Information  
Part Number Operating Temperature Range  
Package  
Packing Method Quantity  
8-Lead, Small Outline  
Integrated Circuit (SOIC)  
FMS6143ACSX  
-40°C to +85°C  
Reel  
5000  
© 2009 Fairchild Semiconductor Corporation  
FMS6143A • Rev. 1.0.1  
www.fairchildsemi.com  
Pin Configuration  
IN1  
IN2  
OUT1  
OUT2  
OUT3  
GND  
Fairchild  
FMS6143A  
8-Lead SOIC  
IN3  
VCC  
Figure 2.  
Pin Assignments  
Pin Definitions  
Pin #  
Name  
IN1  
Type  
Input  
Description  
1
2
3
4
5
6
7
8
Video Input Channel 1  
Video Input Channel 2  
Video Input Channel 2  
Positive Power Supply  
Device Ground Connection  
Filtered Output Channel 3  
Filtered Output Channel 2  
Filtered Output Channel 1  
IN2  
Input  
IN3  
Input  
Vcc  
Input  
GND  
OUT3  
OUT2  
OUT1  
Input  
Output  
Output  
Output  
© 2009 Fairchild Semiconductor Corporation  
FMS6143A • Rev. 1.0.1  
www.fairchildsemi.com  
2
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.  
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.  
The absolute maximum ratings are stress ratings only.  
Symbol  
VS  
Parameter  
Min.  
-0.3  
-0.3  
Max.  
6.0  
Unit  
V
DC Supply Voltage  
VIO  
Analog and Digital I/O  
VCC+0.3  
50  
V
VOUT  
Maximum Output Current, Do Not Exceed  
mA  
Electrostatic Discharge Information  
Symbol  
Parameter  
Min.  
8.5  
Unit  
Human Body Model, JESD22-A114  
Charged Device Model, JESD22-C101  
ESD  
kV  
2.0  
Reliability Information  
Symbol  
Parameter  
Min.  
Typ.  
Max.  
+150  
+150  
Unit  
TJ  
Junction Temperature  
°C  
°C  
TSTG  
Storage Temperature Range  
-65  
Thermal Resistance, JEDEC Standard,  
Multilayer Test Boards, Still Air  
115  
°C/W  
JA  
Recommended Operating Conditions  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended  
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not  
recommend exceeding them or designing to Absolute Maximum Ratings.  
Symbol  
TA  
Parameter  
Operating Temperature Range  
Supply Voltage Range  
Min.  
-40  
Typ.  
Max.  
+85  
Unit  
°C  
VCC  
3.14  
3.30  
5.25  
V
© 2009 Fairchild Semiconductor Corporation  
FMS6143A • Rev. 1.0.1  
www.fairchildsemi.com  
3
DC Electrical Characteristics  
Unless otherwise noted; TA=25°C, VCC=3.3V, RS=37.5; all inputs are AC coupled with 0.1µF; and all outputs are AC  
coupled with 220µF into 150load.  
Symbol  
Parameter  
Conditions  
Min.  
Typ.  
3.30  
15  
Max. Units  
VS  
Supply Voltage Range  
VS Range  
3.14  
5.25  
22  
V
VS=+3.3V, No Load  
mA  
mA  
Vpp  
dB  
ICC  
Quiescent Supply Current(1)  
VS=+5.0V, No Load  
19  
24  
VIN  
PSRR  
Note:  
Video Input Voltage Range  
Referenced to GND if DC Coupled  
DC (All Channels)  
1.4  
Power Supply Rejection Ratio  
-65  
1. 100% tested at TA=25°C.  
AC Electrical Characteristics  
Unless otherwise noted; TA=25°C, VCC=3.3V, RS=37.5; all inputs are AC coupled with 0.1µF; and all outputs AC  
coupled with 220µF into 150load.  
Symbol  
Parameter  
Conditions  
Active Video Input Range = 1VPP  
RSOURCE=75, RL=150Ω  
RSOURCE=75, RL=150Ω  
RSOURCE=75, RL=150Ω  
Min.  
Typ.  
6.0  
Max. Units  
AV  
Channel Gain  
5.8  
6.2  
dB  
BW0.1dB ±0.1dB Bandwidth(2)  
BW-1.0dB -1.0 dB Bandwidth(2)  
BW3.0dB -3.0 dB Bandwidth(2)  
5.0  
MHz  
MHz  
MHz  
6.5  
7.5  
7.0  
8.0  
Normalized Stopband  
Att27M  
RSOURCE=75, f=27MHz  
45  
60  
dB  
Attenuation(2)  
DG  
DP  
Differential Gain - NTSC/PAL  
Active Video Input Range = 1VPP  
0.6  
0.6  
0.2  
%
°
Differential Phase - NTSC/PAL Active Video Input Range = 1VPP  
THD  
Total Harmonic Distortion  
f=1.00MHz; VOUT=1.4Vpp  
%
Crosstalk (Channel to  
Channel)  
Xtalk  
SNR  
tpd  
f=1.00MHz; VOUT=1.4Vpp  
-65  
74  
90  
dB  
dB  
ns  
NTC-7 Weighting: 100kHz to  
4.43MHz  
Peak Signal to RMS Noise  
Delay from Input to Output:  
100KHz to 4.43MHz  
Propagation Delay  
CLG  
CLD  
Chroma-Luma Gain(2)  
Chroma-Luma Delay  
400KHz to 3.58MHz and 4.43MHz  
400KHz to 3.58MHz and 4.43MHz  
95  
100  
5.0  
105  
%
ns  
Note:  
2. 100% tested at TA=25°C.  
© 2009 Fairchild Semiconductor Corporation  
FMS6143A • Rev. 1.0.1  
www.fairchildsemi.com  
4
Typical Performance Characteristics  
Unless otherwise noted, TA = 25°C, VCC = 3.3V, RS = 37.5, and AC-coupled output into 150load.  
Figure 3.  
Frequency Response  
Figure 4.  
Frequency Response Flatness  
© 2009 Fairchild Semiconductor Corporation  
FMS6143A • Rev. 1.0.1  
www.fairchildsemi.com  
5
Typical Performance Characteristics  
Unless otherwise noted, TA = 25°C, VCC = 3.3V, RS = 37.5, and AC-coupled output into 150load.  
Figure 5.  
Delay vs. Frequency  
Figure 6.  
Noise vs. Frequency  
© 2009 Fairchild Semiconductor Corporation  
FMS6143A • Rev. 1.0.1  
www.fairchildsemi.com  
6
Typical Performance Characteristics  
Unless otherwise noted, TA = 25°C, VCC = 3.3V, RS = 37.5, and AC-coupled output into 150load.  
Figure 7.  
Differential Gain  
Figure 8.  
Differential Phase  
Figure 9.  
Chroma / Luma Gain & Delay  
© 2009 Fairchild Semiconductor Corporation  
FMS6143A • Rev. 1.0.1  
www.fairchildsemi.com  
7
Applications Information  
+5V  
DVD Player or STB  
0.1  
uF  
1.0  
uF  
75  
220uF  
220uF  
220uF  
75 Video Cables  
Y
1
2
8
7
6
5
Y
OUT  
OUT  
OUT  
IN1  
IN2  
OUT1  
OUT2  
75  
75  
Pb/C  
Pr/CV  
Pb/C  
75  
FAIRCHILD  
FMS6143  
8L SOIC  
Video  
SoC  
75  
3
4
Pr/CV  
IN3  
OUT3  
75  
VCC  
GND  
DAC Load Resistors  
per SoC specs.  
AC-Coupling Caps  
are Optional.  
Figure 10. Typical Application  
© 2009 Fairchild Semiconductor Corporation  
FMS6143A • Rev. 1.0.1  
www.fairchildsemi.com  
8
Application Information  
Application Circuits  
The FMS6143A VoltagePlus™ video filter provides 6dB  
gain from input to output. In addition, the input is slightly  
offset to optimize the output driver performance. The  
offset is held to the minimum required value to decrease  
the standing DC current into the load. Typical voltage  
levels are shown in Figure 11.  
Video Cables  
75  
LOAD2  
(optional)  
75ꢀ  
75ꢀ  
0.65V  
Y
LOAD1  
Driver  
IN  
Y
OUT  
75ꢀ  
Video Cables  
1.0 -> 1.02V  
0.65 -> 0.67V  
0.3 -> 0.32V  
Figure 12. Input Clamp Circuit  
I/O Configurations  
For a DC-coupled DAC drive with DC-coupled outputs,  
use this configuration:  
0.0 -> 0.02V  
V
IN  
2.28V  
1.58V  
Driven by:  
0V - 1.4V  
DC-Coupled DAC Outputs  
AC-Coupled and Clamped  
Y, CV, R, G, B  
DVD or  
STB  
SoC  
LCVF  
Clamp  
Inactive  
75W  
0.88V  
0.28V  
V
OUT  
DAC  
Output  
There is a 280mV offset from the DC input level to the  
DC output level. V  
= 2 * V + 280mV.  
IN  
OUT  
Figure 13. DC-Coupled Inputs and Outputs  
0.85V  
0.5V  
Alternatively, if the DAC’s average DC output level causes  
the signal to exceed the range of 0V to 1.4V, it can be  
AC coupled as:  
0.15V  
V
IN  
0V - 1.4V  
0.1μ  
1.98V  
1.28V  
0.58V  
DVD or  
STB  
SoC  
DAC  
Output  
LCVF  
Clamp  
Active  
75ꢀ  
Driven by:  
AC-Coupled and Biased  
U, V, Pb, Pr, C  
V
OUT  
Figure 11. Typical Voltage Levels  
The FMS6143A provides an internal diode clamp to  
support AC-coupled input signals. If the input signal  
does not go below ground, the input clamp does not  
operate. This allows DAC outputs to directly drive the  
FMS6143A without an AC coupling capacitor. When the  
input is AC coupled, the diode clamp sets the sync tip  
(or lowest voltage) just below ground. The worst-case  
sync tip compression due to the clamp cannot exceed  
7mV. The input level set by the clamp, combined with  
the internal DC offset, keeps the output within its  
acceptable range.  
Figure 14. AC-Coupled Inputs, DC-Coupled Outputs  
When the FMS6143A is driven by an unknown external  
source or a SCART switch with its own clamping circuitry,  
the inputs should be AC coupled as shown in Figure 15.  
0V - 1.4V  
0.1μ  
LCVF  
75ꢀ  
External video  
Clamp  
source must  
Active  
be AC coupled  
75ꢀ  
For symmetric signals like Chroma, U, V, Pb, and Pr;  
the average DC bias is fairly constant and the inputs can  
be AC coupled with the addition of a pull-up resistor to  
set the DC input voltage. DAC outputs can also drive  
these same signals without the AC-coupling capacitor. A  
conceptual illustration of the input clamp circuit is shown  
in Figure 12.  
Figure 15. SCART with DC-Coupled Outputs  
© 2009 Fairchild Semiconductor Corporation  
FMS6143A • Rev. 1.0.1  
www.fairchildsemi.com  
9
The same method can be used for biased signals, with  
the addition of a pull-up resistor to make sure the clamp  
never operates. The internal pull-down resistance is  
800k±20%, so the external resistance should be  
7.5Mto set the DC level to 500mV:  
External video  
source must  
be AC coupled  
0V - 1.4V  
0.1μ  
220μ  
LCVF  
Clamp  
Active  
75ꢀ  
75ꢀ  
External video  
source must  
be AC coupled  
7.5M  
0.1μ  
LCVF  
Bias  
75ꢀ  
Input  
Figure 19. Biased SCART with AC-Coupled Outputs  
75ꢀ  
500mV +/-350mV  
NOTE: The video tilt or line time distortion is dominated  
by the AC-coupling capacitor. The value may need to be  
increased beyond 220μF to obtain satisfactory operation  
in some applications.  
Figure 16. Biased SCART with DC-Coupled Outputs  
Power Dissipation  
The FMS6143A output drive configuration must be  
considered when calculating overall power dissipation.  
Care must be taken not to exceed the maximum die  
junction temperature. The following example can be  
used to calculate the power dissipation and internal  
temperature rise:  
The same circuits can be used with AC-coupled outputs  
if desired.  
0V - 1.4V  
0.1μ  
220μ  
DVD or  
STB  
SoC  
LCVF  
Clamp  
Active  
75ꢀ  
TJ = TA + PD JA  
(1)  
(2)  
(3)  
(4)  
(5)  
where: PD = PCH1 + PCH2 + PCH3 and  
PCHX = VCC • ICH - (VO2/RL)  
where: VO = 2VIN + 0.280V  
ICH = (ICC/3) + (VO/RL)  
VIN = RMS value of input signal  
ICC = 15mA  
DAC  
Output  
Figure 17. DC-Coupled Inputs, AC-Coupled Outputs  
VCC = 3.3V  
0V - 1.4V  
RL = channel load resistance.  
0.1μ  
220μ  
DVD or  
STB  
SoC  
LCVF  
Clamp  
Active  
75ꢀ  
Board layout can also affect thermal characteristics.  
Refer to the Layout Considerations section for details.  
DAC  
Output  
The FMS6143A is specified to operate with output  
currents typically less than 50mA, more than sufficient  
for a dual (75) video load. Internal amplifiers are  
current limited to a maximum of 100mA and should  
withstand brief-duration short-circuit conditions. This  
capability is not guaranteed.  
Figure 18. AC-Coupled Inputs and Outputs  
© 2009 Fairchild Semiconductor Corporation  
FMS6143A • Rev. 1.0.1  
www.fairchildsemi.com  
10  
Layout Considerations  
General layout and supply bypassing play a major role  
The selection of the coupling capacitor is a function of  
the subsequent circuit input impedance and the leakage  
current of the input being driven. To obtain the highest  
quality output video signal, the series termination  
resistor must be placed as close to the device output pin  
as possible. This greatly reduces the parasitic  
capacitance and inductance effect on the output driver.  
The distance from the device pin to the series termination  
resistor should be no greater than 2.54mm (0.1in).  
in  
high-frequency  
performance  
and  
thermal  
characteristics. Fairchild offers a demonstration board to  
guide layout and aide device evaluation. The demo  
board is a four-layer board with full power and ground  
planes. Following this layout configuration provides  
optimum performance and thermal characteristics for  
the device. For the best results, follow the steps and  
recommended routing rules listed below.  
Recommended Routing/Layout Rules  
.
.
Do not run analog and digital signals in parallel.  
Use separate analog and digital power planes to  
supply power.  
.
Traces should run on top of the ground plane at all  
times.  
.
.
.
No trace should run over ground/power splits.  
Avoid routing at 90-degree angles.  
Figure 20. Termination Resistor Placement  
Minimize clock and video data trace length  
differences.  
.
.
.
.
.
Include 10μF and 0.1μF ceramic power supply  
bypass capacitors.  
Thermal Considerations  
Since the interior of most systems; such as set-top  
boxes, TVs, and DVD players; are at TA=+70ºC;  
consideration must be given to providing an adequate  
heat sink for the device package for maximum heat  
dissipation. When designing a system board, determine  
how much power each device dissipates. Ensure that  
devices of high power are not placed in the same  
location, such as directly above (top plane) or below  
(bottom plane) each other on the PCB.  
Place the 0.1μF capacitor within 2.54mm (0.1in)  
of the device power pin.  
Place the 10μF capacitor within 19.05mm (0.75in)  
of the device power pin.  
For multi-layer boards, use a large ground plane to  
help dissipate heat.  
For two-layer boards, use a ground plane that  
extends beyond the device body at least 12.7mm  
(0.5in) on all sides. Include a metal paddle under  
the device on the top layer.  
.
Minimize all trace lengths to reduce series  
inductance.  
PCB Thermal Layout Considerations  
.
Understand the system power requirements and  
environmental conditions.  
Output Considerations  
.
.
Maximize thermal performance of the PCB.  
The FMS6143A outputs are DC offset from the input by  
150mV; therefore, VOUT = 2 x VIN DC + 150mV. This  
offset is required to obtain optimal performance from the  
output driver and is held at the minimum value to  
decrease the standing DC current into the load. Since  
the FMS6143A has a 2 x (6dB) gain, the output is  
typically connected via a 75-series back-matching  
resistor followed by the 75video cable. Due to the  
inherent divide-by-two of this configuration, the blanking  
level at the load of the video signal is always less than  
1V. When AC-coupling the output, ensure that the  
coupling capacitor of choice passes the lowest  
frequency content in the video signal and that line time  
distortion (video tilt) is kept as low as possible.  
Consider using 70μm of copper for high-power  
designs.  
.
.
.
.
Make the PCB as thin as possible by reducing FR4  
thickness.  
Use vias in the power pad to tie adjacent layers  
together.  
Remember that baseline temperature is a function  
of board area, not copper thickness.  
Modeling techniques provide a first-order  
approximation.  
© 2009 Fairchild Semiconductor Corporation  
FMS6143A • Rev. 1.0.1  
www.fairchildsemi.com  
11  
Physical Dimensions  
5.00  
4.80  
A
0.65  
3.81  
8
5
B
1.75  
6.20  
5.80  
4.00  
3.80  
5.60  
1
4
PIN ONE  
INDICATOR  
1.27  
1.27  
(0.33)  
0.25  
C B A  
LAND PATTERN RECOMMENDATION  
SEE DETAIL A  
0.25  
0.10  
0.25  
0.19  
C
1.75 MAX  
0.51  
0.33  
0.10 C  
x 45°  
OPTION A - BEVEL EDGE  
0.50  
0.25  
R0.10  
R0.10  
GAGE PLANE  
OPTION B - NO BEVEL EDGE  
0.36  
NOTES: UNLESS OTHERWISE SPECIFIED  
8°  
0°  
0.90  
0.40  
A) THIS PACKAGE CONFORMS TO JEDEC  
MS-012, VARIATION AA, ISSUE C,  
B) ALL DIMENSIONS ARE IN MILLIMETERS.  
C) DIMENSIONS DO NOT INCLUDE MOLD  
FLASH OR BURRS.  
SEATING PLANE  
(1.04)  
D) LANDPATTERN STANDARD: SOIC127P600X175-8M.  
E) DRAWING FILENAME: M08AREV13  
DETAIL A  
SCALE: 2:1  
Figure 21. 8-Lead, Small Outline Integrated Circuit (SOIC)  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the  
warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/.  
© 2009 Fairchild Semiconductor Corporation  
FMS6143A • Rev. 1.0.0  
www.fairchildsemi.com  
12  
© 2009 Fairchild Semiconductor Corporation  
FMS6143A • Rev. 1.0.0  
www.fairchildsemi.com  
13  
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
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