FDZ1905PZ [ONSEMI]
共漏极 P 沟道 1.5V PowerTrench® WL-CSP MOSFET -20V,-3A,123mΩ;型号: | FDZ1905PZ |
厂家: | ONSEMI |
描述: | 共漏极 P 沟道 1.5V PowerTrench® WL-CSP MOSFET -20V,-3A,123mΩ |
文件: | 总8页 (文件大小:397K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MOSFET – P-Channel,
POWERTRENCH), Common
Drain: 1.5 V, WLCSP
-20 V, -3 A, 126 mW
FDZ1905PZ
www.onsemi.com
General Description
This device is designed specifically as a single package solution for
the battery charge switch in cellular handset and other ultra−portable
applications. It features two common drain P−channel MOSFETs,
which enables bidirectional current flow, on ON Semiconductor’s
advanced 1.5 V POWERTRENCH process with state of the art “low
pitch” WLCSP packaging process, the FDZ1905PZ minimizes both
S1
G1
PCB space and r
. This advanced WLCSP MOSFET embodies
S1S2(on)
a breakthrough in packaging technology which enables the device to
combine excellent thermal transfer characteristics, ultra−low profile
G2
packaging, low gate charge, and low r
.
S1S2(on)
Features
S2
• Max r
• Max r
• Max r
• Max r
= 126 mW at V = –4.5 V, I
= –1 A
= –1 A
= –1 A
= –1 A
S1S2(on)
S1S2(on)
S1S2(on)
S1S2(on)
GS
S1S2
S1S2
S1S2
S1S2
P−Channel MOSFET
= 141 mW at V = –2.5 V, I
GS
= 198 mW at V = –1.8 V, I
PIN 1
GS
S1
= 303 mW at V = –1.5 V, I
GS
G1
S1
S2
2
• Occupies only 1.5 mm of PCB area, less than 50% of the area of
2 x 2 BGA
S2
G2
• Ultra−thin package: less than 0.65 mm height when mounted to PCB
• High power and current handling capability
• HBM ESD protection level > 4 kV (Note 3)
• This Device is Pb−Free and is RoHS Compliant
TOP
BOTTOM
WLCSP6 1.5x1x0.6
CASE 567PW
MARKING DIAGRAM
&Y
5&X
&.
5
= Specific Device Code
= Year Date Code
= Weekly Date Code
= Pin Mark
&Y
&X
&.
ORDERING INFORMATION
See detailed ordering and shipping information on page 6 of
this data sheet.
© Semiconductor Components Industries, LLC, 2008
1
Publication Order Number:
January, 2020 − Rev. 2
FDZ1905PZ/D
FDZ1905PZ
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise specified)
A
Symbol
Parameter
Rating
Unit
V
V
S1S2
Source1 to Source2 Voltage
Gate to Source Voltage
–20
V
GS
8
–3
V
I
Source1 to Source2 Current
− Continuous, T = 25°C (Note 1a)
A
S1S2
A
− Pulsed
–15
P
D
Power Dissipation (Steady State)
Power Dissipation
T = 25°C (Note 1a)
1.5
W
A
T = 25°C (Note 1b)
A
0.9
T , T
Operating and Storage Junction Temperature Range
–55 to +150
°C
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Symbol
Parameter
Rating
83
Unit
Thermal Resistance, Junction to Ambient (Note 1a)
Thermal Resistance, Junction to Ambient (Note 1b)
°C/W
R
q
JA
R
140
q
JA
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
OFF CHARACTERISTICS
I
Zero Gate Voltage Source1 to Source2
Current
V
V
= –16 V, V = 0 V
−
−
−
−
–1
10
mA
mA
S1S2
S1S2
GS
I
Gate Body Leakage Current
=
8 V, V = 0 V
S1S2
GSS
GS
ON CHARACTERISTICS (Note 2)
V
Gate to Source Threshold Voltage
V
V
V
V
V
V
V
= V , I = −250 mA
S1S2 S1S2
–0.4
−
–0.7
99
–1.0
126
141
198
303
195
−
V
GS(th)
GS
r
Static Source1 to Source2 On Resistance
= –4.5 V, I
= –2.5 V, I
= –1.8 V, I
= –1.5 V, I
= –4.5 V, I
= –1 A
= –1 A
= –1 A
= –1 A
mW
S1S2(on)
GS
S1S2
S1S2
S1S2
S1S2
S1S2
S1S2
−
112
132
164
135
8
GS
−
GS
−
GS
= –1 A, T = 125°C
−
GS
J
g
FS
Forward Transconductance
= –5V, I
= –1A
−
S
S1S2
SWITCHING CHARACTERISTICS (Note 2)
t
Turn−On Delay Time
Rise Time
V
V
= –10 V, I = –1 A
S1S2
−
−
−
−
12
36
22
58
ns
ns
ns
ns
d(on)
S1S2
GS
= –4.5 V, R
= 6 W
GEN
t
r
t
Turn−Off Delay Time
Fall Time
143
182
229
291
d(off)
t
f
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
www.onsemi.com
2
FDZ1905PZ
NOTES:
1. R
2
is determined with the device mounted on a 1in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR−4 material. R
is guaranteed by
q
q
JC
JA
design while R
is determined by the user’s board design.
q
CA
a. 83°C/W when mounted on a
b. 0°C/W when mounted on a
minimum pad of 2 oz copper
2
1 in pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only protection against ESD. No gate overvoltage rating is implied.
www.onsemi.com
3
FDZ1905PZ
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
15
12
9
15
V
V
V
= −4.5 V
= −3.0 V
V
V
V
= −4.5 V
= −3.0 V
= −2.5 V
G2S2
GS
GS
G2S2
G2S2
12
9
GS
= −2.5 V
V
V
= −1.8 V
= −1.5 V
V
V
= −1.8 V
= −1.5 V
G2S2
GS
6
6
G2S2
GS
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
3
3
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
G1S1
= −4.5 V
0
0
0
1
2
3
0
1
2
3
4
5
−V
S1S2
, SOURCE1 TO SOURCE2 VOLTAGE (V)
−V
S1S2
, SOURCE1 TO SOURCE2 VOLTAGE (V)
Figure 1. On Region Characteristics
Figure 2. On Region Characteristics
3.0
2.5
2.0
1.5
1.0
0.5
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
GS
= −1.5 V
2.5
2.0
1.5
1.0
0.5
V
G1S1
= −4.5 V
V
GS
= −2.5 V
V
G2S2
= −1.5 V
V
GS
= −1.8 V
V
G2S2
= −1.8 V
V
= −2.5 V
= −4.5 V
G2S2
V
= −3.0 V
= −4.5 V
GS
V
GS
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
G2S2
V
G2S2
= −3.0 V
0
3
6
9
12
15
0
3
6
9
12
15
−I
S1S2
, SOURCE1 TO SOURCE2 CURRENT (A)
−I
S1S2
, SOURCE1 TO SOURCE2 CURRENT (A)
Figure 3. Normalized On−Resistance
Figure 4. Normalized On−Resistance
vs Drain Current and Gate Voltage
vs Drain Current and Gate Voltage
1.6
1.4
1.2
1.0
0.8
0.6
500
I
V
= −1 A
= −4.5 V
S1S2
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
GS
400
300
200
100
0
I
= −1 A
S1S2
T = 125°C
J
T = 25°C
J
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
−50 −25
0
25 50
75 100 125 150
T , JUNCTION TEMPERATURE (°C)
J
−V , GATE TO SOURCE VOLTAGE (V)
GS
Figure 5. Normalized On−Resistance
Figure 6. On−Resistance vs Gate to
vs Junction Temperature
Source Voltage
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4
FDZ1905PZ
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
10−3
15
12
9
V
GS
= 0 V
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
10−4
10−5
V
S1S2
= −5 V
T = 150°C
J
−6
10
6
10−7
10−8
10−9
T = 25°C
J
T = 150°C
T = 25°C
J
J
3
T = −55°C
J
0
0.0
0.5
1.0
1.5
2.0
2.5
0
3
6
9
12
15
−V
S1S2
, SOURCE1 TO SOURCE2 VOLTAGE (V)
−V
S1S2
, SOURCE1 TO SOURCE2 VOLTAGE (V)
Figure 7. Transfer Characteristics
Figure 8. Gate Leakage vs Gate to
Source Voltage
102
101
100
10−1
20
10
V
= −4.5 V
GS
SINGLE PULSE
100 ms
1 ms
°
R
= 140 C/W
q
JA
T = 25°C
A
1
0.1
10 ms
SINGLE PULSE
100 ms
1 s
10 s
DC
T = MAX RATED
J
R
= 140°C/W
q
JA
T = 25°C
A
THIS AREA IS LIMITED
BY r
S1S2(on)
0.01
10−4 10−3 10−2 10−1 100 101
100 1000
, SOURCE1 TO SOURCE2 CURRENT (A)
S1S2
0.1
1
10
60
−I
, SOURCE1 TO SOURCE2 CURRENT (A)
−I
S1S2
Figure 9. Forward Bias Safe
Operating Area
Figure 10. Single Pulse Maximum
Power Dissipation
2
1
DUTY CYCLE−DESCENDIN G ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
0.1
t1
t2
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t / t
R
q
JA
= 140°C/W
1
2
PEAK T = P
x Z
x R
+ T
JA A
q
q
J
DM
JA
0.01
10−3
10−2
10−1
100
101
102
103
t, RECTANGULAR PULSE DURATION (s)
Figure 11. Transient Thermal Response Curve
www.onsemi.com
5
FDZ1905PZ
ORDERING INFORMATION
†
Device
Device Marking
Package
Reel Size
Tape Width
Shipping
FDZ1905PZ
5
WLCSP6 1.5x1x0.6
7”
8 mm
5000 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other
countries.
www.onsemi.com
6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WLCSP6 1.5x1x0.6
CASE 567PW
ISSUE A
DATE 04 AUG 2021
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13306G
WLCSP6 1.5x1x0.6
PAGE 1 OF 1
ON Semiconductor and
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