FDY4000CZ [ONSEMI]
互补,N 和 P 沟道,PowerTrench® MOSFET,20V;![FDY4000CZ](http://pdffile.icpdf.com/pdf2/p00370/img/icpdf/FDY4000CZ_2256996_icpdf.jpg)
型号: | FDY4000CZ |
厂家: | ![]() |
描述: | 互补,N 和 P 沟道,PowerTrench® MOSFET,20V PC 开关 光电二极管 晶体管 |
文件: | 总11页 (文件大小:348K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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November 2009
FDY4000CZ
Complementary N & P-Channel PowerTrench®
MOSFETꢀ
Features
General Description
Q1: N-Channel
This Complementary N & P-Channel MOSFET has been
designed using Fairchild Semiconductor’s advanced Power
Trench® process to optimize the rDS(ON) @ VGS= 2.5V and
specify the rDS(ON) @ VGS = 1.8V.
Max rDS(on) 0.7ꢁ at VGS = 4.5V, ID = 600mA
Max rDS(on) 0.85ꢁ at VGS = 2.5V, ID = 500mA
Max rDS(on) 1.25ꢁ at VGS = 1.8V, ID =150 mA
Applications
Q2: P-Channel
Level shifting
Max rDS(on) 1.2ꢁ at VGS = -4.5V, ID = -350mA
Max rDS(on) 1.6ꢁ at VGS = -2.5V, ID = -300mA
Max rDS(on) 2.7ꢁ at VGS = -1.8V, ID = -150mA
ESD protection diode (note 3)
Power Supply Converter Circuits
Load/Power Switching Cell Phones, Pagers
RoHS Compliant
6
5
4
3
S2
4
5
6
D2
G1
S1
2
1
G2
D1
1
2
3
MOSFET Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDS
VGS
Parameter
Q1
20
12
600
1000
Q2
-20
8
-350
-1000
Units
V
V
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Pulsed
(Note 1a)
ID
mA
625
446
Power Dissipation (Steady State)
(Note 1a)
(Note 1b)
PD
mW
TJ, TSTG
Operating and Storage Jaunting Temperature Range
-55 to 150
°C
Thermal Characteristics
RꢂJA
RꢂJA
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
(Note 1a)
(Note 1b)
200
280
°C/W
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
Tape Width
Quantity
E
FDY4000CZ
SC89-6
7”
8mm
3000units
©2009 Fairchild Semiconductor Corporation
FDY4000CZ Rev. B2
1
www.fairchildsemi.com
Electrical Characteristics TJ = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type Min Typ Max Units
Off Characteristics
Drain to Source Breakdown Volt- ID = 250ꢃA, VGS = 0V
Q1
Q2
20
-20
BVDSS
ꢀ
ꢀ
V
age D = -250ꢃA, VGS = 0V
I
ꢄBVDSS
ꢀꢀꢀꢄTJ
Breakdown Voltage Temperature ID = 250ꢃA, referenced to 25°C
Q1
Q2
Q1
Q2
15
-15
mV/°C
ꢃA
Coefficient
I
D = -250ꢃA, referenced to 25°C
V
V
DS = 16V, VDS =0V
DS = -16V, VDS =0V
1
-3
IDSS
Zero Gate Voltage Drain Current
VGS
VGS
VGS
=
=
=
12V, VDS = 0V
4.5V, VDS = 0V
8V, VDS = 0V
Q1
Q1
Q2
10
1
10
IGSS
Gate-Body Leakage
ꢃA
On Characteristics (note 2)
V
V
GS = VDS, ID = 250ꢃA
GS = VDS, ID = -250ꢃA
Q1
0.6
1.0
1.5
VGS(th)
Gate to Source Threshold Voltage
V
Q2 -0.6 -1.0 -1.5
ꢄVGS(th)
ꢀꢀꢀꢄTJ
Gate to Source Threshold Voltage ID = 250ꢃA, referenced to 25°C
Q1
Q2
-3
3
ꢀꢀ
mV/°C
Temperature Coefficient
ID = -250ꢃA, referenced to 25°C
V
V
V
V
V
V
V
V
GS = 4.5V, ID = 600mA
0.30 0.70
0.40 0.85
0.80 1.25
0.35 1.00
GS = 2.5V, ID = 500mA
Q1
Q2
ꢀ
GS = 1.8V, ID = 150mA,
GS = 4.5V, ID = 600mA,TJ = 125°C
rDS(on)
Drain to Source On Resistance
ꢁ
GS = -4.5V, ID = --350mA
GS = -2.5V, ID = -300mA
GS = -1.8V, ID = -150mA
0.5
0.8
1.3
0.7
1.2
1.6
2.7
1.6
GS = -4.5V, ID = -350mA, TJ =125°C
V
V
DS = 5V, ID = 600mA
DS = -5V, ID = -350mA
Q1
Q2
1.8
1
gFS
Forward Transconductance
S
Dynamic Characteristics
Q1
Q2
Q1
Q2
Q1
Q2
60
Q1
Ciss
Coss
Crss
Input Capacitance
pF
pF
pF
100
VDS = 10V, VGS = 0V, f = 1MHz
20
30
10
15
Output Capacitance
Q2
VDS = -10V, VGS = 0V, f = 1MHz
Reverse Transfer Capacitance
Switching Characteristics
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
6
6
8
13
8
8
12
12
16
23
16
16
4.8
2
Q1
td(on)
tr
td(off)
tf
Turn-On Delay Time
ns
ns
V
V
DD= 10V, ID = 1A,
GS= 4.5V, Rg = 6ꢁ
Rise Time
Q2
Turn-Off Delay Time
Fall Time
ns
VDD= -10V, ID = -0.5A,
V
GS= -4.5V, Rg = 6ꢁ
2.4
1
ns
Q1
Q2
Q1
Q2
Q1
Q2
0.8
1.0
0.16
0.2
0.26
0.3
1.1
1.4
Qg
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller”Charge
nC
nC
nC
Q1
V
DS= 10V, ID = 600mA, VGS= 4.5V
Qgs
Qgd
Q2
V
DS= -10V, ID = -350mA, VGS= -4.5V
2
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©2009 Fairchild Semiconductor Corporation
FDY4000CZ Rev. B2
Electrical Characteristics TJ = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type Min Typ Max Units
Drain-Source Diode Characteristics
Source to Drain Diode Forward
VGS = 0V, IS = 150mA (Note 2)
Q1
Q2
0.7
1.2
VSD
V
Voltage
V
GS = 0V, IS = -150mA (Note 2)
-0.8 -1.2
Q1
Q2
Q1
Q2
8
Q1
trr
Reverse Recovery Time
ns
nC
11
IF = 600mA, di/dt = 100A/ꢃs
Q2
1
2
Qrr
Reverse Recovery Charge
IF = -350mA, di/dt = 100A/ꢃs
Notes:
1: R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
ꢂJA
the drain pins. R is guaranteed by design while R
is determined by the user's board design.
ꢂJC
ꢂJA
b) 280°C/W when mounted
on a minimum pad of 2 oz
copper
a) 200°C/W when mounted
2
on a 1 in pad of 2 oz copper
Scale 1:1 on letter size paper
2: Pulse Test : Pulse Width < 300us, Duty Cycle < 2.0%
3: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
3
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©2009 Fairchild Semiconductor Corporation
FDY4000CZ Rev. B2
Typical Characteristics Q1 (N-Channel)
1
2.6
2.4
2.2
2
9*6ꢁ ꢁꢉꢆꢇ9
ꢊꢆꢈ9
ꢊꢆꢇ9
9*6ꢁ ꢁꢅꢆꢈ9
0.8
0.6
0.4
0.2
0
ꢅꢆꢈ9
ꢅꢆꢇ9
1.8
1.6
1.4
1.2
1
ꢅꢆꢇ9
ꢊꢆꢈ9
ꢊꢆꢇ9
ꢉꢆꢇ9
0.8
0.8
0
0.25
0.5
0.75
1
0
0.2
0.4
0.6
1
9'6ꢀꢁ'5$,1ꢂ6285&(ꢁ92/7$*(ꢁꢃ9ꢄ
Figure 1. On-Region Characteristics
,
Figure 2. Normalized on-Resistance vs. Drain
Current and Gate Voltage
0.9
1.6
ID = 300mA
,'ꢁ ꢁꢋꢈꢈP$
*6ꢁ ꢁꢉꢆꢇ9
0.8
0.7
0.6
9
1.4
1.2
1
TA = 125oC
0.5
0.4
0.8
0.6
0.3
TA = 25oC
0.2
1
2
3
4
5
-50
-25
0
25
50
75
100
125
150
VGS, GATE TO SOURCE VOLTAGE (V)
7R
Figure 3. Normalized on-Resistance vs.
Figure4. On-Resistance vs.
Temperature
Gate-to-Source Voltage
1.5
1
25oC
VDS = 5V
TA = -55oC
VGS = 0V
1.2
0.9
0.6
0.3
0
125oC
0.1
0.01
TA = 125oC
25oC
-55oC
0.001
0.0001
0.5
1
1.5
2
2.5
3
0
0.2
0.4
0.6
0.8
1
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward
Voltage vs. Source Current and Temperature
4
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©2009 Fairchild Semiconductor Corporation
FDY4000CZ Rev. B2
Typical Characteristics Q1 (N-Channel)
100
90
80
70
60
50
40
30
20
10
0
5
Iꢁ ꢁꢌ0+]
9*6 ꢁꢈꢁ9
,'ꢁ ꢁꢋꢈꢈP$
ꢌꢇ9
4
&
9'6ꢁ ꢁꢇ9
LVV
3
ꢌꢈ9
2
&
RVV
1
0
&
UVV
0
0.2
0.4
0.6
0.8
1
0
4
8
12
16
20
4Jꢀꢁ*$7(ꢁ&+$5*(ꢁꢃQ&ꢄ
9'6ꢀꢁ'5$,1ꢁ72ꢁ6285&(ꢁ92/7$*(ꢁꢃ9ꢄ
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs. Drain to source
voltage
10
30
SINGLE PULSE
RꢀJA = 280°C/W
TA = 25°C
25
20
15
10
5
RDS(ON) LIMIT
1
0.1
1ms
10ms
VGS = 4.5V
100ms
SINGLE PULSE
10s
1s
DC
RꢀJA = 280oC/W
TA = 25oC
0.01
0
0.1
1
10
100
0.0001 0.001
0.01
0.1
1
10
100
1000
VDS, DRAIN-SOURCE VOLTAGE (V)
t1, TIME (sec)
Figure 9. Maximum Safe Operating Area
Figure 10. Single Pulse Maximum Power
Dissipation
1
D=0.5
0.2
RꢀJA(t) = r(t) * R
RꢀJA =280 °C/W
ꢀJA
0.1
0.05
0.02
0.01
P(pk)
0.1
t1
t2
TJ - TA = P * RꢀJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.01
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
5
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©2009 Fairchild Semiconductor Corporation
FDY4000CZ Rev. B2
Typical Characteristics Q2 (P-Channel)
1
2.6
2.2
1.8
1.4
1
VGS= -4.5V
-2.5V
VGS=-1.8V
-2.0V
0.8
-4.0V
-3.0V
0.6
0.4
0.2
0
-2.0V
-2.5V
-1.8V
-3.0V
0.4
-3.5V
-4.0V
-4.5V
0.6
0
0.2
0.6
0.8
1
0
0.5
1
1.5
2
-ID, DRAIN CURRENT (A)
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 12. On-Region Characteristics
Figure 13. Normalized on-Resistance vs. Drain
Current and Gate Voltage
1.6
2
ID = -0.35A
VGS = -4.5V
ID = -0.175A
1.75
1.5
1.4
1.2
1
1.25
1
TA = 125oC
0.75
TA = 25oC
0.5
0.8
0.25
0.6
0
2
4
6
8
10
-50
-25
0
J
25
50
75
100
125
150
T , JUNCTION TEMPERATURE (oC)
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 14. Normalized on-Resistance vs.
Figure15. On-Resistance vs.
Temperature
Gate-to-Source Voltage
1
0.1
1
VGS = 0V
VDS = -5V
0.8
0.6
0.01
TA = 125oC
0.4
TA = 125oC
-55oC
25oC
0.001
0.0001
0.2
-55oC
25oC
0
0.5
1
1.5
2
2.5
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-VGS, GATE TO SOURCE VOLTAGE (V)
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 16. Transfer Characteristics
Figure 17. Source to Drain Diode Forward
Voltage vs. Source Current and Temperature
6
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©2009 Fairchild Semiconductor Corporation
FDY4000CZ Rev. B2
Typical Characteristics Q2 (P-Channel)
10
150
125
100
75
f = 1 MHz
GS = 0 V
ID = -0.35A
V
8
VDS = -5V
-15V
C
iss
6
-10V
4
Coss
50
2
0
25
C
rss
0
0
0.5
1
1.5
2
2.5
0
2
4
6
8
10
12
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 18. Gate Charge Characteristics
Figure 19. Capacitance vs. Drain to source
voltage
10
1
10
8
6
4
2
100ꢃs
RDS(ON) LIMIT
1ms
10ms
100ms
1s
10s
DC
0.1
VGS = -4.5V
SINGLE PULSE
R
ꢂJA = 280oC/W
T
A = 25oC
0
0.0001
0.001
0.01
0.1
1
10
100
0.01
0.01
t1, TIME (sec)
0.1
1
10
100
-VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 20. Maximum Safe Operating Area
Figure21. Single Pulse Maximum Power
Dissipation
1
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
SINGLE PULSE
0.01
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 22. Transient Thermal Response Curve
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
7
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©2009 Fairchild Semiconductor Corporation
FDY4000CZ Rev. B2
Dimensional Outline and Pad Layout
1.70
A
1.50
0.50
0.30
0.15
0.50
B
6
1
4
3
1.20 BSC
(0.20)
1.60
1.25
1.80
0.1 C B A
0.30
0.55
0.50
1.00
TOP VIEW
LAND PATTERN RECOMMENDATION
0.60
0.56
0.18
SEE DETAIL A
0.10
C
0.35 BSC
0.20 BSC
DETAIL A
SCALE 2 : 1
0.10
0.00
BOTTOM VIEW
NOTES:
A) THIS PACKAGE CONFORMS TO EIAJ
SC89 PACKAGING STANDARD.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DRAWING CONFORMS TO ASME Y14.5M-1994
D) DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS.
MAD06ArevA
8
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©2009 Fairchild Semiconductor Corporation
FDY4000CZ Rev. B2
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
intended to be an exhaustive list of all such trademarks.
®
®
AccuPower™
Auto-SPM™
FPS™
PowerTrench
PowerXS™
The Power Franchise
F-PFS™
®
®
Build it Now™
CorePLUS™
FRFET
Programmable Active Droop™
SM
®
Global Power Resource
Green FPS™
QFET
QS™
TinyBoost™
TinyBuck™
TinyCalc™
CorePOWER™
CROSSVOLT™
CTL™
Green FPS™ e-Series™
Gmax™
Quiet Series™
RapidConfigure™
®
TinyLogic
Current Transfer Logic™
GTO™
IntelliMAX™
®
TINYOPTO™
TinyPower™
EcoSPARK
™
EfficentMax™
EZSWITCH™*
ISOPLANAR™
MegaBuck™
MICROCOUPLER™
MicroFET™
Saving our world, 1mW /W /kW at a time™
TinyPWM™
SmartMax™
TinyWire™
™*
SMART START™
®
TriFault Detect™
TRUECURRENT™*
SPM
MicroPak™
STEALTH™
SuperFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SupreMOS™
SyncFET™
Sync-Lock™
®*
®
MillerDrive™
MotionMax™
Motion-SPM™
®
Fairchild
®
®
Fairchild Semiconductor
FACT Quiet Series™
UHC
®
OPTOLOGIC
Ultra FRFET™
UniFET™
VCX™
®
®
®
FACT
OPTOPLANAR
®
FAST
FastvCore™
VisualMax™
XS™
tm
FETBench™
PDP SPM™
Power-SPM™
®
FlashWriter
*
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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THEREIN, WHICH COVERS THESE PRODUCTS.
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and (c) whose failure to perform when properly used in accordance with
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effectiveness.
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Datasheet contains the design specifications for product development. Specifications
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Advance Information
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Datasheet contains preliminary data; supplementary data will be published at a later
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No Identification Needed
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Full Production
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Semiconductor. The datasheet is for reference information only.
Not In Production
Rev. I41
9
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©2009 Fairchild Semiconductor Corporation
FDY4000CZ Rev. B2
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