FDWS9520L-F085 [ONSEMI]
双 P 沟道，PowerTrench® MOSFET，-40 V，-20 A，12.5mΩ;
| 型号： | FDWS9520L-F085 |
| 厂家： | 
ONSEMI |
| 描述： | 双 P 沟道，PowerTrench® MOSFET，-40 V，-20 A，12.5mΩ |
| 文件： | 总8页 (文件大小：398K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
MOSFET – Power, Dual
P-Channel
V
R
MAX
I
MAX
(BR)DSS
DS(ON)
D
−40 V
12.5 mW @ −10 V
19.5 mW @ −4.5 V
−20 A
-40 V, -20 A, 12.5 mW
FDWS9520L-F085
Features
D1 (7,8)
D2 (5,6)
• Small Footprint (5x6 mm) for Compact Design
• Low R
to Minimize Conduction Losses
DS(on)
• Low QG and Capacitance to Minimize Driver Losses
• Wettable Flanks for Enhanced Optical Inspection
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
G1 (2)
G2 (4)
S1 (1)
S2 (3)
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Parameter
Drain−to−Source Voltage
Symbol
VDSS
Value
−40
Unit
V
1
Gate−to−Source Voltage
VGS
16
V
PQFN8 5x6, 1.27P
CASE 483BL
Continuous Drain
Current R
T
= 25_C
−60.8
C
I
D
A
q
JC
(Notes 1, 3)
T
C
T
C
T
C
T
C
= 100_C
= 25_C
= 100_C
= 25_C
−43.0
75
Steady
State
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 3 of this data sheet.
Power Dissipation
(Note 1)
P
D
W
A
R
q
JC
37.5
−12.2
Continuous Drain
Current R
1, 2, 3)
(Notes
I
D
q
JA
T
C
T
C
T
C
= 100_C
= 25_C
= 100_C
−8.6
3.0
Steady
State
Power Dissipation
(Notes 1 & 2)
P
D
W
A
R
q
JA
1.5
Pulsed Drain Current
T
C
= 25_C, t = 10 ms
−281
IDM
p
Operating Junction and Storage Temperature
−55 to
+175
TJ, Tstg
°C
Source Current (Body Diode)
I
S
−20
A
Single Pulse Drain−to−Source Avalanche
Energy (IL(pk) = −19)
EAS
90
mJ
Lead Temperature for Soldering Purposes
(1/83 from case for 10 s)
T
L
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
2
Unit
°C/W
°C/W
Junction−to−Case − Steady State
Junction−to−Ambient − Steady State (Note 2)
R
q
JC
50
R
q
JA
1. The entire application environment impacts the thermal resistance values
shown, they are not constants and are only valid for the particular conditions
noted.
2
2. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
October, 2021 − Rev. 1
FDWS9520L−F085/D
FDWS9520L−F085
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
Off Characteristics
Symbol
Test Condition
Min
Typ
Max
Unit
Drain to Source Breakdown Voltage
V(BR)DSS
V(BR)DSS/ T
IDSS
V
= 0 V, I = −250 mA
V
−40
GS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
J
mV/_C
21
Zero Gate Voltage Drain Current
T = 25°C
J
mA
mA
nA
−1
V
GS
= 0 V, V = −40 V
DS
T = 175°C
J
−1
Zero Gate Voltage Drain Current
IGSS
V
= 0 V, V
=
16 V
100
DS
GS
On Characteristics (Note 4)
Gate Threshold Voltage
VGS(TH)
V
GS
= V I = −250 mA
DS, D
−1
−1.8
−3
V
mV/_C
mW
Threshold Temperature Coefficient
VGS(TH)/TJ
RDS(on)
−5.5
Drain−to−Source On Resistance
V
= −10 V
= −4.5 V
I
I
= −20 A
= −10 A
10.4
12.5
19.5
GS
D
V
GS
14.6
D
Charges, Capacitances & Gate Resistance
Input Capacitance
V
GS
= 0 V, f = 1 MHz, V = −20 V
DS
Ciss
Coss
Crss
2370
940
40
pF
pF
pF
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
W
R
V
GS
= 0.5 V, f = 1 MHz
17
g
Total Gate Charge
QG(TOT)
nC
V
GS
= −10 V, V = −32 V; I = −20 A
33
DS
D
V
GS
= −4.5V, V = −32 V; I = −20 A
13
DS
D
Threshold Gate Charge
Qg(th)
Qgs
V
= 0 to −1 V
2
7
GS
V
DD
= −20 V I = −20 A
D
,
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
Plateau Voltage
Qgd
4
VGP
V
−4
Switching Characteristics
V
DD
= −20 V, I = −20 A, V = −10 V,
D GS
Turn−On Delay Time
Turn−On Rise Time
Turn−Off Delay Time
td(ON)
8
ns
ns
ns
ns
R
= 6 W
GEN
t
r
21
td(OFF)
120
34
Turn−Off Fall Time
t
f
Drain−Source Diode Characteristics
Source to Drain Diode Voltage
VSD
I
I
= −20 A, V = 0 V
−1.25
−1.2
V
−0.9
SD
GS
= −10 A, V = 0 V
V
−0.83
SD
GS
V
GS
= 0 V, dI /dt = 100 A/us, I = −20 A
ns
SD
S
Reverse Recovery Time
Charge Time
TRR
46
22
24
37
t
t
a
Discharge Time
b
Reverse Recovery Charge
QRR
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%
5. Switching characteristics are independent of operating junction temperatures.
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2
FDWS9520L−F085
ORDERING INFORMATION
Device
†
Device Marking
FDWS9520L
Package
Shipping
FDWS9520L−F085
PQFN8 5x6, 12.7P
(Pb−Free, Halogen Free)
3,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D
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3
FDWS9520L−F085
TYPICAL CHARACTERISTICS
1.2
1.0
0.8
0.6
0.4
70
60
CURRENT LIMITED BY
PACKAGE
50
40
30
V
GS
= −10 V
20
0.2
0
10
0
0
25
50
75
100
125
150
175
25
50
75
100
125
150
175
T , CASE TEMPERATURE (°C)
C
T , CASE TEMPERATURE (°C)
C
Figure 1. Normalized Power Dissipation vs.
Case Temperature
Figure 2. Maximum Continuous Drain Current
vs. Case Temperature
2
1
50% Duty Cycle
20%
P
DM
10%
5%
0.1
2%
t
1
t
2
1%
DUTY CYCLE, D = t /t
1 2
Peak T = P X Z X R + T
C
Single Pulse
q
q
JA
J
DM
JA
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
t, RECTANGULAR PULSE DURATION (s)
Figure 3. Normalized Maximum Transient Thermal Impedance
1000
V
GS
= −10 V
T
C
= 25°C
For temperatures above 25°C
derate peak current as follows:
175 * TC
Ǹ
I + I25
ƪ ƫ
150
100
10
Single Pulse
0.00001
0.0001
0.001
0.01
0.1
1
10
t, RECTANGULAR PULSE DURATION (s)
Figure 4. Peak Current Capability
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4
FDWS9520L−F085
TYPICAL CHARACTERISTICS
100
100
10
1
If R = 0
=(L)(I )/(1.3*Rated BV
t
− V
)
AV
AS
DSS
DD
If R ≠ 0
=(L/R)In[(I *R)/(1.3*Rated BV
t
AV
− V )+1]
DD
AS
DSS
100 ms
OPERATION IN
THIS AREA MAY
10
Starting T = 25°C
J
Starting T = 150°C
J
1 ms
BE LIMITED BY
PACKAGE
OPERATION IN
THIS AREA MAY
BE LIMITED BY
(on)
10 ms
100 ms
SINGLE PULSE
T = max rated
J
r
DS
T = 25°C
C
0.1
1
0.01
0.1
1
10
100
0.1
1
10
100
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
t , TIME IN AVALANCHE (mS)
AV
Figure 6. Unclamped Inductive Switching
Capability
Figure 5. Forward Bias Safe Operating Area
(Note: Refer to onsemi Applications Notes AN7514 and
AN7515)
100
100
10
1
Pulse Duration = 250 ms
Duty Cycle = 0.5% Max
V
GS
= 0 V
80
60
40
20
0
V
DS
= −5 V
T = 175°C
J
T = 25°C
J
0.1
T = 175°C
J
0.01
T = −55°C
J
T = −55°C
J
T = 25°C
J
0.001
1
2
3
4
5
6
0
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 7. Transfer Characteristics
Figure 8. Forward Diode Characteristics
6
150
100
V
= 3.5 V
250 ms Pulse Width
T = 25°C
GS
250 ms Pulse Width
T = 25°C
J
4.0V
4.5V
5.0V
7.0V
10V
J
7.0 V
5
4
3
2
5.0 V
4.5 V
V
GS
= 10 V
4.0 V
3.5 V
50
0
1
0
0
30
60
90
120
150
0
1
2
3
4
5
V
DS
, DRAIN−SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 9. Saturation Characteristics
Figure 10. Normalized RDS(ON) vs. Drain Current
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5
FDWS9520L−F085
TYPICAL CHARACTERISTICS
1.8
100
I
D
= −20 A
I
D
= −20 A
1.6
1.4
1.2
1.0
V
= −10 V
GS
75
50
25
0
Pulse Duration = 250 ms
Duty Cycle = 0.5% Max
T = 175°C
J
0.8
0.6
T = 25°C
J
2
3
4
5
6
7
8
9
−80
−40
0
40
80
120
160
200
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
T , JUNCTION TEMPERATURE (°C)
J
Figure 11. RDS(on) vs. Gate Voltage
Figure 12. Normalized RDS(on) vs. Junction
Temperature
1.3
1.10
1.05
1.00
V
= V
DS
= −250 mA
GS
I
D
= −1 mA
I
D
1.1
0.9
0.7
0.95
0.90
0.5
0.3
−80
−40
0
40
80
120
160
200
−80
−40
0
40
80
120
160 200
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 13. Normalized Gate Threshold Voltage
vs. Temperature
Figure 14. Normalized Drain−to−Source
Breakdown Voltage vs. Junction Temperature
10K
1K
10
8
C
V
DD
= −20 V
ISS
V
DD
= −16 V
C
OSS
6
100
10
1
V
DD
= −24 V
4
C
RSS
f = 1 MHz
= 0 V
2
0
V
GS
0
8
16
24
32
40
0.1
1
10
40
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q , GATE CHARGE (nC)
g
Figure 15. Capacitance vs. Drain−to−Source
Figure 16. Gate Charge vs. Gate−to−Source
Voltage
Voltage
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PQFN8 5X6, 1.27P
CASE 483BL
ISSUE A
DATE 23 APR 2021
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13690G
PQFN8 5X6, 1.27P
PAGE 1 OF 1
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