FDP5800 [ONSEMI]
N 沟道逻辑电平 PowerTrench® MOSFET 60V,80A,6mΩ;型号: | FDP5800 |
厂家: | ONSEMI |
描述: | N 沟道逻辑电平 PowerTrench® MOSFET 60V,80A,6mΩ |
文件: | 总10页 (文件大小:682K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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December 2013
FDP5800
®
N-Channel Logic Level PowerTrench MOSFET
60 V, 80 A, 6 mΩ
Features
Description
•
RDS(on) = 4.6 mΩ (Typ.) @ VGS = 10 V, ID = 80 A
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced PowerTrench® process that has
been tailored to minimize the on-state resistance while main-
taining superior switching performance.
•
High Performance Trench Technology for Extermly Low
RDS(on)
•
•
•
Low Gate Charge
Applications
High Power and Current Handing Capability
RoHS Compliant
•
•
•
•
Power Tools
Motor Drives and Uninterruptible Power Supplies
Synchronous Rectification
Battery Protection Circuit
D
G
G
D
S
TO-220
S
MOSFET Maximum Ratings TC = 25°C unless otherwise noted.
Symbol
VDSS
VGSS
Parameter
FDP5800
60
Unit
V
Drain-Source Voltage
Gate-Source Voltage
±20
80
V
- Continuous (TC = 25oC)
- Continuous (TC = 100oC)
- Continuous (TA = 25oC)
A
ID
D r a in C u r r e n t
Drain Current
80*
A
14
A
IDM
- Pulsed
320
652
A
EAS
Single Pulsed Avalanche Energy
Power Dissipation
(Note 1)
mJ
(TC = 25oC)
242
1.61
W
W/°C
PD
- Derate Above 25oC
TJ, TSTG
Operating and Storage Temperature Range
-55 to +175
°C
*Drain current limited by package.
Thermal Characteristics
Symbol
Parameter
Unit
FDP5800
0.62
RθJC
RθJA
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
oC/W
62.5
www.fairchildsemi.com
©2006 Fairchild Semiconductor Corporation
FDP5800 Rev. C2
1
Package Marking and Ordering Information
Part Number
Top Mark
Package
Packing Method
Reel Size
Tape Width
Quantity
FDP5800
FDP5800
TO-220
Tube
N/A
N/A
50 units
Electrical Characteristics TC= 25°C unless otherwise noted.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Body Leakage Current, Forward
ID = 250 μA, VGS = 0 V, TJ =25oC
60
--
--
--
--
--
--
1
V
μA
μA
nA
V
V
DS = 48 V
GS = 0 V
IDSS
TJ = 150°C
--
--
500
±100
IGSS
VGS = ±20 V, VDS = 0 V
On Characteristics
VGS(th)
Gate Threshold Voltage
VGS = VDS, ID = 250 μA
1.0
--
--
2.5
6.0
7.2
7.0
V
V
GS = 10 V , ID = 80 A
4.6
5.9
5.6
mΩ
mΩ
mΩ
VGS =4.5 V , ID = 80 A
VGS = 5 V , ID = 80 A
--
RDS(on)
Static Drain-Source On Resistance
--
VGS =10 V, ID = 80 A,
TJ = 175oC
--
10.4
12.6
mΩ
Dynamic Characteristics
Ciss
Input Capacitance
--
6890
750
295
1.2
112
58
9160
pF
pF
pF
Ω
nC
nC
nC
nC
nC
nC
VDS = 15 V,VGS = 0 V,
f = 1 MHz
Coss
Crss
Output Capacitance
--
--
--
--
--
--
--
--
--
1000
445
--
Reverse Transfer Capacitance
Gate Resistance
RG
VGS = 0.5 V, f = 1 MHz
VGS = 0 V to 10 V
VGS = 0 V to 5 V
Qg(TOT)
Qg(TH)
Qg(TH)
Qgs
Total Gate Charge at 10V
Total Gate Charge at 5V
Threshold Gate Charge
Gate to Source Gate Charge
Gate Charge Threshold to Plateau
Gate to Drain “Miller” Charge
145
--
VDS = 30 V,
D = 80 A,
Ig = 1 mA
VGS = 0 V to 1 V
7.0
23
--
I
--
Qgs2
Qgd
13
--
18
--
Switching Characteristics (VGS = 10V)
tON
td(on)
tr
Turn-On Time
--
--
--
--
--
--
37
18
19
55
9
85
46
ns
ns
ns
ns
ns
ns
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Turn-Off Time
VDD = 30 V, ID = 80 A,
GS = 10 V, RG = 1.5 Ω
47
V
td(off)
tf
120
28
tOFF
64
138
Drain-Source Diode Characteristics
V
GS = 0 V, ISD = 80 A
--
--
--
--
--
--
1.25
1.0
--
V
V
VSD
Drain-Source Diode Forward Voltage
VGS = 0 V, ISD = 40 A
trr
Reverse Recovery Time
58
106
ns
nC
VGS = 0 V, ISD = 60 A,
dIF/dt = 100 A/μs
Qrr
Reverse Recovery Charge
--
Notes:
o
1: L = 1 mH, I = 36 A, V = 54 V, V = 10 V, R = 25 Ω, Starting T = 25 C
AS
DD
GS
G
J
www.fairchildsemi.com
©2006 Fairchild Semiconductor Corporation
FDP5800 Rev. C2
2
Typical Performance Characteristics
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
1000
400
VDS = 6V
* Notes :
1. 250μs Pulse Test
2. TC = 25oC
100
100
150oC
10
25oC
VGS
Top :
10.0 V
5.0 V
4.5 V
4.0 V
3.5 V
1
-55oC
10
5
Bottom : 3.0 V
0.1
0.1
1
1
2
3
4
5
3
0.03
VGS,Gate-Source Voltage[V]
VDS,Drain-Source Voltage[V]
Figure 3. On-Resistance Variation vs.
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperatue
Drain Current and Gate Voltage
5.5
5.0
4.5
4.0
1000
VGS = 0V
VGS = 10V
150oC
100
25oC
10
VGS = 20V
* Note : TJ = 25oC
1
0.2
0
40
80
120
160
200
0.4
0.6
0.8
1.0
1.2
1.4
ID, Drain Current [A]
VSD, Body Diode Forward Voltage [V]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
10000
10
C
C
C
= C + C (C = shorted)
gs gd ds
iss
VDS = 25V
9000
7500
6000
4500
3000
= C + C
ds gd
= C
gd
oss
rss
Ciss
VDS = 35V
8
6
4
2
0
VDS = 50V
* Note:
1. VGS = 0V
2. f = 1MHz
Coss
Crss
1500
100
* Note : ID = 80A
80 100 120
10-1
100
101
VDS, Drain-Source Voltage [V]
30
0
20
40
60
Qg, Total Gate Charge [nC]
www.fairchildsemi.com
©2006 Fairchild Semiconductor Corporation
FDP5800 Rev. C2
3
Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
1.2
1.1
1.0
0.9
2.4
2.0
1.6
1.2
* Notes :
1. VGS = 0V
0.8
* Notes :
1. VGS = 10V
2. ID = 250μA
2. ID = 80A
0.8
-100
0.4
-80
-50
0
50
100
150
200
-40
0
40
80
120 160 200
o
TJ, Junction Temperature [ C]
o
TJ, Junction Temperature [ C]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
500
125
CURRENT LIMITED
BY PACKAGE
100μs
100
10
100
1ms
75
50
25
0
10ms
100ms
DC
Operation in This Area
is Limited by R DS(on)
1
SINGLE PULSE
TC = 25oC
TJ = 175oC
RθJC = 0.62oC/W
0.1
0.01
0.1
1
10
100
25
50
75
100
125
150
175
o
VDS, Drain-Source Voltage [V]
TC, Case Temperature [ C]
Figure 11. Transient Thermal Response Curve
1
0.1
D = 0.5
0.2
0.1
0.05
PDM
0.02
t1
t2
0.01
0.01
* Notes :
1. ZθJC(t) = 0.62oC/W Max.
Single pulse
2. Duty Factor, D=t1/t2
3. TJM - TC = PDM * ZθJC(t)
1E-3
10-5
10-4
10-3
10-2
10-1
100
101
102
t1, Square Wave Pulse Duration [sec]
www.fairchildsemi.com
©2006 Fairchild Semiconductor Corporation
FDP5800 Rev. C2
4
I
= const.
G
Figure 12. Gate Charge Test Circuit & Waveform
RL
VDS
90%
VDS
VDD
VGS
RG
10%
VGS
DUT
V
GS
td(on)
tr
td(off)
tf
t on
t off
Figure 13. Resistive Switching Test Circuit & Waveforms
VGS
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
www.fairchildsemi.com
©2006 Fairchild Semiconductor Corporation
FDP5800 Rev. C2
5
+
DUT
VDS
_
I SD
L
Driver
RG
Same Type
as DUT
VDD
VGS
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
--------------------------
VGS
D =
Gate Pulse Period
10V
( Driver )
IFM , Body Diode Forward Current
I SD
di/dt
( DUT )
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VSD
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
www.fairchildsemi.com
©2006 Fairchild Semiconductor Corporation
FDP5800 Rev. C2
6
Mechanical Dimensions
Figure 16. TO-220, Molded, 3-Lead, Jedec Variation AB
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
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Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
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©2006 Fairchild Semiconductor Corporation
FDP5800 Rev. C2
7
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FDP5800 Rev. C2
8
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相关型号:
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