FDP2D9N12C [ONSEMI]
MOSFET - N-Channel, Shielded Gate PowerTrench 120 V, 2.95 mΩ, 181 A;
| 型号： | FDP2D9N12C |
| 厂家： | 
ONSEMI |
| 描述： | MOSFET - N-Channel, Shielded Gate PowerTrench 120 V, 2.95 mΩ, 181 A 栅 |
| 文件： | 总7页 (文件大小：315K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MOSFET - N-Channel,
Shielded Gate PowerTrench
120 V, 2.95 mW, 181 A
FDP2D9N12C
Features
www.onsemi.com
• Shielded Gate MOSFET Technology
• Max R
= 2.95 mW at V = 10 V, I = 181 A
GS D
DS(on)
• 50% Lower Qrr than Other MOSFET Suppliers
• Lowers Switching Noise/EMI
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
120 V
2.95 mW @ 10 V
181 A
• 100% UIL Tested
• These Devices are Pb−Free, Halogen−Free and are RoHS Compliant
Typical Applications
D
• Synchronous Rectification for ATX / Server / Telecom PSU
• Motor Drives and Uninterruptible Power Supplies
• Micro Solar Inverter
G
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Parameter
Drain−to−Source Voltage
Symbol
Value
120
20
Unit
V
S
V
DSS
N−CHANNEL MOSFET
Gate−to−Source Voltage
V
GS
V
Continuous Drain
I
181
A
D
MARKING
DIAGRAM
Current R
(Note 2)
q
JC
Steady
State
T
= 25°C
C
Power Dissipation
(Note 2)
P
179
W
A
D
4
4
R
q
JC
Drain
Continuous Drain
Current R
I
D
19.5
q
JA
Steady
State
(Notes 1, 2)
T = 25°C
A
Power Dissipation
P
2.0
W
D
TO−220
CASE 221A
STYLE 5
R
(Notes 1, 2)
&Z&3&K
FDP
2D9N12C
q
JA
Pulsed Drain Current
T = 25°C, t = 10 ms
A
I
DM
933
A
p
1
2
Operating Junction and Storage Temperature
Range
T , T
−55 to
+150
°C
J
stg
1
3
3
Gate
Source
Source Current (Body Diode)
I
172
490
A
S
2
Single Pulse Drain−to−Source Avalanche
E
AS
mJ
Drain
Energy (I = 99 A , L = 0.1 mH)
AV
pk
&Z
&3
&K
= Assembly Plant Code
= Date Code (Year & Week)
= Lot
Lead Temperature Soldering Reflow for Solder-
ing Purposes (1/8″ from case for 10 s)
T
L
300
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
2
ORDERING INFORMATION
1. Surface−mounted on FR4 board using a 1 in pad size, 1 oz. Cu pad.
2. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
†
Device
FDP2D9N12C
Package
Shipping
TO−220
(Pb−Free)
50 / Tube,
800 / Box
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
October, 2019 − Rev. 1
FDP2D9N12C/D
FDP2D9N12C
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
0.7
Unit
Junction−to−Case − Steady State (Note 2)
Junction−to−Ambient − Steady State (Note 2)
R
°C/W
q
JC
R
62.5
q
JA
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 mA
120
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/
I
D
= 250 mA, ref to 25°C
46
(BR)DSS
mV/°C
T
J
Zero Gate Voltage Drain Current
I
V
= 0 V,
T = 25°C
1
mA
mA
nA
DSS
GS
DS
J
V
= 96 V
T = 150°C
J
100
100
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
I
V
= 0 V, V
=
20 V
GSS
DS
GS
V
V
= V , I = 664 mA
2.0
3.1
−8.6
2.7
4.0
V
mV/°C
mW
mW
S
GS(TH)
GS
DS
D
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
J
I = 664 mA, ref to 25°C
D
GS(TH)
R
V
= 10 V, I = 95 A
2.95
5.1
DS(on)
GS
D
V
= 6 V, I = 57 A
3.5
GS
D
Forward Transconductance
g
FS
V
= 10 V, I = 50 A
215
DS
D
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
C
7910
3825
32
12883
ISS
Output Capacitance
C
V
GS
= 0 V, f = 1 MHz, V = 60 V
pF
OSS
RSS
DS
Reverse Transfer Capacitance
Gate−Resistance
C
R
0.78
98
1.9
W
G
Total Gate Charge
Q
137
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Plateau Voltage
Q
23
G(TH)
nC
Q
35
V
GS
= 10 V, V = 60 V; I = 95 A
GS
GD
GP
DS
D
Q
V
15
5.0
325
V
Output Charge
Q
V
DD
= 60 V, V = 0 V
nC
OSS
GS
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
t
43
31
72
24
d(ON)
t
r
V
= 10 V, V = 60 V,
DD
GS
D
ns
V
I
= 95 A, R = 6.0 W
G
Turn−Off Delay Time
Fall Time
t
d(OFF)
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Charge Time
V
SD
V
GS
= 0 V, I = 95 A
T = 25°C
J
0.9
88
1.3
S
t
RR
t
a
48
ns
V
= 0 V, V = 60 V
DD
GS
dI /dt = 300 A/ms, I = 100 A
S
S
Discharge Time
t
b
40
Reverse Recovery Charge
Q
500
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
4. Switching characteristics are independent of operating junction temperatures.
www.onsemi.com
2
FDP2D9N12C
TYPICAL CHARACTERISTICS
5
350
300
250
200
150
100
7.0 V
10 V
8 V
V
GS
= 5.0 V
6.0 V
5.5 V
5.5 V
4
3
2
8.0 V
6.0 V
V
GS
= 5.0 V
7.0 V
10 V
1
0
50
0
0
1
2
3
4
5
0
4
0
50
100
150
200
250
300 350
V
, DRAIN−TO−SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
DS
Figure 1. On−Region Characteristics
Figure 2. Normalized On−Resistance vs. Drain
Current and Gate Voltage
2.0
20
I
V
= 100 A
I
D
= 100 A
D
1.8
1.6
1.4
= 10 V
GS
15
10
1.2
1.0
T = 125°C
J
5
0
T = 25°C
J
0.8
0.6
−75 −50 −25
0
25
50
75
100 125 150
5
6
7
8
9
10
T , JUNCTION TEMPERATURE (°C)
J
V
, GATE−TO−SOURCE VOLTAGE (V)
GS
Figure 3. Normalized On−Resistance vs.
Figure 4. On−Resistance vs. Gate−to−Source
Junction Temperature
Voltage
350
300
250
200
150
100
V
= 5 V
DS
V
= 0 V
GS
100
10
1
T = 25°C
J
T = 150°C
J
0.1
0.01
50
0
T = 150°C
J
T = −55°C
J
T = 25°C
T = −55°C
J
J
0.001
3
4
5
6
7
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source−to−Drain Diode Forward
Voltage vs. Source Current
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3
FDP2D9N12C
TYPICAL CHARACTERISTICS
10
8
100K
V
DD
= 40 V
C
ISS
10K
1K
V
DD
= 60 V
V
DD
= 80 V
C
OSS
6
100
4
C
10
1
2
0
RSS
f = 1 MHz
= 0 V
V
GS
0
20
40
60
80
100
1000
150
0.1
1
10
100
CHARGE (nC)
V
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs. Drain−to−Source
Voltage
1M
100K
10K
1K
100
T = 25°C
J
T = 100°C
J
T = 125°C
J
10
1
100
10
0.001 0.01
0.1
1
10
100
0.00001 0.0001
0.001
0.01
0.1
1
t
AV
, TIME IN AVALANCHE (mS)
Figure 9. Unclamped Inductive Switching
Capability
Figure 10. Peak Power
200
150
100
1000
V
GS
= 10 V
1 ms
10 ms
100 ms
10 ms
100
10
100 ms/DC
V
GS
= 6 V
T
= 25°C
C
Single Pulse
= 0.7°C/W
R
q
JC
50
0
R
Limit
1
DS(on)
Thermal Limit
Package Limit
R
= 0.7°C/W
q
JC
0.1
25
50
75
100
125
0.1
1
10
100
T , CASE TEMPERATURE (°C)
C
Figure 11. Drain Current vs. Case Temperature
Figure 12. Forward Bias Safe Operating Area
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4
FDP2D9N12C
TYPICAL CHARACTERISTICS
10
1
Duty Cycle = 0.5
0.2
0.1
0.05
0.1
0.02
0.01
0.01
Single Pulse
0.00001
0.001
0.0001
0.001
0.01
0.1
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Transient Thermal Impedance
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−220
CASE 221A
ISSUE AK
DATE 13 JAN 2022
SCALE 1:1
STYLE 1:
PIN 1. BASE
2. COLLECTOR
STYLE 2:
PIN 1. BASE
2. EMITTER
STYLE 3:
PIN 1. CATHODE
STYLE 4:
PIN 1. MAIN TERMINAL 1
2. ANODE
3. GATE
2. MAIN TERMINAL 2
3. GATE
3. EMITTER
3. COLLECTOR
4. EMITTER
4. COLLECTOR
4. ANODE
4. MAIN TERMINAL 2
STYLE 5:
PIN 1. GATE
STYLE 6:
PIN 1. ANODE
STYLE 7:
STYLE 8:
PIN 1. CATHODE
2. ANODE
PIN 1. CATHODE
2. ANODE
2. DRAIN
3. SOURCE
4. DRAIN
2. CATHODE
3. ANODE
3. CATHODE
4. ANODE
3. EXTERNAL TRIP/DELAY
4. ANODE
4. CATHODE
STYLE 9:
PIN 1. GATE
STYLE 10:
PIN 1. GATE
STYLE 11:
STYLE 12:
PIN 1. DRAIN
2. SOURCE
3. GATE
PIN 1. MAIN TERMINAL 1
2. MAIN TERMINAL 2
3. GATE
2. COLLECTOR
3. EMITTER
2. SOURCE
3. DRAIN
4. COLLECTOR
4. SOURCE
4. SOURCE
4. NOT CONNECTED
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42148B
TO−220
PAGE 1 OF 1
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