FDN028N20 [ONSEMI]
N 沟道 PowerTrench® MOSFET 20V，6.1A，28mΩ;
| 型号： | FDN028N20 |
| 厂家： | 
ONSEMI |
| 描述： | N 沟道 PowerTrench® MOSFET 20V，6.1A，28mΩ |
| 文件： | 总7页 (文件大小：321K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
MOSFET – N-Channel,
POWERTRENCH)
V
r
MAX
I MAX
D
DS
DS(on)
20 V
28 mW @ 4.5 V
45 mW @ 2.5 V
6.1 A
20 V, 6.1 A, 28 mW
FDN028N20
General Description
This N−Channel POWERTRENCH MOSFET is produced using
onsemi’s advanced POWERTRENCH process that has been
especially tailored to minimize on−state resistance and yet maintain
low gate charge for superior switching performance.
SOT−23/SUPERSOTt−23, 3 LEAD, 1.4x2.9
CASE 527AG
Features
MARKING DIAGRAM
28NM
• Max r
• Max r
= 28 mW at V = 4.5 V, I = 5.2 A
GS D
DS(on)
DS(on)
= 45 mW at V = 2.5 V, I = 4.4 A
GS
D
• High Performance Trench Technology for Extremely Low r
DS(on)
• High Power and Current Handling Capability in a Widely Used
Surface Mount Package
28N = Specific Device Code
M
= Date Code
• Fast Switching Speed
• 100% UIL Tested
• This Device is Pb−Free, Halide Free and is RoHS Compliant
PIN ASSIGNMENT
Applications
D
• Primary DC−DC Switch
• Load Switch
MOSFET MAXIMUM RATINGS (T = 25°C, unless otherwise noted)
C
Symbol
Parameter
Drain to Source Voltage
Gate to Source Voltage (Note 3)
Ratings
Unit
V
V
DS
20
G
S
V
GS
12
V
I
D
Continuous
Pulsed
T = 25°C (Note 1a)
6.1
A
A
(Note 5)
52
ORDERING INFORMATION
See detailed ordering and shipping information on page 5 of
this data sheet.
E
Single Pulse Avalanche Energy (Note 4)
6
1.5
mJ
W
AS
P
Power Dissipation
(Note 1a)
(Note 1b)
D
0.6
T , T
Operating and Storage Junction
Temperature Range
−55 to 150
°C
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS (T = 25°C, unless otherwise noted)
C
Symbol
Parameter
Ratings
Unit
R
Thermal Resistance, Junction−to−Case
(Note 1)
75
°C/W
q
JC
R
Thermal Resistance, Junction−to−Ambient
(Note 1a)
80
°C/W
q
JA
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
February, 2023 − Rev. 2
FDN028N20/D
FDN028N20
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= 250 mA, V = 0 V
20
−
−
−
−
V
DSS
D
GS
Breakdown Voltage Temperature Coefficient
= 250 mA, referenced to 25_C
15
mV/_C
DBVDSS
DTJ
D
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
V
= 16 V, V = 0 V
−
−
−
−
1
mA
DSS
GSS
DS
GS
I
= 12 V, V = 0 V
100
nA
GS
DS
ON CHARACTERISTICS
V
Gate to Source Threshold Voltage
V
I
= V , I = 250 mA
0.5
−
0.9
−3
1.5
−
V
GS(th)
GS
DS D
Gate to Source Threshold Voltage
Temperature Coefficient
= 250 mA, referenced to 25_C
mV/_C
DVGS(th)
DTJ
D
r
Static Drain to Source On Resistance
Forward Transconductance
V
GS
V
GS
V
GS
V
DS
= 4.5 V, I = 5.2 A
−
−
−
−
23
32
30
28
28
45
41
−
mW
DS(on)
D
= 2.5 V, I = 4.4 A
D
= 4.5 V, I = 5.2 A, T = 125_C
D
J
g
FS
= 5 V, I = 5.2 A
S
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
DS
= 10 V, V = 0 V, f = 1 MHz
−
−
−
399
91
600
140
130
pF
pF
pF
iss
GS
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
87
SWITCHING CHARACTERISTICS
t
Turn−On Delay Time
Rise Time
V
R
= 10 V, I = 5.2 A, V = 10 V,
−
−
−
−
−
5
2
10
10
29
10
6.0
ns
ns
ns
ns
nC
d(on)
DD
D
GS
= 6 W
GEN
t
r
t
Turn−Off Delay Time
Fall Time
15
2
d(off)
t
f
Q
Q
Total Gate Charge
V
GS
V
DD
= 0 V to 4.5 V
4.3
g(TOT)
= 10 V, I = 5.2 A
D
Total Gate Charge
V
GS
V
DD
= 0 V to 2.5 V
−
2.8
3.9
nC
g(TOT)
= 10 V, I = 5.2 A
D
Q
Q
Gate to Source Charge
V
DD
= 10 V, I = 5.2 A
−
−
0.7
1.6
−
−
nC
nC
gs
D
Gate to Drain “Miller” Charge
gd
DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
V
Source to Drain Diode Forward Voltage
Reverse Recovery Time
V
= 0 V, I = 5.2 A (Note 2)
−
−
−
0.85
13
3
1.2
27
10
V
SD
GS
S
t
I = 5.2 A, di/dt = 100 A/ms
F
ns
nC
rr
Q
Reverse Recovery Charge
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. R
is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder
q
JA
mounting surface of the drain pins. R
is guaranteed by design while R
is determined by the user’s board design.
q
q
CA
JC
a. 80°C/W when mounted on a
b. 180°C/W when mounted on a
minimum pad.
2
1 in pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0%.
3. As an N−ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
4. E of 6 mJ is based on starting T = 25°C, L = 3 mH, I = 2 A, V = 20 V, V = 10 V. 100% test at L = 0.1 mH, I = 7 A.
AS
J
AS
DD
GS
AS
5. Pulsed Id please refer to Figure 10 SOA graph for more details.
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2
FDN028N20
TYPICAL CHARACTERISTICS
(T = 25°C unless otherwise noted)
J
16
12
8
4.5
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
= 1.8 V
V
= 2 V
GS
GS
V
= 4.5 V
= 3 V
GS
V
GS
V
GS
= 2 V
3.0
1.5
0.0
V
= 2.5 V
GS
V
= 4.5 V
GS
V
= 3 V
GS
V = 2.5 V
GS
V
GS
= 1.8 V
4
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
0
0.0
0
4
8
12
16
4.5
1.2
0.5
1.0
1.5
2.0
V
, DRAIN TO SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
DS
D
Figure 1. On Region Characteristics
Figure 2. Normalized On−Resistance vs.
Drain Current and Gate Voltage
1.5
1.4
1.3
80
I
V
= 5.2 A
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
D
= 4.5 V
GS
I
D
= 5.2 A
60
40
20
0
1.2
1.1
1.0
0.9
T = 125°C
J
T = 25°C
J
0.8
0.7
−75 −50 −25
0
25 50 75 100 125 150
1.5
2.0
2.5
3.0
3.5
4.0
T , JUNCTION TEMPERATURE (°C)
J
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On−Resistance vs.
Junction Temperature
Figure 4. On−Resistance vs. Gate to Source
Voltage
20
10
16
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
= 0 V
GS
V
= 5 V
DS
12
8
1
T = 25°C
J
0.1
T = 25°C
J
T = 150°C
J
T = −55°C
J
4
0.01
0.001
T = −55°C
J
T = 150°C
J
0
0
1
2
3
0.0
0.2
0.4
0.6
0.8
1.0
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward
Voltage vs. Source Current
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3
FDN028N20
TYPICAL CHARACTERISTICS
(T = 25°C unless otherwise noted) (continued)
J
1000
4.5
3.0
1.5
0.0
I
D
= 5.2 A
C
iss
V
= 10 V
DD
C
oss
V
= 8 V
DD
100
V
= 12 V
C
DD
rss
f = 1 MHz
V
GS
= 0 V
10
0.1
0
1
2
3
4
5
1
10
, DRAIN TO SOURCE VOLTAGE (V)
DS
20
Q , GATE CHARGE (nC)
g
V
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs. Drain to Source Voltage
100
10
9
8
7
THIS AREA IS
10 ms
LIMITED BY r
DS(on)
6
5
10
1
T = 25°C
J
100 ms
4
T = 125°C
J
1 ms
3
T = 100°C
10 ms
100 ms
1 s
10 s
DC
J
2
SINGLE PULSE
0.1
0.01
T = MAX RATED
J
R
q
JA
= 180°C/W CURVE BENT TO
T = 25°C
A
MEASURED DATA
10
, DRAIN TO SOURCE VOLTAGE (V)
1
0.001
0.01
0.1
1
10
0.01
0.1
1
100
t
, TIME IN AVALANCHE (ms)
V
DS
AV
Figure 9. Unclamped Inductive Switching
Capability
Figure 10. Forward Bias Safe Operating Area
1000
100
10
SINGLE PULSE
R
q
JA
= 180°C/W
T = 25°C
A
1
0.1
10 −5
10−4
10−3
10−2
1
10
10−1
100
1000
t, PULSE WIDTH (s)
Figure 11. Single Pulse Maximum Power Dissipation
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4
FDN028N20
TYPICAL CHARACTERISTICS
(T = 25°C unless otherwise noted) (continued)
J
2
1
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
0.1
0.01
0.1
0.05
0.02
0.01
PDM
t1
t2
NOTES:
Z
R
(t) = r(t) x R
q
q
JA
JA
SINGLE PULSE
10−4
0.001
0.0001
= 180°C/W
q
JA
Peak T = P
Duty Cycle, D = t / t
x Z (t) + T
q
JA A
J
DM
1
2
10−5
10−3
10−2
10−1
1
10
100
1000
t, RECTANGULAR PULSE DURATION (s)
Figure 12. Junction−to−Ambient Transient Thermal Response Curve
PACKAGE MARKING AND ORDERING INFORMATION
†
Device
Device Marking
Package
Reel Size
Tape Width
8 mm
Shipping
FDN028N20
28N
SOT−23/SUPERSOT−23, 3 LEAD, 1.4x2.9
(Pb−Free, Halide Free)
7”
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SUPERSOT is trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other
countries.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−23/SUPERSOTt−23, 3 LEAD, 1.4x2.9
CASE 527AG
ISSUE A
DATE 09 DEC 2019
GENERIC
MARKING DIAGRAM*
*This information is generic. Please refer to
XXX = Specific Device Code
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
M
= Month Code
XXXMG
G
= Pb−Free Package
G
(Note: Microdot may be in either location)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON34319E
SOT−23/SUPERSOT−23, 3 LEAD, 1.4X2.9
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
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