FDMC89521L [ONSEMI]
双 N 沟道，Power Trench® MOSFET，60V，8.2A，17mΩ;
| 型号： | FDMC89521L |
| 厂家： | 
ONSEMI |
| 描述： | 双 N 沟道，Power Trench® MOSFET，60V，8.2A，17mΩ |
| 文件： | 总8页 (文件大小：266K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
MOSFET – Dual N-Channel,
POWERTRENCH)
Pin 1
Pin 1
G1 S1 S1 S1
D1
D2
60 V, 8.2 A, 17 mW
FDMC89521L
S2 S2
G2 S2
General Description
Power 33
This device includes two 60 V N−Channel MOSFETs in a dual
Power 33 (3 mm x 3 mm MLP) package. The package is enhanced for
exceptional thermal performance.
WDFN8 3x3, 0.65P
CASE 511DG
Features
MARKING DIAGRAM
• Max r
• Max r
= 17 mW at V = 10 V, I = 8.2 A
GS D
DS(on)
DS(on)
= 27 mW at V = 4.5 V, I = 6.7 A
GS
D
$Y&Z&2&K
FDMC
89521L
• Termination is Lead−free
• These Devices are RoHS Compliant
Applications
• Battery Protection
• Load Switching
• Bridge Topologies
$Y
&Z
&2
&K
= onsemi Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
FDMC89521L
= Specific Device Code
MOSFET MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Symbol
VDS
Parameter
Drain to Source Voltage
Ratings Units
PIN ASSIGNMENT
60
20
V
V
A
VGS
Gate to Source Voltage
G2
G1
S1
ID
Drain Current
− Continuous
− Pulsed
TA = 25°C
(Note 1a)
(Note 3)
8.2
40
S2
S2
S2
EAS
PD
Single Pulse Avalanche Energy
Power Dissipation TC = 25°C
Power Dissipation TA = 25°C
32
16
mJ
W
S1
S1
(Note 1a)
1.9
TJ, TSTG Operating and Storage Junction Temperature
Range
−55 to
+150
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
N−Channel MOSFET
ORDERING INFORMATION
See detailed ordering and shipping information on page 6 of
this data sheet.
THERMAL CHARACTERISTICS
Symbol
RθJC
Parameter
Ratings
8.0
Unit
°C/W
°C/W
Thermal Resistance, Junction−to−Case
RθJA
Thermal Resistance, Junction−to−Ambient
(Note 1a)
65
RθJA
Thermal Resistance, Junction−to−Ambient
(Note 1b)
155
°C/W
© Semiconductor Components Industries, LLC, 2012
1
Publication Order Number:
February, 2023 − Rev. 2
FDMC89521L/D
FDMC89521L
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Parameter
Test Conditions
Symbol
Min.
Typ.
Max.
Unit
OFF CHARACTERISTICS
I
D
= 250 μA, V = 0 V
BV
Drain to Source Breakdown Voltage
60
V
GS
DSS
DBV
DSS
DT
Breakdown Voltage Temperature Coefficient
I
D
= 250 μA, referenced to 25°C
30
mV/°C
J
μA
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
V
= 48 V, V = 0 V
1
DSS
DS
GS
I
=
20 V, V = 0 V
100
nA
GSS
GS
DS
ON CHARACTERISTICS
Gate to Source Threshold Voltage
V
I
= V , I = 250 μA
DS D
V
GS(th)
1
1.9
3
V
GS
DV
GS(th)
DT
Gate to Source Threshold Voltage
Temperature Coefficient
= 250 μA, referenced to 25°C
D
−6
mV/°C
J
r
Static Drain to Source On Resistance
mW
V
GS
V
GS
V
GS
V
DD
= 10 V, I = 8.2 A
13
21
20
28
17
27
26
DS(on)
D
= 4.5 V, I = 6.7 A
D
= 10 V, I = 8.2 A, T = 125°C
D
J
g
FS
Forward Transconductance
= 10 V, I = 8.2 A
S
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 30 V, V = 0 V
1228
243
10
1635
325
15
pF
pF
pF
W
iss
DS
GS
f = 1 MHz
C
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
oss
C
rss
R
0.7
g
SWITCHING CHARACTERISTICS
V
= 30 V, I = 8.2 A,
D
t
Turn−On Delay Time
Rise Time
7.9
2.1
18
16
10
33
10
24
ns
ns
ns
ns
nC
DD
GS
d(on)
V
= 10 V, R
= 6 W
GEN
t
r
t
Turn−Off Delay Time
Fall Time
d(off)
t
f
1.7
17
Q
Total Gate Charge
V
= 0 V to 10 V, V = 30 V,
g
GS DD
I
D
= 8.2 A
V
D
= 0 V to 4.5 V, V = 30 V,
7.9
12
nC
GS
DD
I
= 8.2 A
V
DD
= 30 V, I = 8.2 A
D
Q
Gate to Source Charge
3.8
1.9
nC
nC
gs
Q
Gate to Drain “Miller” Charge
gd
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source to Drain Diode Forward Voltage
V
= 0 V, I = 8.2 A (Note 2)
0.85
0.75
25
1.3
1.2
40
V
SD
GS
S
V
GS
= 0 V, I = 1.6 A (Note 2)
S
t
Reverse Recovery Time
I = 8.2 A, di/dt = 100 A/μs
F
ns
rr
Q
Reverse Recovery Charge
11
20
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
www.onsemi.com
2
FDMC89521L
NOTES:
1. R
2
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR−4 material. R
is guaranteed
θ
θ
JC
JA
by design while R
is determined by the user’s board design.
θ
CA
a. 65°C/W when mounted on
a 1 in pad of 2 oz copper
b. 155°C/W when mounted on
a minimum pad of 2 oz copper
2
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. E of 32 mJ is based on starting T = 25°C, L = 1 mH, I = 8 A, V = 54 V, V = 10 V. 100% tested at L = 3 mH, I = 5.4 A.
AS
J
AS
DD
GS
AS
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3
FDMC89521L
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
40
30
20
10
0
4
V
= 3.5 V
V
GS
GS
= 10 V
V
= 4 V
GS
GS
GS
V
V
= 6 V
= 5 V
3
V
GS
= 4 V
V
= 4.5 V
GS
2
1
V
GS
= 3.5 V
V
= 4.5 V
GS
V
= 5 V
V
= 10 V
GS
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
GS
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
GS
= 6 V
0
0
0.5
1.0
1.5
2.0
2.5
0
10
20
30
40
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 1. On−Region Characteristics
Figure 2. Normalized On−Resistance vs.
Drain Current and Gate Voltage
1.8
60
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
I
V
= 8.2 A
= 10 V
D
1.6
1.4
1.2
1.0
0.8
0.6
GS
50
I
D
= 8.2 A
40
30
20
T = 125°C
J
10
0
T = 25°C
J
−75 −50 −25
0
25 50 75 100 125 150
4
2
6
8
10
T , JUNCTION TEMPERATURE (°C)
J
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On−Resistance
Figure 4. On−Resistance vs. Gate to
vs. Junction Temperature
Source Voltage
40
100
10
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
GS
= 0 V
V
DS
= 5 V
30
20
10
0
T = 150°C
J
1
T = 25°C
J
0.1
0.01
T = 150°C
J
T = 25°C
J
T = −55°C
J
T = −55°C
J
0.001
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1
2
3
4
5
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward
Voltage vs. Source Current
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4
FDMC89521L
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
J
10
8
10000
I
D
= 8.2 A
C
iss
1000
100
10
V
= 30 V
DD
6
C
oss
V
= 20 V
DD
V
DD
= 40 V
4
C
rss
2
f = 1 MHz
= 0 V
V
GS
0
1
0.1
0
3
6
9
12
15
18
1
10
, DRAIN TO SOURCE VOLTAGE (V)
DS
60
Q , GATE CHARGE (nC)
V
g
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs. Drain
to Source Voltage
60
10
20
10
T = 100°C
J
1
0.1
THIS AREA IS
LIMITED BY r
1 ms
T = 25°C
T = 125°C
DS(on)
J
J
10 ms
100 ms
SINGLE PULSE
T
J
= MAX RATED
1 s
10 s
DC
R
T
= 155°C/W
= 25°C
DERIVED FROM
TEST DATA
q
JA
A
0.01
1
0.01
0.1
1
10
100 300
0.01
0.1
1
10
t , TIME IN AVALANCHE (ms)
AV
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 9. Unclamped Inductive Switching
Capability
Figure 10. Maximum Continuous Drain
Current vs. Case Temperature
300
100
10
SINGLE PULSE
R
= 155°C/W
q
JA
T = 25°C
A
1
0.5
10
−3
−2
−1
10
10
1
10
100
1000
t, PULSE WIDTH (s)
Figure 11. Single Pulse Maximum Power Dissipation
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5
FDMC89521L
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
J
2
1
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
t
1
t
2
0.01
NOTES:
Duty Factor: D = t / t
Peak T = P
J
SINGLE PULSE
1
× Z
2
R
= 155°C/W
q
JA
× R
+ T
JA A
q
q
DM
JA
0.001
−3
10
10−2
10−1
1
10
100
1000
t, RECTANGULAR PULSE DURATION (s)
Figure 12. Junction−to−Case Transient Thermal Response Curve
ORDERING INFORMATION
Device
†
Device Marking
Package Type
Shipping
FDMC89521L
FDMC89521L
WDFN8 3x3, 0.65P
3000 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other
countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN8 3x3, 0.65P
CASE 511DG
ISSUE A
DATE 12 FEB 2019
GENERIC
MARKING DIAGRAM*
XXXX
AYWWG
G
XXXX = Specific Device Code
A
Y
= Assembly Location
= Year
WW = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13623G
WDFN8 3x3, 0.65P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
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