FDMC0310AS [ONSEMI]
N 沟道，PowerTrench® SyncFET™，30V，21A，4.4mΩ;
| 型号： | FDMC0310AS |
| 厂家： | 
ONSEMI |
| 描述： | N 沟道，PowerTrench® SyncFET™，30V，21A，4.4mΩ |
| 文件： | 总11页 (文件大小：439K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
SyncFETt – N-Channel,
V
MAX
r
MAX
I MAX
D
DS
DS(on)
POWERTRENCH)
30 V
4.4 mW @ 10 V
5.2 mW @ 4.5 V
21 A
30 V, 21 A, 4.4 mW
Pin 1
FDMC0310AS,
FDMC0310AS-F127
G
S
S
S
D
D
D
D
General Description
The FDMC0310AS has been designed to minimize losses in power
conversion application. Advancements in both silicon and package
Top
Bottom
WDFN8 3.3x3.3, 0.65P
(MLP SAWN)
technologies have been combined to offer the lowest r
while
DS(on)
CASE 511DH
maintaining excellent switching performance. This device has the
added benefit of an efficient monolithic schottky body diode.
Pin 1
S
S
S
Features
G
• Max r
• Max r
= 4.4 mW at V = 10 V, I = 19 A
GS D
DS(on)
DS(on)
D
= 5.2 mW at V = 4.5 V, I = 17.5 A
GS
D
D
D
D
• Advanced Package and Silicon Combination for Low r
High Efficiency
and
DS(on)
Top
Bottom
WDFN8 3.3x3.3, 0.65P
(MLP PUNCH)
CASE 511DQ − Option C
• SyncFET Schottky Body Diode
• MSL1 Robust Package Design
• 100% UIL Tested
• These Devices are Pb−Free and are RoHS Compliant
MARKING DIAGRAM
Applications
FDMC
0310AS
ALYW
$Y&Z&2&K
FDMC
0310AS
• Synchronous Rectifier for DC/DC Converters
• Notebook Vcore/GPU Low Side Switch
• Networking Point of Load Low Side Switch
• Telecom Secondary Side Rectification
FDMC0310AS = Device Code
A
= Assembly Site
L
= Wafer Lot Number
= Assembly Start Week
= onsemi Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
YW
$Y
&Z
&2
&K
PIN CONNECTIONS
D
D
D
D
5
6
7
8
4
3
2
1
G
S
S
S
ORDERING INFORMATION
See detailed ordering and shipping information on page 7 of
this data sheet.
© Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
February, 2022 − Rev. 4
FDMC0310AS/D
FDMC0310AS, FDMC0310AS−F127
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Symbol
Parameter
Ratings
Unit
V
V
DS
Drain to Source Voltage
30
V
Drain to Source Transient Voltage (t
Gate to Source Voltage (Note 1)
Drain Current
< 100 ns)
33
V
DSt
Transient
V
20
V
GS
I
Continuous, T = 25°C
21
A
D
C
Continuous, T = 25°C (Note 3a)
19
A
A
Pulsed
100
A
E
Single Pulse Avalanche Energy (Note 2)
Power Dissipation
66
36
mJ
W
AS
P
T = 25°C
C
D
T = 25°C (Note 3a)
A
2.4
T , T
Operating and Storage Junction Temperature Range
–55 to +150
°C
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. As an N−ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
2. E of 66 mJ is based on starting T = 25°C, L = 0.3 mH, I = 21 A, V = 27 V, V = 10 V. 100% tested at L= 3 mH, I = 10.2 A.
AS
J
AS
DD
GS
AS
THERMAL CHARACTERISTICS
Symbol
Parameter
Ratings
3.4
Unit
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient (Note 3a)
°C/W
R
R
q
JC
JA
53
q
3. R
is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR−4 material. R
is guaranteed
q
q
JC
JA
by design while R
is determined by the user’s board design.
q
CA
a. 53°C/W when mounted on a
b. 125°C/W when mounted on a
2
1 in pad of 2 oz copper.
minimum pad of 2 oz copper.
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2
FDMC0310AS, FDMC0310AS−F127
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= 1 mA, V = 0 V
30
−
−
−
V
DSS
D
GS
Breakdown Voltage Temperature
Coefficient
= 10 mA, referenced to 25°C
−
26
mV/°C
DBVDSS
DTJ
D
I
Zero Gate Voltage Drain Current
V
V
= 24 V, V = 0 V
−
−
−
−
500
100
mA
DSS
GSS
DS
GS
I
Gate to Source Leakage Current, Forward
= 20 V, V = 0 V
nA
GS
DS
ON CHARACTERISTICS
V
Gate to Source Threshold Voltage
V
I
= V , I = 1 mA
1.2
1.6
3.0
V
GS(th)
GS
DS
D
Gate to Source Threshold Voltage
Temperature Coefficient
= 10 mA, referenced to 25°C
−
−5
−
mV/°C
DVGS(th)
DTJ
D
r
Static Drain to Source On Resistance
Forward Transconductance
V
GS
V
GS
V
GS
V
DS
= 10 V, I = 19 A
−
−
−
−
3.8
4.5
4.5
106
4.4
5.2
5.8
−
mW
DS(on)
D
= 4.5 V, I = 17.5 A
D
= 10 V, I = 19 A, T = 125°C
D
J
g
FS
= 5 V, I = 19 A
S
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
DS
= 15 V, V = 0 V, f = 1 MHz
−
−
2380
885
100
0.7
3165
1175
150
pF
pF
pF
W
iss
GS
C
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
oss
C
−
rss
R
0.1
2.5
g
SWITCHING CHARACTERISTICS
t
Turn−On Delay Time
Rise Time
V
V
= 15 V, I = 19 A
−
−
−
−
−
11
5
20
10
48
10
52
ns
ns
ns
ns
nC
d(on)
DD
GS
D
= 10 V, R
= 6 W
GEN
t
r
t
Turn−Off Delay Time
Fall Time
30
4
d(off)
t
f
Q
Total Gate Charge
V
GS
V
DD
= 0 V to 10 V
37
g
= 15 V, I = 19 A
D
V
GS
V
DD
= 0 V to 4.5 V
−
18
25
nC
= 15 V, I = 19 A
D
Q
Gate to Source Charge
V
DD
= 15 V, I = 19 A
−
−
6
6
−
−
nC
nC
gs
D
Q
Gate to Drain “Miller” Charge
gd
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source to Drain Diode Forward Voltage
V
V
= 0 V, I = 2 A (Note 4)
−
−
−
−
0.6
0.8
29
0.8
1.2
47
V
V
SD
GS
S
= 0 V, I = 19 A (Note 4)
GS
S
t
Reverse Recovery Time
I = 19 A, di/dt = 300 A/ms
F
ns
nC
rr
Q
Reverse Recovery Charge
33
53
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0%
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3
FDMC0310AS, FDMC0310AS−F127
TYPICAL CHARACTERISTICS
(T = 25°C unless otherwise noted)
J
100
80
60
40
20
0
5
4
3
2
1
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
V
V
V
= 10 V
= 6 V
= 4.5 V
= 4 V
GS
GS
GS
V
= 3 V
GS
GS
V
= 3.5 V
GS
V
GS
= 3 V
V
GS
= 3.5 V
V
= 10 V
GS
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
GS
= 4 V
20
V
= 4.5 V V = 6 V
GS GS
0
0.0
0.5
1.0
1.5
2.0
0
40
60
80
100
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 1. On Region Characteristics
Figure 2. Normalized On−Resistance vs. Drain
Current and Gate Voltage
1.6
1.4
1.2
1.0
0.8
0.6
12
I
V
= 19 A
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
D
= 10 V
GS
9
I
D
= 19 A
6
3
0
T = 125°C
J
T = 25°C
J
−75 −50 −25
0
25 50 75 100 125 150
2
4
6
8
10
T , JUNCTION TEMPERATURE (°C)
J
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On−Resistance vs.
Figure 4. On−Resistance vs. Gate to Source
Junction Temperature
Voltage
100
80
60
40
20
0
100
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
GS
= 0 V
V
DS
= 5 V
T = 125°C
J
10
1
T = 125°C
J
T = 25°C
J
T = 25°C
J
T = −55°C
J
T = −55°C
J
0.1
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0.0
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward Voltage
vs. Source Current
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4
FDMC0310AS, FDMC0310AS−F127
TYPICAL CHARACTERISTICS
(T = 25°C unless otherwise noted) (continued)
J
10
8
5000
I
D
= 19 A
C
iss
V
DD
= 15 V
1000
6
V
DD
= 10 V
C
oss
V
DD
= 20 V
4
C
rss
2
100
50
f = 1 MHz
V
GS
= 0 V
0
0
8
16
24
32
40
0.1
1
10
, DRAIN TO SOURCE VOLTAGE (V)
DS
30
Q , GATE CHARGE (nC)
V
g
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs. Drain to Source
Voltage
80
30
10
V
GS
= 10 V
60
40
20
0
T = 25°C
J
V
GS
= 4.5 V
T = 100°C
J
T = 125°C
J
R
= 3.4°C/W
q
JC
LIMITED BY PACKAGE
25 50 75
T , CASE TEMPERATURE (°C)
1
0.001
0.01
0.1
1
10
100
100
125
150
t , TIME IN AVALANCHE (ms)
AV
C
Figure 9. Unclamped Inductive Switching
Capability
Figure 10. Maximum Continuous Drain Current
vs. Case Temperature
200
100
1000
100
100 ms
10
1 ms
10 ms
1
THIS AREA IS
LIMITED BY r
10
DS(on)
100 ms
SINGLE PULSE
T = MAX RATED
1 s
10 s
DC
0.1
SINGLE PULSE
J
R
= 125°C/W
R
= 125°C/W
q
qJA
JA
T = 25°C
A
T = 25°C
A
0.01
0.5
10−4 10−3 10−2 10−1
0.01
0.1
1
10
100 200
1
10
100 1000
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
t, PULSE WIDTH (s)
Figure 11. Forward Bias Safe Operating
Area
Figure 12. Single Pulse Maximum Power
Dissipation
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5
FDMC0310AS, FDMC0310AS−F127
TYPICAL CHARACTERISTICS
(T = 25°C unless otherwise noted) (continued)
J
2
1
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
PDM
0.01
t1
t2
SINGLE PULSE
= 125°C/W
(Note 3b)
NOTES:
DUTY FACTOR: D = t / t
0.001
R
q
JA
1
2
PEAK T = P
x Z
x R
+ T
JA A
q
q
J
DM
JA
0.0001
10−4
10−3
10−2
10−1
t, RECTANGULAR PULSE DURATION (s)
1
10
100
1000
Figure 13. Junction−to−Ambient Transient Thermal Response Curve
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6
FDMC0310AS, FDMC0310AS−F127
TYPICAL CHARACTERISTICS (continued)
SyncFET Schottky Body Diode Characteristics
onsemi SyncFET process embeds a Schottky diode in
parallel with POWERTRENCH MOSFET. This diode
exhibits similar characteristics to a discrete external
Schottky diode in parallel with a MOSFET. Figure 14 shows
the reverse recovery characteristic of the FDMC0310AS.
Schottky barrier diodes exhibit significant leakage at high
temperature and high reverse voltage. This will increase the
power in the device.
25
20
15
10
0.01
T = 125°C
J
0.001
0.0001
T = 100°C
J
di/dt = 300 A/ms
5
0.00001
0.000001
0
T = 25°C
J
−5
0
50
100
150
200
250
0
5
10
15
20
25
30
TIME (ns)
V
DS
, REVERSE VOLTAGE (V)
Figure 14. SyncFET Body Diode Reverse
Recovery Characteristics
Figure 15. SyncFET Body Diode Reverse
Leakage vs. Drain−Source Voltage
PACKAGE MARKING AND ORDERING INFORMATION
†
Device
Device Marking
Package Type
Reel Size
Tape Width
Shipping
FDMC0310AS
FDMC0310AS
WDFN8 3.3x3.3, 0.65P
MLP (SAWN)
13”
12 mm
3000 / Tape & Reel
(Pb−Free)
FDMC0310AS−F127
FDMC0310AS
WDFN8 3.3x3.3, 0.65P
MLP (PUNCH)
(Pb−Free)
13”
12 mm
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United
States and/or other countries.
SyncFET is trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other
countries.
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7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN8 3.3x3.3, 0.65P
CASE 511DH
ISSUE O
DATE 31 JUL 2016
(3.40)
2.37
0.05 C
B
3.30
A
8
5
2X
0.45(4X)
(0.40)
2.15
3.30
(1.70)
KEEP OUT
AREA
(0.65)
0.70(4X)
0.05 C
PIN#1 IDENT
1
4
TOP VIEW
0.65
0.42(8X)
2X
1.95
RECOMMENDED LAND PATTERN
0.75 0.05
0.10 C
0.15 0.05
0.08 C
0.025 0.025
NOTES:
C
SIDE VIEW
SEATING
PLANE
A. DOES NOT CONFORM TO JEDEC
REGISTRATION MO−229
B. DIMENSIONS ARE IN MILLIMETERS.
3.30 0.05
2.27 0.05
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 2009.
(0.50)4X
(0.35)
PIN #1 IDENT
0.50 0.05 (4X)
(0.79)
D. LAND PATTERN RECOMMENDATION IS
EXISTING INDUSTRY LAND PATTERN.
1
4
(1.15)
3.30 0.05
2.00 0.05
R0.15
0.30 0.05 (3X)
8
5
0.35 0.05 (8X)
0.65
0.10
0.05
C A B
C
1.95
BOTTOM VIEW
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13625G
WDFN8 3.3X3.3, 0.65P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN8 3.3x3.3, 0.65P
CASE 511DQ
ISSUE O
DATE 31 OCT 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13648G
WDFN8 3.3X3.3, 0.65P
PAGE 1 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
WDFN8 3.3x3.3, 0.65P
CASE 511DQ
ISSUE O
DATE 31 OCT 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13648G
WDFN8 3.3X3.3, 0.65P
PAGE 2 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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