FDMA86265P [ONSEMI]
P 沟道，PowerTrench® MOSFET，-150V，-1A，1.2Ω;
| 型号： | FDMA86265P |
| 厂家： | 
ONSEMI |
| 描述： | P 沟道，PowerTrench® MOSFET，-150V，-1A，1.2Ω 开关 光电二极管 晶体管 |
| 文件： | 总7页 (文件大小：208K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
MOSFET – P-Channel,
POWERTRENCH)
V
r
MAX
I MAX
D
DS
DS(on)
−150 V
1.2 mW @ −10 V
1.4 mW @ −6 V
−1 A
-150 V, -1 A, 1.2 W
FDMA86265P
Pin 1
Drain
D
D
G
Source
General Description
This P−Channel MOSFET is produced using onsemi’s advanced
POWERTRENCH process that has been optimized for the on−state
resistance and yet maintain superior switching performance.
Features
D
D
S
• Max r
• Max r
= 1.2 mW at V = −10 V, I = −1 A
GS D
DS(on)
DS(on)
Bottom View
= 1.4 mW at V = −6 V, I = −0.9 A
GS
D
WDFN6 2x2, 0.65P
(MicroFET 2x2)
CASE 511CZ
• Low Profile − 0.8 mm Maximum in the New Package MicroFETt
2x2 mm
• Very Low RDS−on Mid Voltage P−channel Silicon Technology
Optimised for Low Qg
MARKING DIAGRAM
• This Product is Optimised for Fast Switching Applications as Well as
Load Switch Applications
• 100% UIL Tested
• This Device is Pb−Free, Halide Free and is RoHS Compliant
&Z&2&K
265
Applications
&Z = Assembly Plant Code
&2 = 2−Digit Date Code
&K = 2−Digits Lot Run Traceability Code
265 = Specific Device Code
• Active Clamp Switch
• Load Switch
MOSFET MAXIMUM RATINGS (T = 25°C, unless otherwise noted)
A
Symbol
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Ratings
−150
25
Unit
V
PIN ASSIGNMENT
V
V
DS
V
Bottom Drain Contact
GS
I
D
A
D
D
− Continuous T = 25°C (Note 1a)
−1
−2
A
− Pulsed
D
G
D
S
E
Single Pulse Avalanche Energy (Note 3)
Power Dissipation
6
mJ
W
AS
P
D
T = 25°C (Note 1a)
2.4
0.9
A
T = 25°C (Note 1b)
A
T , T
Operating and Storage Junction
Temperature Range
−55 to +150
°C
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
See detailed ordering and shipping information on page 5 of
this data sheet.
THERMAL CHARACTERISTICS (T = 25°C, unless otherwise noted)
A
Symbol
Parameter
Ratings
Unit
R
Thermal Resistance, Junction to Ambient
(Note 1a)
52
°C/W
q
JA
R
Thermal Resistance, Junction to Ambient
(Note 1b)
145
q
JA
© Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
March, 2023 − Rev. 3
FDMA86265P/D
FDMA86265P
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= −250 mA, V = 0 V
−150
−
−
−
−
V
DSS
D
GS
Breakdown Voltage Temperature
Coefficient
= −250 mA, referenced to 25°C
−125
mV/°C
DBVDSS
DTJ
D
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
V
= −120 V, V = 0 V
−
−
−
−
−1
mA
DSS
GSS
DS
GS
I
=
25 V, V = 0 V
100
nA
GS
DS
ON CHARACTERISTICS
V
Gate to Source Threshold Voltage
V
I
= V , I = −250 mA
−2
−
−3.2
5
−4
−
V
GS(th)
GS
DS D
Gate to Source Threshold Voltage
Temperature Coefficient
= −250 mA, referenced to 25°C
mV/°C
DVGS(th)
DTJ
D
r
Static Drain to Source On Resistance
V
GS
V
GS
V
GS
V
DS
= −10 V, I = −1 A
−
−
−
−
0.86
0.95
1.53
1.9
1.2
1.4
2.2
−
W
DS(on)
D
= −6 V, I = −0.9 A
D
= −10 V, I = −1 A, T = 125°C
D
J
g
FS
Forward Transconductance
= −10 V, I = −1 A
S
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
DS
= −75 V, V = 0 V, f = 1 MHz
−
−
158
16
0.7
3
210
25
5
pF
pF
pF
W
iss
GS
C
oss
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
C
rss
−
R
0.1
7.5
g
SWITCHING CHARACTERISTICS
t
Turn−On Delay Time
Rise Time
V
R
= −75 V, I = −1 A, V = −10 V,
−
−
−
−
−
5.8
2.2
8
12
10
16
13
4
ns
ns
ns
ns
nC
d(on)
DD
D
GS
= 6 W
GEN
t
r
t
Turn−Off Delay Time
Fall Time
d(off)
t
f
6.4
2.8
Q
g(TOT)
Total Gate Charge
V
GS
= 0 V to −10 V, V = −75 V,
DD
I
D
= −1 A
Q
Q
Total Gate Charge
V
DD
= −75 V, I = −1 A
−
−
0.8
0.7
−
−
nC
nC
gs
D
Gate to Drain “Miller” Charge
gd
DRAIN−SOURCE CHARACTERISTICS
V
Source to Drain Diode Forward Voltage
Reverse Recovery Time
V
= 0 V, I = −1 A (Note 2)
−
−
−
−0.87
50
−1.3
80
V
SD
GS
S
t
I = −1 A, di/dt = 100 A/ms
F
ns
nC
rr
Q
Reverse Recovery Charge
78
124
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2
1. R
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR−4 material. R
is guaranteed
JC
q
q
JA
by design while R
is determined by the user’s board design.
q
CA
a. 52°C/W when mounted on a
b. 145°C/W when mounted on a
minimum pad of 2 oz copper
2
1 in pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. Starting T = 25°C; P−ch: L = 3 mH, I = −2 A, V = −150 V, V = −10 V.
J
AS
DD
GS
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2
FDMA86265P
TYPICAL CHARACTERISTICS (T = 25°C, unless otherwise noted)
J
2.0
1.5
1.0
0.5
0.0
3.0
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
GS
= −10 V
V
= −8 V
GS
2.5
2.0
1.5
1.0
0.5
V
GS
= −4.5 V
V
= −6 V
GS
V
GS
= −5 V
V
GS
= −5 V
V
GS
= −6 V
V
GS
= −4.5 V
V
GS
= −10 V
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
GS
= −8 V
0
1
2
3
4
5
0.0
0.5
1.0
1.5
2.0
−V , DRAIN TO SOURCE VOLTAGE (V)
DS
−I , DRAIN CURRENT (A)
D
Figure 1. On Region Characteristics
Figure 2. Normalized On−Resistance vs.
Drain Current and Gate Voltage
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
4000
I
V
= −1 A
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
D
= −10 V
GS
I
D
= −1 A
3000
2000
1000
0
T = 125°C
J
T = 25°C
J
−75 −50 −25
0
25
50
75 100 125 150
4
5
6
7
8
9
10
TJ, JUNCTION TEMPERATURE (°C)
−V , GATE TO SOURCE VOLTAGE (V)
GS
Figure 3. Normalized On Resistance vs.
Junction Temperature
Figure 4. On−Resistance vs. Gate to Source Voltage
2.0
1.5
1.0
0.5
0.0
4
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
GS
= 0 V
1
V
DS
= −5 V
T = 150°C
J
T = 150°C
J
0.1
T = 25°C
J
T = 25°C
J
T = −55°C
0.01
0.001
J
T = −55°C
J
2
3
4
5
6
0.0
0.2
0.4
0.6
0.8
1.0
1.2
−V , GATE TO SOURCE VOLTAGE (V)
GS
−V , BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward Voltage vs.
Source Current
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3
FDMA86265P
TYPICAL CHARACTERISTICS (T = 25°C, unless otherwise noted) (continued)
J
10
8
1000
I
D
= −1 A
V
DD
= −75 V
100
10
1
V
DD
= −50 V
6
V
DD
= −100 V
4
2
f = 1 MHz
= 0 V
V
GS
0
0.0
0.1
0.1
0.5
1.0
1.5
2.0
2.5
3.0
1
10
100
Q , GATE CHARGE (nC)
g
−V , DRAIN TO SOURCE VOLTAGE (V)
DS
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs. Drain to Source Voltage
1.0
0.8
0.6
0.4
0.2
0.0
10
100 ms
1 ms
1
0.1
V
= −10 V
GS
10 ms
V
= −6 V
GS
THIS AREA IS
LIMITED BY r
100 ms
DS(on)
1 s
10 s
DC
SINGLE PULSE
0.01
T = MAX RATED
J
R
= 145°C/W
CURVE BENT TO
MEASURED DATA
q
JA
R
= 52°C/W
T = 25°C
A
q
JA
0.001
25
50
75
100
125
150
0.1
1
10
100
500
T , AMBIENT TEMPERATURE (°C)
A
−V , DRAIN TO SOURCE VOLTAGE (V)
DS
Figure 9. Maximum Continuous Drain Current vs.
Ambient Temperature
Figure 10. Forward Bias Safe Operating Area
2000
1000
SINGLE PULSE
R
= 145°C/W
q
JA
T = 25°C
A
100
10
1
0.5
10−5 10−4 10−3 10−2 10−1
t, PULSE WIDTH (s)
1
10
100 1000
Figure 11. Single Pulse Maximum Power Dissipation
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4
FDMA86265P
TYPICAL CHARACTERISTICS (T = 25°C, unless otherwise noted) (continued)
J
2
1
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
P
DM
0.1
0.1
0.05
0.02
0.01
t
1
t
2
NOTES:
(t) = r(t) x R
0.01
Z
q
q
JA
JA
R
= 145°C/W
q
JA
PEAK T = P
DUTY CYCLE: D = t / t
x Z (t) + T
q
JA A
J
DM
SINGLE PULSE
10−4 10−3
0.001
1
2
0.0005
10−5
10−2
10−1
1
100
0
1000
t, RECTANGULAR PULSE DURATION (s)
Figure 12. Junction−to−Ambient Transient Thermal Response Curve
PACKAGE MARKING AND ORDERING INFORMATION
†
Device
Device Marking
Package
Reel Size
Tape Width
Shipping
FDMA86265P
265
WDFN6 2x2, 0.65P
(MicroFET 2x2)
7”
12 mm
3000 / Tape & Reel
(Pb−Free, Halide Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States
and/or other countries.
MicroFET is trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other
countries.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN6 2x2, 0.65P
CASE 511CZ
ISSUE O
DATE 31 JUL 2016
1.70
1.00
0.05
C
2.0
A
(0.20)
No Traces
2X
B
allowed in
this Area
4
6
2.0
1.05
2.30
0.47(6X)
0.05
C
PIN#1 IDENT
TOP VIEW
2X
1
3
0.40(6X)
0.65
0.75 0.05
RECOMMENDED
LAND PATTERN OPT 1
0.10
C
0.20 0.05
1.70
0.45
(0.20)
1.00
0.08
C
SIDE VIEW
C
0.025 0.025
4
6
SEATING
PLANE
2.00 0.05
(0.15)
0.90 0.05
PIN #1 IDENT
1.05
0.66
(0.50)
0.30 0.05
2.30
(0.20)4X
0.47(6X)
1
3
0.28 0.05
(6X)
1
3
0.56 0.05
1.00 0.05
0.40(7X)
0.65
RECOMMENDED
LAND PATTERN OPT 2
2.00 0.05
(6X)
(0.50)
NOTES:
6
4
A. PACKAGE DOES NOT FULLY CONFORM
0.30 0.05
0.10
TO JEDEC MO−229 REGISTRATION
0.65
C
C
A
B
B. DIMENSIONS ARE IN MILLIMETERS.
1.30
0.05
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 2009.
BOTTOM VIEW
D. LAND PATTERN RECOMMENDATION IS
EXISTING INDUSTRY LAND PATTERN.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13614G
WDFN6 2X2, 0.65P
PAGE 1 OF 1
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© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
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