FDL100N50F [ONSEMI]
功率 MOSFET，N 沟道，UniFETTM，FRFET®，500 V，100 A，55 mΩ，TO-264;
| 型号： | FDL100N50F |
| 厂家： | 
ONSEMI |
| 描述： | 功率 MOSFET，N 沟道，UniFETTM，FRFET®，500 V，100 A，55 mΩ，TO-264 局域网 PC 开关 脉冲 晶体管 |
| 文件： | 总9页 (文件大小：502K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
MOSFET – N-Channel,
UniFETtFRFET®
G
500ꢀV, 100 A, 55 mW
D
S
FDL100N50F
TO−264−3LD
CASE 340CA
Description
UniFET MOSFET is onsemi's high voltage MOSFET family based
on planar stripe and DMOS technology. This MOSFET is tailored to
reduce on−state resistance, and to provide better switching
performance and higher avalanche energy strength. The body diode's
reverse recovery performance of UniFET FRFET MOSFET has been
enhanced by lifetime control. Its trr is less than 100 nsec and the
reverse dv/dt immunity is 15 V/ns while normal planar MOSFET's
have over 200 nsec and 4.5 V/nsec respectively. Therefore, it can
remove additional component and improve system reliability in
certain applications in which the performance of MOSFET's body
diode is significant. This device family is suitable for switching power
converter applications such as power factor correction (PFC), flat
panel display (FPD) TV power, ATX and electronic lamp ballasts.
D
G
S
MARKING DIAGRAM
$Y&Z&3&K
FDL
Features
100N50F
• R
= 43 mW (Typ.) @ V = 10 V, I = 50 A
GS D
• Low Gate Charge (Typ. 238 nC)
DS(on)
FDL100N50F = Specific Device Code
• Low C (Typ. 64 pF)
rss
$Y
&Z
&3
&K
= onsemi Logo
• 100% Avalanche Tested
• Improved dv/dt Capability
• RoHS Compliant
= Assembly Location
= Date Code (Year and Week)
= Lot Code
Applications
ORDERING INFORMATION
• Uninterruptible Power Supply
• AC−DC Power Supply
See detailed ordering and shipping information on page 3 of
this data sheet.
© Semiconductor Components Industries, LLC, 2022
1
Publication Order Number:
November, 2022 − Rev. 0
FDL100N50F/D
FDL100N50F
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
FDL100N50F
Unit
V
V
Drain to Source Voltage
Gate to Source Voltage
Drain Current
500
30
DSS
GSS
V
V
I
D
− Continuous (TC = 25°C)
− Continuous (TC = 100°C)
− Pulsed (Note 1)
100
A
60
I
Drain Current
400
A
mJ
A
DM
E
Single Pulsed Avalanche Energy
Avalanche Current
(Note 2)
(Note 1)
(Note 1)
(Note 3)
5000
100
AS
AR
I
E
AR
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation
73.5
20
mJ
V/ns
W
dv/dt
P
D
(T = 25°C)
C
2500
20
− Derate Above 25°C
W/°C
°C
T , T
Operating and Storage Temperature Range
−55 to +150
300
J
STG
T
L
Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Repetitive rating: pulse−width limited by maximum junction temperature.
2. L = 1 mH, I = 100 A, V = 50 V, R = 25 W, starting T = 25°C.
AS
DD
G
J
3. I ≤ 100 A, di/dt ≤ 200 A/ms, V ≤ BV
, starting T = 25°C.
SD
DD
DSS
J
THERMAL CHARACTERISTICS
Symbol
Parameter
FDL100N50F
Unit
RθJC
RθJA
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
0.05
30
°C/W
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= 250 mA, V = 0 V, T = 25°C
500
−
−
−
V
DSS
D
GS
C
ΔBV
/ ΔT
Breakdown Voltage Temperature
Coefficient
= 250 mA, Referenced to 25°C
−
0.5
V/°C
DSS
J
D
I
Zero Gate Voltage Drain Current
V
DS
V
DS
V
GS
= 500 V, V = 0 V
−
−
−
−
−
−
10
μA
DSS
GS
= 400 V, T = 125°C
100
100
C
I
Gate to Body Leakage Current
=
30 V, V = 0 V
nA
GSS
DS
ON CHARACTERISTICS
V
Gate Threshold Voltage
V
GS
V
GS
V
DS
= V , I = 250 mA
3.0
−
−
5.0
0.055
−
V
Ω
S
GS(th)
DS(on)
DS D
R
Static Drain to Source On Resistance
Forward Transconductance
= 10 V, I = 50 A
0.043
95
D
g
FS
= 20 V, I = 50 A
−
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 25 V, V = 0 V,
−
−
−
−
−
−
12000
1700
64
−
−
−
−
−
−
pF
pF
pF
nC
nC
nC
iss
DS
GS
f = 1 MHz
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
Total Gate Charge at 10V
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
rss
Q
V
DD
V
GS
= 400 V, I = 50 A,
238
74
g(tot)
D
= 10 V
Q
gs
gd
(Note 4)
Q
95
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2
FDL100N50F
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
SWITCHING CHARACTERISTICS
t
t
Turn−On Delay Time
Turn−On Rise Time
Turn−Off Delay Time
Turn−Off Fall Time
V
V
= 250 V, I = 50 A,
−
−
−
−
63
−
−
−
−
ns
ns
ns
ns
d(on)
DD
GS
D
= 10 V, R = 4.7 W
G
t
r
186
202
105
(Note 4)
d(off)
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
I
Maximum Continuous Drain to Source Diode Forward Current
Maximum Pulsed Drain to Source Diode Forward Current
−
−
−
−
−
−
−
100
400
1.5
−
A
A
S
I
SM
V
SD
Drain to Source Diode Forward Voltage
Reverse Recovery Time
V
V
= 0 V, I = 100 A
−
V
GS
SD
t
rr
= 0 V, I = 100 A
250
1.5
ns
uC
GS
SD
dI /dt = 100 A/ms
F
Q
Reverse Recovery Charge
−
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Essentially independent of operating temperature typical characteristics.
PACKAGE MARKING AND ORDERING INFORMATION
†
Part Number
Top Mark
Package
Reel Size
Tape Width
Shipping
FDL100N50F
FDL100N50F
TO − 264
N/A
N/A
25 Units / Tube
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
3
FDL100N50F
TYPICAL CHARACTERISTICS
300
100
400
100
V
GS
= 15 V
10 V
8 V
7 V
150°C
6.5 V
6 V
25°C
−55°C
10
10
*Notes:
*Notes:
1. 250 ms Pulse Test
2. T = 25°C
1. V = 20 V
DS
1
2. 250 ms Pulse Test
C
1
0.5
8
10
6
0.1
1
4
10
V
DS
, DRAIN−SOURCE VOLTAGE (V)
V
GS
, GATE−SOURCE VOLTAGE (A)
Figure 2. Transfer Characteristics
Figure 1. On−Region Characteristics
0.07
0.06
0.05
300
100
150°C
V
GS
= 10 V
25°C
25°C
V
= 20 V
GS
10
1
0.04
0.03
*Notes:
1. V = 0 V
2. 250 ms Pulse Test
GS
*Notes: T = 25°C
C
250
0
50
100
150
200
0.0
0.5
1.0
1.5
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance Variation vs. Drain
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current and Temperature
Current and Gate Voltage
30000
25000
20000
15000
10000
10
8
C
C
C
= C + C ( c
gs gd ds = shorted)
iss
oss
rrs
V
DS
V
DS
V
DS
= 100 V
= 250 V
= 400 V
= C + C
ds
gd
C
= C
oss
gd
*Notes:
6
4
2
1. V = 0 V
GS
C
2. f = 1 MHz
iss
5000
0
C
rss
*Notes: I = 50 A
D
0
−1
10
1
10
30
250
200
0
50
100
150
V
SD
, DRAIN−SOURCE VOLTAGE (V)
Q , TOTAL GATE CHARGE (nC)
g
Figure 6. Gate Charge Characteristics
Figure 5. Capacitance Characteristics
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4
FDL100N50F
TYPICAL CHARACTERISTICS (continued)
1.2
1.1
3.0
2.5
2.0
1.5
1.0
1.0
0.9
0.8
*Notes:
1. V = 0 V
*Notes:
0.5
1. V = 0 V
GS
GS
2. I = 1 mA
2. I = 1 mA
D
D
0.0
−100
200
200
−50
−100
−50
0
50
100
0
150
150
100
50
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 7. Breakdown Voltage Variation vs.
Temperature
Figure 8. On−Resistance Variation vs.
Temperature
1000
100
10
120
30 ms
100 ms
100
80
1 ms
10 ms
DC
60
Operation in This Area is
1
Limited by R
DS(on)
40
20
*Notes:
1. T = 25°C
2. T = 150°C
0.1
C
J
3. Single Pulse
0.01
0
25
50
75
100
150
100
1000
125
1
10
V
DS
, DRAIN−SOURCE VOLTAGE (V)
T , CASE TEMPERATURE (°C)
C
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current vs. Case
Temperature
0.1
0.5
0.2
0.1
0.01
P
DM
0.05
t
1
0.02
t
2
0.001 0.01
*Notes:
1. Z
2. Duty Factor, D = t /t
(t) = 0.05°C
Θ
JC
Single pulse
1
2
3. T − T = P
* Z
(t)
JC
Q
JM
C
DM
0.0001
−3
−5
−4
−2
−1
10
10
10
10
10
1
t , RECTANGULAR PULSE DURATION (s)
1
Figure 11. Transient Thermal Response Curve
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5
FDL100N50F
I
G
= const.
Figure 12. Gate Charge Test Circuit & Waveforms
RL
VDS
90%
VDS
VDD
VGS
RG
10%
VGS
DUT
V
GS
td(on)
td(off)
t
r
t
r
t
on
t
off
Figure 13. Resistive Switching Test Circuit & Waveforms
V
GS
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
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6
FDL100N50F
+
DUT
VDS
_
ISD
L
Driver
RG
Same Type
as DUT
VDD
VGS
ꢀ
dv/dt controlled by R
G
ꢀ
I
controllerd by pulse period
SD
Gate Pulse Width
−−−−−−−−−−−−−−−−
Gate Pulse Period
D =
VGS
10 V
(Driver)
I
, Body Diode Forward Current
FM
ISD
di/ dt
(DUT)
IRM
Body Diode Reserve Current
Body Diode Recovery dv/dt
VDS
(DUT)
VDD
VSD
Body Diode
Forward Votlage Drop
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
UniFET is trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other
countries.
FRFET is registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or
other countries.
www.onsemi.com
7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−264−3LD
CASE 340CA
ISSUE O
DATE 31 OCT 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13860G
TO−264−3LD
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
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provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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