FDD9507L-F085 [ONSEMI]
P-Channel POWERTRENCH® MOSFET, -40 V, -100 A, 4.4 mΩ;
| 型号： | FDD9507L-F085 |
| 厂家： | 
ONSEMI |
| 描述： | P-Channel POWERTRENCH® MOSFET, -40 V, -100 A, 4.4 mΩ 开关 晶体管 |
| 文件： | 总8页 (文件大小：461K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MOSFET - Power, Single
P‐Channel POWERTRENCH)
-40 V, -100 A, 4.4 mW
FDD9507L-F085
Features
www.onsemi.com
• Typical R
• Typical G
= 3.3 mW at V = −10 V, I = −80 A
GS D
DS(on)
= 110 nC at V = −10 V, I = −80 A
g(tot)
GS
D
• UIS Capability
V
R
MAX
I MAX
D
DSS
DS(ON)
• Qualified to AEC Q101
−40 V
4.4 mW @ −10 V
−100 A
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
D
Applications
• Automotive Engine Control
• PowerTrain Management
• Solenoid and Motor Drivers
• Electrical Power Steering
• Integrated Starter/Alternator
• Distributed Power Architectures and VRM
• Primary Switch for 12 V Systems
G
S
P-CHANNEL MOSFET
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
D
Symbol
Parameter
Drain-to-Source Voltage
Gate-to-Source Voltage
Drain Current − Continuous,
Value
−40
Unit
V
G
V
DSS
S
V
GS
16
V
DPAK3 (TO−252)
CASE 369AS
I
D
−100
A
(V = −10 V) T = 25°C (Note 1)
GS
C
Pulsed Drain Current, T = 25°C
(See Figure 4)
259
A
MARKING DIAGRAM
C
E
AS
Single Pulse Avalanche Energy
(Note 2)
mJ
P
Power Dissipation
227
1.52
W
W/°C
°C
D
$Y&Z&3&K
FDD
9507L
Derate Above 25°C
T , T
Operating and Storage
Temperature
−55 to +175
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Current is limited by bondwire configuration.
$Y
&Z
&3
&K
= ON Semiconductor Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
2. Starting T = 25°C, L = 0.1 mH, I = −72 A, V = −40 V during inductor
J
AS
DD
charging and V = 0 V during time in avalanche.
DD
FDD9507L
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 6 of
this data sheet.
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
July, 2021 − Rev. 5
FDD9507L−F085/D
FDD9507L−F085
THERMAL CHARACTERISTICS
Symbol
Parameter
Value
0.66
52
Unit
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient (Note 3)
°C/W
R
q
q
JC
R
JA
3. R
is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder
q
JA
mounting surface of the drain pins. R
is guaranteed by design, while R
is determined by the board design. The maximum rating
q
q
JC
JA
2
presented here is based on mounting on a 1 in pad of 2oz copper.
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain-to-Source Breakdown Voltage
Drain-to-Source Leakage Current
I
= −250 mA, V = 0 V
−40
−
−
V
DSS
D
GS
I
V
= −40 V, V = 0 V
DS GS
DSS
T = 25°C
−
−
−
−
1
1
mA
mA
J
T = 175°C (Note 4)
J
I
Gate-to-Source Leakage Current
V
GS
=
16 V
−
−
100
nA
GSS
ON CHARACTERISTICS
V
Gate to Source Threshold Voltage
V
V
V
= V , I = 250 mA
−1
−2
−3
V
GS(th)
DS(on)
GS
GS
GS
J
J
DS
D
R
Static Drain to Source On Resistance
= −4.5 V, I = −80 A, T = 25°C
−
4.9
7.2
mW
D
J
= −10 V, I = −80 A
D
T = 25°C
−
−
3.3
5.3
4.4
7.1
T = 175°C (Note 4)
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= −20 V, V = 0 V, f = 1 MHz
−
−
−
−
−
−
−
−
−
6250
2640
61
−
−
pF
pF
pF
W
iss
DS
GS
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
Gate Resistance
−
rss
R
f = 1 MHz
19.3
100
46
−
g
Q
Total Gate Charge
V
GS
V
GS
V
GS
V
DD
V
DD
= 0 V to −10 V, V = −20 V, I = −80 A
130
−
nC
nC
nC
nC
nC
g(tot)
DD
D
Q
Total Gate Charge
= 0 V to −4.5 V, V = −20 V, I = −80 A
DD D
g(−4.5)
Q
Threshold Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
= 0 V to −2 V, V = −20 V, I = −80 A
13
−
g(th)
DD
D
Q
= −20 V, I = −80 A
22
−
gs
gd
D
Q
= −20 V, I = −80 A
13
−
D
SWITCHING CHARACTERISTICS
t
Turn-On Time
Turn-On Delay
Rise Time
V
= −20 V, I = −80 A, V = −10 V,
GEN
−
−
−
−
−
−
−
10
6
21
−
ns
ns
ns
ns
ns
ns
on
DD
D
GS
R
= 6 W
t
d(on)
t
r
−
t
Turn-Off Delay
Fall Time
400
132
−
−
d(off)
t
f
−
t
Turn-Off Time
710
off
DRAIN-SOURCE DIODE CHARACTERISTICS
V
Source to Drain Diode Forward
Voltage
I
I
= −80 A, V = 0 V
−
−
−
−
−0.9
−0.85
87
−1.3
−1.2
113
V
SD
SD
GS
= −40 A, V = 0 V
SD
GS
t
Reverse Recovery Time
I = −80 A, dI /dt = 100 A/ms
F
ns
rr
SD
Q
Reverse Recovery Charge
115
150
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. The maximum value is specified by design at T = 175°C. Product is not tested to this condition in production.
J
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2
FDD9507L−F085
TYPICAL CHARACTERISTICS
200
160
120
80
1.2
1.0
0.8
0.6
0.4
0.2
0.0
CURRENT LIMITED
BY SILICON
VGS = −10 V
CURRENT LIMITED
BY PACKAGE
40
0
0
25
50
75
100
125
(5C)
150
175
25
50
75
100
125
150
175
TC, CASE TEMPERATURE(oC)
TC, CASE TEMPERATURE
Figure 1. Normalized Power Dissipation vs. Case
Temperature
Figure 2. Maximum Continuous Drain Current vs.
Case Temperature
2
DUTY CYCLE − DESCENDING ORDER
1
P
DM
t
1
0.1
t
2
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t /t
1
2
PEAK T = P x Z
x R
+ T
J
DM
qJC
qJC C
0.01
10−5
10−4
10−3
10−2
10−1
100
101
t, RECTANGULAR PULSE DURATION(s)
Figure 3. Normalized Maximum Transient Thermal Impedance
5000
o
T
= 25
C
C
VGS = −10 V
FOR TEMPERATURES
o
ABOVE 25 C DERATE PEAK
CURRENT AS FOLLOWS:
1000
100
10
175 − T
C
I = I
25
150
SINGLE PULSE
10−5
10−4
10−3
10−2
10−1
100
101
t, RECTANGULAR PULSE DURATION(s)
Figure 4. Peak Current Capability
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3
FDD9507L−F085
TYPICAL CHARACTERISTICS
1000
100
10
300
If R = 0
tAV = (L)(I AS)/(1.3*RATED BV
− VDD
)
DSS
0
If R
0
tAV = (L/R)ln[(I AS*R)/(1.3*RATED BV
− VDD) +1]
DSS
100
100 us
STARTING T = 25oC
J
1 ms
10
STARTING TJ = 150oC
10 ms
1
SINGLE PULSE
OPERATION IN THIS
AREA MAY BE
T
= MAX RATED
100 ms
J
o
T
C
= 25
C
LIMITED BY r
DS(on)
0.1
1
1
10
−VDS, DRAIN TO SOURCE VOLTAGE (V)
100
0.001 0.01
0.1
1
10
100
1000
tAV, TIME IN AVALANCHE (ms)
Figure 5. Forward Bias Safe Operating Area
Figure 6. Unclamped Inductive Switching Capability
300
300
PULSE DURATION = 250 ms
DUTY CYCLE = 0.5% MAX
VGS = 0 V
100
250
V
DD
= −5 V
200
150
100
50
TJ = 175 o
C
T
J = 25oC
10
1
TJ = 25 o
C
TJ = −55oC
TJ = 175oC
o
TJ = −55 C
0
0.1
1
2
3
4
5
0.0
0.2
0.4
0.6
0.8
1.0
1.2
−VSD, BODY DIODE FORWARD VOLTAGE (V)
−VGS, GATE TO SOURCE VOLTAGE (V)
Figure 7. Transfer Characteristics
Figure 8. Forward Diode Characteristics
300
250
200
150
100
50
300
250
200
150
VGS
-10V Top
VGS
-10V Top
100
-7V
-5V
-7V
-5V
50
-4.5V
-4V
-4.5V
-4V
-3.5V Bottom
250 ms PULSE WIDTH
250 ms PULSE WIDTH
Tj=25oC
Tj=175oC
−3.5V Bottom
0
0
0
1
2
3
4
5
0
1
2
3
4
5
−VDS, DRAIN TO SOURCE VOLTAGE (V)
−VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 9. Saturation Characteristics
Figure 10. Saturation Characteristics
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4
FDD9507L−F085
TYPICAL CHARACTERISTICS
50
40
30
20
10
0
1.8
PULSE DURATION = 250 ms
DUTY CYCLE = 0.5% MAX
PULSE DURATION = 250 ms
DUTY CYCLE = 0.5% MAX
1.6
1.4
1.2
1.0
0.8
0.6
= −80 A
ID
TJ = 175oC
ID = −80 A
VGS = −10 V
TJ = 25oC
2
4
6
8
10
−80 −40
0
40
80
120 160
200
TJ, JUNCTION TEMPERATURE ( oC)
−VGS, GATE TO SOURCE VOLTAGE (V)
Figure 11. RDS(on) vs. Gate Voltage
Figure 12. Normalized RDS(on) vs. Junction
Temperature
1.3
1.10
VGS = VDS
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
ID = −5 mA
I
= −250 mA
D
1.05
1.00
0.95
0.90
−80 −40
0
40
80
120 160
200
−80
−40
0
40
80
100
120 160
TJ, JUNCTION TEMPERATURE (oC)
TJ, JUNCTION TEMPERATURE ( oC)
Figure 13. Normalized Gate Threshold Voltage
vs. Temperature
Figure 14. Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
10
10000
Ciss
D = −8 A
I
8
6
4
2
0
Coss
V
DD = −20 V
VDD = −24 V
1000
V
DD = −16 V
100
Crss
f = 1 MHz
V
GS = 0 V
10
0.1
1
10
40
0
20
40
60
80
100
−VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 15. Capacitance vs. Drain to Source
Voltage
Figure 16. Gate Charge vs. Gate to Source
Voltage
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5
FDD9507L−F085
ORDERING INFORMATION
Device
Marking
Package
Reel Size
Tape Width
Quantity
FDD9507L−F085
FDD9507L
DPAK3 (TO−252)
(Pb-Free / Halogen Free)
13″
16 mm
2500 Units
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DPAK3 (TO−252 3 LD)
CASE 369AS
ISSUE A
DATE 28 SEP 2022
GENERIC
MARKING DIAGRAM*
XXXXXX
XXXXXX
AYWWZZ
XXXX = Specific Device Code
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
A
Y
= Assembly Location
= Year
WW = Work Week
ZZ
= Assembly Lot Code
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
98AON13810G
DPAK3 (TO−252 3 LD)
PAGE 1 OF 1
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© Semiconductor Components Industries, LLC, 2019
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